x86-64: Properly align La_x86_64_retval to VEC_SIZE [BZ #22715]

_dl_runtime_profile calls _dl_call_pltexit, passing a pointer to
La_x86_64_retval which is allocated on stack.  The lrv_vector0
field in La_x86_64_retval must be aligned to size of vector register.
When allocating stack space for La_x86_64_retval, we need to make sure
that the address of La_x86_64_retval + RV_VECTOR0_OFFSET is aligned to
VEC_SIZE.  This patch checks the alignment of the lrv_vector0 field
and pads the stack space if needed.

Tested with x32 and x86-64 on SSE4, AVX and AVX512 machines.  It fixed

FAIL: elf/tst-audit10
FAIL: elf/tst-audit4
FAIL: elf/tst-audit5
FAIL: elf/tst-audit6
FAIL: elf/tst-audit7

on x32 AVX512 machine.

	[BZ #22715]
	* sysdeps/x86_64/dl-trampoline.h (_dl_runtime_profile): Properly
	align La_x86_64_retval to VEC_SIZE.

diff --git a/ChangeLog b/ChangeLog
index 42f871e4fc5de714334a0fe3d8b1b67e1b7dcc16..aed3cdf8677a3ed52b0c9128645bd6935566a8bf 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2018-01-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+       [BZ #22715]
+       * sysdeps/x86_64/dl-trampoline.h (_dl_runtime_profile): Properly
+       align La_x86_64_retval to VEC_SIZE.
+
 2018-01-16  Joseph Myers  <joseph@codesourcery.com>
 
        * sysdeps/x86_64/backtrace.c: Include <gnu/lib-names.h>.

diff --git a/sysdeps/x86_64/dl-trampoline.h b/sysdeps/x86_64/dl-trampoline.h
index 15edf49674e085dc2ab7b18b42c0acab62b36101..298cfb3d9929a06f33d2fe9627743e8d0dd3d1d7 100644 (file)
--- a/sysdeps/x86_64/dl-trampoline.h
+++ b/sysdeps/x86_64/dl-trampoline.h
@@ -440,8 +440,16 @@ _dl_runtime_profile:
 # ifdef RESTORE_AVX
        /* sizeof(La_x86_64_retval).  Need extra space for 2 SSE
           registers to detect if xmm0/xmm1 registers are changed
-          by audit module.  */
-       sub $(LRV_SIZE + XMM_SIZE*2), %RSP_LP
+          by audit module.  Since rsp is aligned to VEC_SIZE, we
+          need to make sure that the address of La_x86_64_retval +
+          LRV_VECTOR0_OFFSET is aligned to VEC_SIZE.  */
+#  define LRV_SPACE (LRV_SIZE + XMM_SIZE*2)
+#  define LRV_MISALIGNED ((LRV_SIZE + LRV_VECTOR0_OFFSET) & (VEC_SIZE - 1))
+#  if LRV_MISALIGNED == 0
+       sub $LRV_SPACE, %RSP_LP
+#  else
+       sub $(LRV_SPACE + VEC_SIZE - LRV_MISALIGNED), %RSP_LP
+#  endif
 # else
        sub $LRV_SIZE, %RSP_LP  # sizeof(La_x86_64_retval)
 # endif