Backport form mainline r226496.

gcc:

	Backport form mainline r226496.
	2015-08-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	PR target/66731
	* config/arm/vfp.md (negmuldf3_vfp): Add new pattern.
	(negmulsf3_vfp): Likewise.
	(muldf3negdf_vfp): Disable for -frounding-math.
	(mulsf3negsf_vfp): Likewise.
	* config/arm/arm.c (arm_new_rtx_costs): Fix NEG cost for VNMUL,
	fix MULT cost with -frounding-math.

gcc/testsuite:

	Backport form mainline r226496.
	2015-08-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	PR target/66731
	* gcc.target/arm/vnmul-1.c: New.
	* gcc.target/arm/vnmul-2.c: New.
	* gcc.target/arm/vnmul-3.c: New.
	* gcc.target/arm/vnmul-4.c: New.

From-SVN: r226519

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 08402b15693a1f397f7ec1c3b28516d6c084e60b..65827d518a35e0b5ad399462ddb445efe4121d21 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2015-08-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       Backport form mainline r226496.
+       2015-08-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       PR target/66731
+       * config/arm/vfp.md (negmuldf3_vfp): Add new pattern.
+       (negmulsf3_vfp): Likewise.
+       (muldf3negdf_vfp): Disable for -frounding-math.
+       (mulsf3negsf_vfp): Likewise.
+       * config/arm/arm.c (arm_new_rtx_costs): Fix NEG cost for VNMUL,
+       fix MULT cost with -frounding-math.
+
 2015-07-30  Uros Bizjak  <ubizjak@gmail.com>
 
        Backport from mainline:

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 4a284eca5c630d34864c32bc89b3ee2f05a9edde..1cbff96bd51a94e24cadc7559b3b7c8e7d13b306 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -9821,7 +9821,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 
          *cost = COSTS_N_INSNS (1);
 
-         if (GET_CODE (op0) == NEG)
+         if (GET_CODE (op0) == NEG && !flag_rounding_math)
            op0 = XEXP (op0, 0);
 
          if (speed_p)
@@ -9897,6 +9897,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
       if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
          && (mode == SFmode || !TARGET_VFP_SINGLE))
        {
+         if (GET_CODE (XEXP (x, 0)) == MULT)
+           {
+             /* FNMUL.  */
+             *cost = rtx_cost (XEXP (x, 0), NEG, 0, speed_p);
+             return true;
+           }
+
          *cost = COSTS_N_INSNS (1);
          if (speed_p)
            *cost += extra_cost->fp[mode != SFmode].neg;

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index 76464849d94129e9db7f13ee58f909b71afe8295..b9a8ee7ad423002d32a31f872b422d1b9ac5a074 100644 (file)
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -765,6 +765,17 @@
   [(set (match_operand:SF                 0 "s_register_operand" "=t")
        (mult:SF (neg:SF (match_operand:SF 1 "s_register_operand" "t"))
                 (match_operand:SF         2 "s_register_operand" "t")))]
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && !flag_rounding_math"
+  "fnmuls%?\\t%0, %1, %2"
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")
+   (set_attr "type" "fmuls")]
+)
+
+(define_insn "*negmulsf3_vfp"
+  [(set (match_operand:SF                 0 "s_register_operand" "=t")
+       (neg:SF (mult:SF (match_operand:SF 1 "s_register_operand" "t")
+                (match_operand:SF         2 "s_register_operand" "t"))))]
   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
   "fnmuls%?\\t%0, %1, %2"
   [(set_attr "predicable" "yes")
@@ -776,6 +787,18 @@
   [(set (match_operand:DF                 0 "s_register_operand" "=w")
        (mult:DF (neg:DF (match_operand:DF 1 "s_register_operand" "w"))
                 (match_operand:DF         2 "s_register_operand" "w")))]
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE
+  && !flag_rounding_math"
+  "fnmuld%?\\t%P0, %P1, %P2"
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")
+   (set_attr "type" "fmuld")]
+)
+
+(define_insn "*negmuldf3_vfp"
+  [(set (match_operand:DF                 0 "s_register_operand" "=w")
+       (neg:DF (mult:DF (match_operand:DF 1 "s_register_operand" "w")
+                (match_operand:DF         2 "s_register_operand" "w"))))]
   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fnmuld%?\\t%P0, %P1, %P2"
   [(set_attr "predicable" "yes")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cc6603b24cf5f656db5aa53e74fa91fff598eb49..2e4e269146e50bf026aea68a219dd89517135380 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2015-08-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       Backport form mainline r226496.
+       2015-08-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       PR target/66731
+       * gcc.target/arm/vnmul-1.c: New.
+       * gcc.target/arm/vnmul-2.c: New.
+       * gcc.target/arm/vnmul-3.c: New.
+       * gcc.target/arm/vnmul-4.c: New.
+
 2015-07-30  Uros Bizjak  <ubizjak@gmail.com>
 
        Backport from mainline:

diff --git a/gcc/testsuite/gcc.target/arm/vnmul-1.c b/gcc/testsuite/gcc.target/arm/vnmul-1.c
new file mode 100644 (file)
index 0000000..6378a81
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vnmul-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_vfp_ok } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+/* { dg-options "-O2 -fno-rounding-math -mfpu=vfp -mfloat-abi=hard" } */
+
+double
+foo_d (double a, double b)
+{
+  /* { dg-final { scan-assembler "fnmuld" } } */
+  return -a * b;
+}
+
+float
+foo_s (float a, float b)
+{
+  /* { dg-final { scan-assembler "fnmuls" } } */
+  return -a * b;
+}

diff --git a/gcc/testsuite/gcc.target/arm/vnmul-2.c b/gcc/testsuite/gcc.target/arm/vnmul-2.c
new file mode 100644 (file)
index 0000000..746c584
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vnmul-2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_vfp_ok } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+/* { dg-options "-O2 -frounding-math -mfpu=vfp -mfloat-abi=hard" } */
+
+double
+foo_d (double a, double b)
+{
+  /* { dg-final { scan-assembler-not "fnmuld" } } */
+  return -a * b;
+}
+
+float
+foo_s (float a, float b)
+{
+  /* { dg-final { scan-assembler-not "fnmuls" } } */
+  return -a * b;
+}

diff --git a/gcc/testsuite/gcc.target/arm/vnmul-3.c b/gcc/testsuite/gcc.target/arm/vnmul-3.c
new file mode 100644 (file)
index 0000000..56f28fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vnmul-3.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_vfp_ok } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+/* { dg-options "-O2 -fno-rounding-math -mfpu=vfp -mfloat-abi=hard" } */
+
+double
+foo_d (double a, double b)
+{
+  /* { dg-final { scan-assembler "fnmuld" } } */
+  return -(a * b);
+}
+
+float
+foo_s (float a, float b)
+{
+  /* { dg-final { scan-assembler "fnmuls" } } */
+  return -(a * b);
+}

diff --git a/gcc/testsuite/gcc.target/arm/vnmul-4.c b/gcc/testsuite/gcc.target/arm/vnmul-4.c
new file mode 100644 (file)
index 0000000..37851ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vnmul-4.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_vfp_ok } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+/* { dg-options "-O2 -frounding-math -mfpu=vfp -mfloat-abi=hard" } */
+
+double
+foo_d (double a, double b)
+{
+  /* { dg-final { scan-assembler "fnmuld" } } */
+  return -(a * b);
+}
+
+float
+foo_s (float a, float b)
+{
+  /* { dg-final { scan-assembler "fnmuls" } } */
+  return -(a * b);
+}