+2009-02-11 Uros Bizjak <ubizjak@gmail.com>
+ Jakub Jelinek <jakub@redhat.com>
+
+ PR target/39118
+ * config/i386/i386.md (UNSPEC_MEMORY_BLOCKAGE): New constant.
+ (memory_blockage): New expander.
+ (*memory_blockage): New insn pattern.
+ * config/i386/i386.c (ix86_expand_prologue): Use memory_blockage
+ instead of general blockage at the end of function prologue when
+ frame pointer is used to access red zone area. Do not emit blockage
+ when profiling, it is emitted in generic code.
+ (ix86_expand_epilogue): Emit memory_blockage at the beginning of
+ function epilogue when frame pointer is used to access red zone area.
+
2009-02-10 Steve Ellcey <sje@cup.hp.com>
PR c/39084
{
rtx insn;
bool pic_reg_used;
- bool emit_blockage = false;
struct ix86_frame frame;
HOST_WIDE_INT allocate;
insn = emit_insn (gen_set_got (pic_offset_table_rtx));
}
- /* Prevent function calls from being scheduled before the call to mcount.
- In the pic_reg_used case, make sure that the got load isn't deleted. */
- if (current_function_profile)
- {
- if (pic_reg_used)
- emit_insn (gen_prologue_use (pic_offset_table_rtx));
- emit_blockage = true;
- }
+ /* In the pic_reg_used case, make sure that the got load isn't deleted
+ when mcount needs it. Blockage to avoid call movement across mcount
+ call is emitted in generic code after the NOTE_INSN_PROLOGUE_END
+ note. */
+ if (current_function_profile && pic_reg_used)
+ emit_insn (gen_prologue_use (pic_offset_table_rtx));
/* Prevent instructions from being scheduled into register save push
sequence when access to the redzone area is done through frame pointer.
prologue, and moving instructions that access redzone area via frame
pointer inside push sequence violates this assumption. */
if (frame_pointer_needed && frame.red_zone_size)
- emit_blockage = true;
-
- if (emit_blockage)
- emit_insn (gen_blockage ());
+ emit_insn (gen_memory_blockage ());
/* Emit cld instruction if stringops are used in the function. */
if (TARGET_CLD && ix86_current_function_needs_cld)
ix86_compute_frame_layout (&frame);
+ /* See the comment about red zone and frame
+ pointer usage in ix86_expand_prologue. */
+ if (frame_pointer_needed && frame.red_zone_size)
+ emit_insn (gen_memory_blockage ());
+
/* Calculate start of saved registers relative to ebp. Special care
must be taken for the normal return case of a function using
eh_return: the eax and edx registers are marked as saved, but not
(UNSPEC_DEF_CFA 15)
(UNSPEC_SET_RIP 16)
(UNSPEC_SET_GOT_OFFSET 17)
+ (UNSPEC_MEMORY_BLOCKAGE 18)
; TLS support
- (UNSPEC_TP 18)
- (UNSPEC_TLS_GD 19)
- (UNSPEC_TLS_LD_BASE 20)
- (UNSPEC_TLSDESC 21)
+ (UNSPEC_TP 20)
+ (UNSPEC_TLS_GD 21)
+ (UNSPEC_TLS_LD_BASE 22)
+ (UNSPEC_TLSDESC 23)
; Other random patterns
(UNSPEC_SCAS 30)
""
[(set_attr "length" "0")])
+;; Do not schedule instructions accessing memory across this point.
+
+(define_expand "memory_blockage"
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BLOCKAGE))]
+ ""
+{
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ MEM_VOLATILE_P (operands[0]) = 1;
+})
+
+(define_insn "*memory_blockage"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BLOCKAGE))]
+ ""
+ ""
+ [(set_attr "length" "0")])
+
;; As USE insns aren't meaningful after reload, this is used instead
;; to prevent deleting instructions setting registers for PIC code
(define_insn "prologue_use"