arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable OSTM timers on RZ/V2N EVK

Enable OSTM0-OSTM7 instances in the RZ/V2N EVK device tree so that all
eight OSTM general timers are active and available.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514101528.41663-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
index b72574dcc2091ee0d21a6714a420795aba09c068..518426dd624c05d628c999d72a893f72e3a19a57 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
@@ -110,6 +110,38 @@
        };
 };
 
+&ostm0 {
+       status = "okay";
+};
+
+&ostm1 {
+       status = "okay";
+};
+
+&ostm2 {
+       status = "okay";
+};
+
+&ostm3 {
+       status = "okay";
+};
+
+&ostm4 {
+       status = "okay";
+};
+
+&ostm5 {
+       status = "okay";
+};
+
+&ostm6 {
+       status = "okay";
+};
+
+&ostm7 {
+       status = "okay";
+};
+
 &pinctrl {
        eth0_pins: eth0 {
                pins = "ET0_TXC_TXCLK";