(match_operand:SI 1 "GOT32_symbol_operand"))))
(match_operand 2))]
"!TARGET_MACHO
- && !TARGET_64BIT
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ && !TARGET_64BIT && !TARGET_INDIRECT_BRANCH_REGISTER
&& SIBLING_CALL_P (insn)"
{
rtx fnaddr = gen_rtx_PLUS (SImode, operands[0], operands[1]);
(match_operand:W 1 "memory_operand"))
(call (mem:QI (match_dup 0))
(match_operand 3))]
- "!TARGET_X32
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ "!TARGET_X32 && !TARGET_INDIRECT_BRANCH_REGISTER
&& SIBLING_CALL_P (peep2_next_insn (1))
&& !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))"
(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
(call (mem:QI (match_dup 0))
(match_operand 3))]
- "!TARGET_X32
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ "!TARGET_X32 && !TARGET_INDIRECT_BRANCH_REGISTER
&& SIBLING_CALL_P (peep2_next_insn (2))
&& !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))"
(plus:SI (reg:SI SP_REG)
(match_operand:SI 2 "immediate_operand" "i")))
(unspec [(const_int 0)] UNSPEC_PEEPSIB)]
- "!TARGET_64BIT"
+ "!TARGET_64BIT && !TARGET_INDIRECT_BRANCH_REGISTER"
"* return ix86_output_call_insn (insn, operands[0]);"
[(set_attr "type" "call")])
[(set (match_operand:W 0 "register_operand")
(match_operand:W 1 "memory_operand"))
(set (pc) (match_dup 0))]
- "!TARGET_X32
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ "!TARGET_X32 && !TARGET_INDIRECT_BRANCH_REGISTER
&& peep2_reg_dead_p (2, operands[0])"
[(set (pc) (match_dup 1))])
(match_operand:SI 2 "GOT32_symbol_operand"))))
(match_operand 3)))]
"!TARGET_MACHO
- && !TARGET_64BIT
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ && !TARGET_64BIT && !TARGET_INDIRECT_BRANCH_REGISTER
&& SIBLING_CALL_P (insn)"
{
rtx fnaddr = gen_rtx_PLUS (SImode, operands[1], operands[2]);
(set (match_operand 2)
(call (mem:QI (match_dup 0))
(match_operand 3)))]
- "!TARGET_X32
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ "!TARGET_X32 && !TARGET_INDIRECT_BRANCH_REGISTER
&& SIBLING_CALL_P (peep2_next_insn (1))
&& !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))"
(set (match_operand 2)
(call (mem:QI (match_dup 0))
(match_operand 3)))]
- "!TARGET_X32
- && !TARGET_INDIRECT_BRANCH_REGISTER
+ "!TARGET_X32 && !TARGET_INDIRECT_BRANCH_REGISTER
&& SIBLING_CALL_P (peep2_next_insn (2))
&& !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))"
(ior (match_test "constant_call_address_operand
(op, mode == VOIDmode ? mode : Pmode)")
(match_operand 0 "call_register_operand")
- (and (not (match_test "TARGET_INDIRECT_BRANCH_REGISTER"))
- (ior (and (not (match_test "TARGET_X32"))
- (match_operand 0 "memory_operand"))
- (and (match_test "TARGET_X32 && Pmode == DImode")
- (match_operand 0 "GOT_memory_operand"))))))
+ (match_test "satisfies_constraint_Bw (op)")))
;; Similarly, but for tail calls, in which we cannot allow memory references.
(define_special_predicate "sibcall_insn_operand"
(ior (match_test "constant_call_address_operand
(op, mode == VOIDmode ? mode : Pmode)")
(match_operand 0 "register_no_elim_operand")
- (and (not (match_test "TARGET_INDIRECT_BRANCH_REGISTER"))
- (ior (and (not (match_test "TARGET_X32"))
- (match_operand 0 "sibcall_memory_operand"))
- (and (match_test "TARGET_X32 && Pmode == DImode")
- (match_operand 0 "GOT_memory_operand"))))))
+ (match_test "satisfies_constraint_Bs (op)")))
;; Return true if OP is a 32-bit GOT symbol operand.
(define_predicate "GOT32_symbol_operand"