ASoC: wm8955: Fix setting wrong register for WM8955_K_8_0_MASK bits

[ Upstream commit 12c350050538c7dc779c083b7342bfd20f74949c ]

WM8955_K_8_0_MASK bits is controlled by WM8955_PLL_CONTROL_3 rather than
WM8955_PLL_CONTROL_2.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>

diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c
index 7d0b01bcab4bb4529940e492874057ce922ea7ec..d48ac712f6245368a8e307390eb58fb13e356b1a 100644 (file)
--- a/sound/soc/codecs/wm8955.c
+++ b/sound/soc/codecs/wm8955.c
@@ -298,7 +298,7 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
                snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
                                    WM8955_K_17_9_MASK,
                                    (pll.k >> 9) & WM8955_K_17_9_MASK);
-               snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
+               snd_soc_update_bits(codec, WM8955_PLL_CONTROL_3,
                                    WM8955_K_8_0_MASK,
                                    pll.k & WM8955_K_8_0_MASK);
                if (pll.k)