sparc.c (sparc_expand_vec_perm_bmask): Use a scratch register as destination of bmask.

	* config/sparc/sparc.c (sparc_expand_vec_perm_bmask): Use a scratch
	register as destination of bmask.
	(vector_init_bshuffle): Likewise.
	* config/sparc/sparc.md (vec_perm_constv8qi): Likewise.
	(bmaskdi_vis): Enable only in 64-bit mode.

From-SVN: r241207

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dcd6f295bd325b804772d46acb57bc4764b5c52b..2807b974df811298dafd6030706d301cd9905593 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2016-10-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * config/sparc/sparc.c (sparc_expand_vec_perm_bmask): Use a scratch
+       register as destination of bmask.
+       (vector_init_bshuffle): Likewise.
+       * config/sparc/sparc.md (vec_perm_constv8qi): Likewise.
+       (bmaskdi_vis): Enable only in 64-bit mode.
+
 2016-10-13  Andrew Senkevich  <andrew.senkevich@intel.com>
 
        Backport from trunk

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 268d6c391c0afb67b197b6fc52b5d1c460334eee..349f31f142353936378d918fcebfa37807471ccf 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -11967,7 +11967,7 @@ sparc_expand_vec_perm_bmask (machine_mode vmode, rtx sel)
     }
 
   /* Always perform the final addition/merge within the bmask insn.  */
-  emit_insn (gen_bmasksi_vis (gen_rtx_REG (SImode, 0), sel, t_1));
+  emit_insn (gen_bmasksi_vis (gen_reg_rtx (SImode), sel, t_1));
 }
 
 /* Implement TARGET_FRAME_POINTER_REQUIRED.  */
@@ -12233,7 +12233,7 @@ vector_init_bshuffle (rtx target, rtx elt, machine_mode mode,
     }
 
   sel = force_reg (SImode, GEN_INT (bmask));
-  emit_insn (gen_bmasksi_vis (gen_rtx_REG (SImode, 0), sel, const0_rtx));
+  emit_insn (gen_bmasksi_vis (gen_reg_rtx (SImode), sel, const0_rtx));
   emit_insn (final_insn);
 }
 

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 5879dd4e0b1f745be00936584bda4b7fd0ffe731..81e998472207a2a485c391fdfceb27bf3ae771fb 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -8380,7 +8380,7 @@
                  (match_operand:DI 2 "register_or_zero_operand" "rJ")))
    (set (zero_extract:DI (reg:DI GSR_REG) (const_int 32) (const_int 32))
         (plus:DI (match_dup 1) (match_dup 2)))]
-  "TARGET_VIS2"
+  "TARGET_VIS2 && TARGET_ARCH64"
   "bmask\t%r1, %r2, %0"
   [(set_attr "type" "array")])
 
@@ -8422,7 +8422,7 @@
     mask |= (INTVAL (XVECEXP (sel, 0, i)) & 0xf) << (28 - i*4);
   sel = force_reg (SImode, gen_int_mode (mask, SImode));
 
-  emit_insn (gen_bmasksi_vis (gen_rtx_REG (SImode, 0), sel, const0_rtx));
+  emit_insn (gen_bmasksi_vis (gen_reg_rtx (SImode), sel, const0_rtx));
   emit_insn (gen_bshufflev8qi_vis (operands[0], operands[1], operands[2]));
   DONE;
 })

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9c17243e238d86706aa53287760b58ee6c864466..3432792aa177c338b883ed3144098e1669a4f26a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2016-10-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * gcc.target/sparc/bmaskbshuf.c: Rename to...
+       * gcc.target/sparc/bmaskbshuf-1.c: ...this.
+       * gcc.target/sparc/bmaskbshuf-2.c: New test.
+
 2016-10-13  Andrew Senkevich  <andrew.senkevich@intel.com>
 
        Backport from trunk

diff --git a/gcc/testsuite/gcc.target/sparc/bmaskbshuf.c b/gcc/testsuite/gcc.target/sparc/bmaskbshuf-1.c
similarity index 100%
rename from gcc/testsuite/gcc.target/sparc/bmaskbshuf.c
rename to gcc/testsuite/gcc.target/sparc/bmaskbshuf-1.c

diff --git a/gcc/testsuite/gcc.target/sparc/bmaskbshuf-2.c b/gcc/testsuite/gcc.target/sparc/bmaskbshuf-2.c
new file mode 100644 (file)
index 0000000..874e3db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/bmaskbshuf-2.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O" } */
+
+typedef unsigned int Vect __attribute__((vector_size(8)));
+
+extern void abort (void);
+
+Vect a, b, c, d;
+
+__attribute__((noinline, noclone)) void test (void)
+{
+  Vect mask = { 2, 2 };
+  int i;
+
+  c = __builtin_shuffle (a, mask);
+  d = __builtin_shuffle (a, b, mask);
+
+  __asm__ ("" : : "r" (&c), "r" (&d) : "memory");
+
+  for (i = 0; i < 2; ++i)
+    if (c[i] != a[mask[i] & 1])
+      abort ();
+    else if (mask[i] & 2)
+      {
+       if (d[i] != b[mask[i] & 1])
+         abort ();
+      }
+}
+
+int main (void)
+{
+  int i;
+  for (i = 0; i < 2; ++i)
+    {
+      a[i] = i + 2;
+      b[i] = 2 + i + 2;
+    }
+
+  test ();
+  return 0;
+}