]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
dt-bindings: clock: sm7150-dispcc: Add MDSS_CORE reset
authorJens Reidel <adrian@mainlining.org>
Fri, 19 Sep 2025 12:34:30 +0000 (14:34 +0200)
committerBjorn Andersson <andersson@kernel.org>
Wed, 22 Oct 2025 21:38:03 +0000 (16:38 -0500)
Add the index for a reset inside the dispcc on SM7150 SoC.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250919-sm7150-dispcc-fixes-v1-1-308ad47c5fce@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
include/dt-bindings/clock/qcom,sm7150-dispcc.h

index fc1fefe8fd7248bb160816cebb8cc4c51615a8dc..1e4e6432d5065b1dd3daed5b382732c9c9c09444 100644 (file)
@@ -53,6 +53,9 @@
 #define DISPCC_SLEEP_CLK                       41
 #define DISPCC_SLEEP_CLK_SRC                   42
 
+/* DISPCC resets */
+#define DISPCC_MDSS_CORE_BCR                   0
+
 /* DISPCC GDSCR */
 #define MDSS_GDSC                              0