]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
firmware: qcom_scm: Refactor qcom_scm_pas_init_image()
authorMukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Mon, 5 Jan 2026 13:22:57 +0000 (18:52 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 13 Jan 2026 18:14:34 +0000 (12:14 -0600)
Refactor qcom_scm_pas_init_image() by moving the memory allocation,
copy, and free operations to a higher-level function, and isolate the
actual SMC call in a separate function. The main intention is to allow
flexibility for different allocators and to respect any constraints that
the allocator API may impose before invoking the actual SCM function.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260105-kvmrprocv10-v10-9-022e96815380@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/firmware/qcom/qcom_scm.c

index d3783166fea1b675a976911b39786a69de164064..bc3b8dc7d3e48fcf3107b66ff7bb016be53d76bb 100644 (file)
@@ -592,6 +592,37 @@ struct qcom_scm_pas_context *devm_qcom_scm_pas_context_alloc(struct device *dev,
 }
 EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc);
 
+static int __qcom_scm_pas_init_image(u32 pas_id, dma_addr_t mdata_phys,
+                                    struct qcom_scm_res *res)
+{
+       struct qcom_scm_desc desc = {
+               .svc = QCOM_SCM_SVC_PIL,
+               .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE,
+               .arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW),
+               .args[0] = pas_id,
+               .owner = ARM_SMCCC_OWNER_SIP,
+       };
+       int ret;
+
+       ret = qcom_scm_clk_enable();
+       if (ret)
+               return ret;
+
+       ret = qcom_scm_bw_enable();
+       if (ret)
+               goto disable_clk;
+
+       desc.args[1] = mdata_phys;
+
+       ret = qcom_scm_call(__scm->dev, &desc, res);
+       qcom_scm_bw_disable();
+
+disable_clk:
+       qcom_scm_clk_disable();
+
+       return ret;
+}
+
 /**
  * qcom_scm_pas_init_image() - Initialize peripheral authentication service
  *                            state machine for a given peripheral, using the
@@ -612,17 +643,10 @@ EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc);
 int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
                            struct qcom_scm_pas_context *ctx)
 {
+       struct qcom_scm_res res;
        dma_addr_t mdata_phys;
        void *mdata_buf;
        int ret;
-       struct qcom_scm_desc desc = {
-               .svc = QCOM_SCM_SVC_PIL,
-               .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE,
-               .arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW),
-               .args[0] = pas_id,
-               .owner = ARM_SMCCC_OWNER_SIP,
-       };
-       struct qcom_scm_res res;
 
        /*
         * During the scm call memory protection will be enabled for the meta
@@ -643,23 +667,7 @@ int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
 
        memcpy(mdata_buf, metadata, size);
 
-       ret = qcom_scm_clk_enable();
-       if (ret)
-               goto out;
-
-       ret = qcom_scm_bw_enable();
-       if (ret)
-               goto disable_clk;
-
-       desc.args[1] = mdata_phys;
-
-       ret = qcom_scm_call(__scm->dev, &desc, &res);
-       qcom_scm_bw_disable();
-
-disable_clk:
-       qcom_scm_clk_disable();
-
-out:
+       ret = __qcom_scm_pas_init_image(pas_id, mdata_phys, &res);
        if (ret < 0 || !ctx) {
                dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
        } else if (ctx) {