--- /dev/null
+From b4a32d218d424b81a58fbd419e1114b1c1f76168 Mon Sep 17 00:00:00 2001
+From: Devi Priya <quic_devipriy@quicinc.com>
+Date: Thu, 5 Oct 2023 21:35:50 +0530
+Subject: [PATCH] arm64: dts: qcom: ipq6018: add pwm node
+
+Describe the PWM block on IPQ6018.
+
+The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add
+&pwm as child of &tcsr.
+
+Add also ipq6018 specific compatible string.
+
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Co-developed-by: Baruch Siach <baruch.siach@siklu.com>
+Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
+Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
+---
+ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++-
+ 1 file changed, 14 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+@@ -430,8 +430,21 @@
+ };
+
+ tcsr: syscon@1937000 {
+- compatible = "qcom,tcsr-ipq6018", "syscon";
++ compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
+ reg = <0x0 0x01937000 0x0 0x21000>;
++ ranges = <0x0 0x0 0x01937000 0x21000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ pwm: pwm@a010 {
++ compatible = "qcom,ipq6018-pwm";
++ reg = <0xa010 0x20>;
++ clocks = <&gcc GCC_ADSS_PWM_CLK>;
++ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
++ assigned-clock-rates = <100000000>;
++ #pwm-cells = <2>;
++ status = "disabled";
++ };
+ };
+
+ usb2: usb@70f8800 {
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
---
+ drivers/pwm/Kconfig | 12 ++
+ drivers/pwm/Makefile | 1 +
+ drivers/pwm/pwm-ipq.c | 282 ++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 295 insertions(+)
+ create mode 100644 drivers/pwm/pwm-ipq.c
+
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -282,6 +282,18 @@ config PWM_INTEL_LGM