Fix PR target/66200 on the 4.9 branch

Define TARGET_RELAXED_ORDERING and appropriate macros
for barriers.

2015-06-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/66200
	* config/aarch64/aarch64.c (TARGET_RELAXED_ORDERING): Define.

2015-06-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/66200
	* g++.dg/abi/aarch64_guard1.C: Adjust.

2015-06-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/66200
	* configure.host (host_cpu): Add aarch64 case.
	* config/cpu/aarch64/atomic_word.h: New file.

From-SVN: r224524

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0647343405e8568e4114cd90a2ce821062848a24..8e158d701ac1898aeba6f9d2c1acfb3bf540879e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       PR target/66200
+       * config/aarch64/aarch64.c (TARGET_RELAXED_ORDERING): Define.
+
 2015-06-16  Richard Biener  <rguenther@suse.de>
 
        Revert

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index c0296fa2aa2d01fb4064c989c3f56bfc75ba394c..752df4ef7aef2ca520c8ed9cfebd58871f8eb5f9 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8671,6 +8671,9 @@ aarch64_cannot_change_mode_class (enum machine_mode from,
 #undef TARGET_FIXED_CONDITION_CODE_REGS
 #define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
 
+#undef TARGET_RELAXED_ORDERING
+#define TARGET_RELAXED_ORDERING true
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-aarch64.h"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 904d256f5214bdd5801702e6c1f6742d4585f506..d97bdee5f39db611a19826ed9c6240fb1ae8ff06 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       PR target/66200
+       * g++.dg/abi/aarch64_guard1.C: Adjust.
+
 2015-06-12  Jakub Jelinek  <jakub@redhat.com>
 
        PR middle-end/63608

diff --git a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
index ca1778b87306c7d45b48c5bcb5351b5cab0a3597..e78f93cd27b89a6b6542c945dfec684fc590ff01 100644 (file)
--- a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
+++ b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
@@ -13,5 +13,4 @@ int *foo ()
 }
 
 // { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } }
-// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } }
 // { dg-final { cleanup-tree-dump "original" } }

diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 7af25cbc8d481230c7c3f701007237ab52525213..24d6b3e7c7e44c89ff6412066d0d875b6ba21816 100644 (file)
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,9 @@
+2015-06-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       PR target/66200
+       * configure.host (host_cpu): Add aarch64 case.
+       * config/cpu/aarch64/atomic_word.h: New file.
+
 2015-06-10  Jonathan Wakely  <jwakely@redhat.com>
 
        Backport from mainline

diff --git a/libstdc++-v3/config/cpu/aarch64/atomic_word.h b/libstdc++-v3/config/cpu/aarch64/atomic_word.h
new file mode 100644 (file)
index 0000000..4dbfb30
--- /dev/null
+++ b/libstdc++-v3/config/cpu/aarch64/atomic_word.h
@@ -0,0 +1,44 @@
+// Low-level type for atomic operations -*- C++ -*-
+
+// Copyright (C) 2015 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file atomic_word.h
+ *  This file is a GNU extension to the Standard C++ Library.
+ */
+
+#ifndef _GLIBCXX_ATOMIC_WORD_H
+#define _GLIBCXX_ATOMIC_WORD_H 1
+
+
+typedef int _Atomic_word;
+
+// This one prevents loads from being hoisted across the barrier;
+// in other words, this is a Load-Load acquire barrier.
+// This is necessary iff TARGET_RELAXED_ORDERING is defined in tm.h.
+#define _GLIBCXX_READ_MEM_BARRIER __atomic_thread_fence (__ATOMIC_ACQUIRE)
+
+// This one prevents stores from being sunk across the barrier; in other
+// words, a Store-Store release barrier.
+#define _GLIBCXX_WRITE_MEM_BARRIER __atomic_thread_fence (__ATOMIC_RELEASE)
+
+#endif

diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
index a5c038c6521e76c575aa98a172ec0c96fa17cc28..1328cccdd022dcf9ade1f9a855579f57a5bed84d 100644 (file)
--- a/libstdc++-v3/configure.host
+++ b/libstdc++-v3/configure.host
@@ -153,6 +153,9 @@ esac
 # Most can just use generic.
 # THIS TABLE IS SORTED.  KEEP IT THAT WAY.
 case "${host_cpu}" in
+  aarch64*)
+    atomic_word_dir=cpu/aarch64
+    ;;
   alpha*)
     atomic_word_dir=cpu/alpha
     ;;