arm64: dts: ti: Use lowercase hex

The DTS code coding style expects lowercase hex for values and unit
addresses.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20251223152535.155571-4-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
index ec9dd931fe9227df18bc6c6134bbf3a2ef79d968..34954df692a39f0b573ec362c954a6edf81da465 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
@@ -514,7 +514,7 @@
                pinctrl-single,pins = <
                        AM62PX_IOPAD(0x0120, PIN_INPUT,  0) /* (K24) MMC2_CMD  */ /* SODIMM 160, WiFi_SDIO_CMD   */
                        AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK  */ /* SODIMM 156, WiFi_SDIO_CLK   */
-                       AM62PX_IOPAD(0x011C, PIN_INPUT,  0) /* () MMC2_CLKLB   */
+                       AM62PX_IOPAD(0x011c, PIN_INPUT,  0) /* () MMC2_CLKLB   */
                        AM62PX_IOPAD(0x0114, PIN_INPUT,  0) /* (K23) MMC2_DAT0 */ /* SODIMM 162, WiFi_SDIO_DATA0 */
                        AM62PX_IOPAD(0x0110, PIN_INPUT,  0) /* (K22) MMC2_DAT1 */ /* SODIMM 164, WiFi_SDIO_DATA1 */
                        AM62PX_IOPAD(0x010c, PIN_INPUT,  0) /* (L20) MMC2_DAT2 */ /* SODIMM 166, WiFi_SDIO_DATA2 */

diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index ef719c6334fc094f01d9e8185992f2f58320e17d..4f7f6f95b02ef94a140edcef595ad8f6cc4b4113 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -283,7 +283,7 @@
                pinctrl-single,pins = <
                        AM62PX_IOPAD(0x0120, PIN_INPUT, 0) /* (K24) MMC2_CMD */
                        AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK */
-                       AM62PX_IOPAD(0x011C, PIN_INPUT, 0) /* () MMC2_CLKLB */
+                       AM62PX_IOPAD(0x011c, PIN_INPUT, 0) /* () MMC2_CLKLB */
                        AM62PX_IOPAD(0x0114, PIN_INPUT, 0) /* (K23) MMC2_DAT0 */
                        AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */
                        AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index d872cc671094f1467f7ce62fe22350e91b83f938..1b1d3970888b8a66e8c69313c07dc971e6c5d850 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -84,7 +84,7 @@
                #interrupt-cells = <3>;
                interrupt-controller;
                reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
-                     <0x00 0x01840000 0x00 0xC0000>,   /* GICR */
+                     <0x00 0x01840000 0x00 0xc0000>,   /* GICR */
                      <0x01 0x00000000 0x00 0x2000>,    /* GICC */
                      <0x01 0x00010000 0x00 0x1000>,    /* GICH */
                      <0x01 0x00020000 0x00 0x2000>;    /* GICV */
@@ -685,14 +685,14 @@
                power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
                status = "disabled";
 
-               dmas = <&main_pktdma 0xC500 15>,
-                      <&main_pktdma 0xC501 15>,
-                      <&main_pktdma 0xC502 15>,
-                      <&main_pktdma 0xC503 15>,
-                      <&main_pktdma 0xC504 15>,
-                      <&main_pktdma 0xC505 15>,
-                      <&main_pktdma 0xC506 15>,
-                      <&main_pktdma 0xC507 15>,
+               dmas = <&main_pktdma 0xc500 15>,
+                      <&main_pktdma 0xc501 15>,
+                      <&main_pktdma 0xc502 15>,
+                      <&main_pktdma 0xc503 15>,
+                      <&main_pktdma 0xc504 15>,
+                      <&main_pktdma 0xc505 15>,
+                      <&main_pktdma 0xc506 15>,
+                      <&main_pktdma 0xc507 15>,
                       <&main_pktdma 0x4500 15>;
                dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
                            "tx7", "rx";

diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
index e4afa8c0a8ca1323720fe630ed766b6f13aba3a4..793538f94942c5f08093513c6a5cf3da6c2d8ac3 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
@@ -206,8 +206,8 @@
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x0200, PIN_INPUT, 0)       /* (P2) PRG0_MDIO0_MDIO */
                        AM64X_IOPAD(0x0204, PIN_OUTPUT, 0)      /* (P3) PRG0_MDIO0_MDC */
-                       AM64X_IOPAD(0x01A8, PIN_OUTPUT, 7)      /* (V1) PRG0_PRU0_GPO18.GPIO1_18 */
-                       AM64X_IOPAD(0x01AC, PIN_OUTPUT, 7)      /* (W1) PRG0_PRU0_GPO19.GPIO1_19 */
+                       AM64X_IOPAD(0x01a8, PIN_OUTPUT, 7)      /* (V1) PRG0_PRU0_GPO18.GPIO1_18 */
+                       AM64X_IOPAD(0x01ac, PIN_OUTPUT, 7)      /* (W1) PRG0_PRU0_GPO19.GPIO1_19 */
                >;
        };
 
@@ -300,7 +300,7 @@
        main_uart1_pins_default: main-uart1-default-pins {
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x0248, PIN_INPUT, 0)       /* (D16) UART1_CTSn */
-                       AM64X_IOPAD(0x024C, PIN_OUTPUT, 0)      /* (E16) UART1_RTSn */
+                       AM64X_IOPAD(0x024c, PIN_OUTPUT, 0)      /* (E16) UART1_RTSn */
                        AM64X_IOPAD(0x0240, PIN_INPUT, 0)       /* (E15) UART1_RXD */
                        AM64X_IOPAD(0x0244, PIN_OUTPUT, 0)      /* (E14) UART1_TXD */
                >;

diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
index bea8efa3e909418c34abdeefd71ca0ea5ea61416..39306bf8eec170d588edd32adadf8a0c554f14ff 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
@@ -29,9 +29,9 @@
        main_spi1_pins_default: main-spi1-default-pins {
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x0224, PIN_INPUT, 0)       /* (C14) SPI1_CLK */
-                       AM64X_IOPAD(0x021C, PIN_OUTPUT, 0)      /* (B14) SPI1_CS0 */
+                       AM64X_IOPAD(0x021c, PIN_OUTPUT, 0)      /* (B14) SPI1_CS0 */
                        AM64X_IOPAD(0x0228, PIN_OUTPUT, 0)      /* (B15) SPI1_D0 */
-                       AM64X_IOPAD(0x022C, PIN_INPUT, 0)       /* (A15) SPI1_D1 */
+                       AM64X_IOPAD(0x022c, PIN_INPUT, 0)       /* (A15) SPI1_D1 */
                >;
        };
 

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi
index 7ff0abd7c62ed0c537add5f53e45f02e5137a95c..6c7fdaf1f2c423cb67065e969076c58c6b3248a3 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi
@@ -138,28 +138,28 @@
        d2_uart0_ctsn: d2-uart0-ctsn-pins {
                pinctrl-single,pins = <
                        /* (P1) MCU_UART0_CTSn */
-                       AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)
+                       AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 4)
                >;
        };
 
        d2_gpio: d2-gpio-pins {
                pinctrl-single,pins = <
                        /* (P5) WKUP_GPIO0_31 */
-                       AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7)
                >;
        };
 
        d2_gpio_pullup: d2-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (P5) WKUP_GPIO0_31 */
-                       AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7)
                >;
        };
 
        d2_gpio_pulldown: d2-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (P5) WKUP_GPIO0_31 */
-                       AM65X_WKUP_IOPAD(0x004C, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_WKUP_IOPAD(0x004c, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
@@ -348,42 +348,42 @@
        a2_gpio: a2-gpio-pins {
                pinctrl-single,pins = <
                        /* (L5) WKUP_GPIO0_43 */
-                       AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 7)
                >;
        };
 
        a2_gpio_pullup: a2-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (L5) WKUP_GPIO0_43 */
-                       AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 7)
                >;
        };
 
        a2_gpio_pulldown: a2-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (L5) WKUP_GPIO0_43 */
-                       AM65X_WKUP_IOPAD(0x007C, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_WKUP_IOPAD(0x007c, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
        a3_gpio: a3-gpio-pins {
                pinctrl-single,pins = <
                        /* (M5) WKUP_GPIO0_39 */
-                       AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x006c, PIN_INPUT, 7)
                >;
        };
 
        a3_gpio_pullup: a3-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (M5) WKUP_GPIO0_39 */
-                       AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x006c, PIN_INPUT, 7)
                >;
        };
 
        a3_gpio_pulldown: a3-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (M5) WKUP_GPIO0_39 */
-                       AM65X_WKUP_IOPAD(0x006C, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_WKUP_IOPAD(0x006c, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
@@ -411,21 +411,21 @@
        a5_gpio: a5-gpio-pins {
                pinctrl-single,pins = <
                        /* (N5) WKUP_GPIO0_35 */
-                       AM65X_WKUP_IOPAD(0x005C, PIN_INPUT, 7)
+                       AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 7)
                >;
        };
 
        a5_gpio_pullup: a5-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (N5) WKUP_GPIO0_35 */
-                       AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLUP, 7)
+                       AM65X_WKUP_IOPAD(0x005c, PIN_INPUT_PULLUP, 7)
                >;
        };
 
        a5_gpio_pulldown: a5-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (N5) WKUP_GPIO0_35 */
-                       AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_WKUP_IOPAD(0x005c, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
@@ -533,28 +533,28 @@
        d5_ehrpwm1_a: d5-ehrpwm1-a-pins {
                pinctrl-single,pins = <
                        /* (AF17) EHRPWM1_A */
-                       AM65X_IOPAD(0x008C, PIN_OUTPUT, 5)
+                       AM65X_IOPAD(0x008c, PIN_OUTPUT, 5)
                >;
        };
 
        d5_gpio: d5-gpio-pins {
                pinctrl-single,pins = <
                        /* (AF17) GPIO0_35 */
-                       AM65X_IOPAD(0x008C, PIN_INPUT, 7)
+                       AM65X_IOPAD(0x008c, PIN_INPUT, 7)
                >;
        };
 
        d5_gpio_pullup: d5-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (AF17) GPIO0_35 */
-                       AM65X_IOPAD(0x008C, PIN_INPUT_PULLUP, 7)
+                       AM65X_IOPAD(0x008c, PIN_INPUT_PULLUP, 7)
                >;
        };
 
        d5_gpio_pulldown: d5-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (AF17) GPIO0_35 */
-                       AM65X_IOPAD(0x008C, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_IOPAD(0x008c, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
@@ -589,84 +589,84 @@
        d7_ehrpwm3_a: d7-ehrpwm3-a-pins {
                pinctrl-single,pins = <
                        /* (AH15) EHRPWM3_A */
-                       AM65X_IOPAD(0x00AC, PIN_OUTPUT, 5)
+                       AM65X_IOPAD(0x00ac, PIN_OUTPUT, 5)
                >;
        };
 
        d7_gpio: d7-gpio-pins {
                pinctrl-single,pins = <
                        /* (AH15) GPIO0_43 */
-                       AM65X_IOPAD(0x00AC, PIN_INPUT, 7)
+                       AM65X_IOPAD(0x00ac, PIN_INPUT, 7)
                >;
        };
 
        d7_gpio_pullup: d7-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (AH15) GPIO0_43 */
-                       AM65X_IOPAD(0x00AC, PIN_INPUT_PULLUP, 7)
+                       AM65X_IOPAD(0x00ac, PIN_INPUT_PULLUP, 7)
                >;
        };
 
        d7_gpio_pulldown: d7-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (AH15) GPIO0_43 */
-                       AM65X_IOPAD(0x00AC, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_IOPAD(0x00ac, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
        d8_ehrpwm4_a: d8-ehrpwm4-a-pins {
                pinctrl-single,pins = <
                        /* (AG15) EHRPWM4_A */
-                       AM65X_IOPAD(0x00C0, PIN_OUTPUT, 5)
+                       AM65X_IOPAD(0x00c0, PIN_OUTPUT, 5)
                >;
        };
 
        d8_gpio: d8-gpio-pins {
                pinctrl-single,pins = <
                        /* (AG15) GPIO0_48 */
-                       AM65X_IOPAD(0x00C0, PIN_INPUT, 7)
+                       AM65X_IOPAD(0x00c0, PIN_INPUT, 7)
                >;
        };
 
        d8_gpio_pullup: d8-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (AG15) GPIO0_48 */
-                       AM65X_IOPAD(0x00C0, PIN_INPUT_PULLUP, 7)
+                       AM65X_IOPAD(0x00c0, PIN_INPUT_PULLUP, 7)
                >;
        };
 
        d8_gpio_pulldown: d8-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (AG15) GPIO0_48 */
-                       AM65X_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_IOPAD(0x00c0, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 
        d9_ehrpwm5_a: d9-ehrpwm5-a-pins {
                pinctrl-single,pins = <
                        /* (AD15) EHRPWM5_A */
-                       AM65X_IOPAD(0x00CC, PIN_OUTPUT, 5)
+                       AM65X_IOPAD(0x00cc, PIN_OUTPUT, 5)
                >;
        };
 
        d9_gpio: d9-gpio-pins {
                pinctrl-single,pins = <
                        /* (AD15) GPIO0_51 */
-                       AM65X_IOPAD(0x00CC, PIN_INPUT, 7)
+                       AM65X_IOPAD(0x00cc, PIN_INPUT, 7)
                >;
        };
 
        d9_gpio_pullup: d9-gpio-pullup-pins {
                pinctrl-single,pins = <
                        /* (AD15) GPIO0_51 */
-                       AM65X_IOPAD(0x00CC, PIN_INPUT_PULLUP, 7)
+                       AM65X_IOPAD(0x00cc, PIN_INPUT_PULLUP, 7)
                >;
        };
 
        d9_gpio_pulldown: d9-gpio-pulldown-pins {
                pinctrl-single,pins = <
                        /* (AD15) GPIO0_51 */
-                       AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7)
+                       AM65X_IOPAD(0x00cc, PIN_INPUT_PULLDOWN, 7)
                >;
        };
 };

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index a9a4e7401a494975a866a12aaa865ee178c09f22..f3ee73e64d69c8210bf09fe8ef3f4840c357e313 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -266,7 +266,7 @@
        minipcie_pins_default: minipcie-default-pins {
                pinctrl-single,pins = <
                        /* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */
-                       AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7)
+                       AM65X_WKUP_IOPAD(0x003c, PIN_OUTPUT, 7)
                >;
        };
 };

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 61c11dc92d9c27fc9e47123698c17118cd522be1..d6ee7b9a6b6879aac557055876eabf8916790079 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -884,7 +884,7 @@
                #address-cells = <3>;
                #size-cells = <2>;
                ranges = <0x81000000 0 0          0x0 0x10020000 0 0x00010000>,
-                        <0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
+                        <0x82000000 0 0x10030000 0x0 0x10030000 0 0x07fd0000>;
                ti,syscon-pcie-id = <&scm_conf 0x210>;
                ti,syscon-pcie-mode = <&scm_conf 0x4060>;
                bus-range = <0x0 0xff>;
@@ -905,7 +905,7 @@
                #address-cells = <3>;
                #size-cells = <2>;
                ranges = <0x81000000 0 0          0x0   0x18020000 0 0x00010000>,
-                        <0x82000000 0 0x18030000 0x0   0x18030000 0 0x07FD0000>;
+                        <0x82000000 0 0x18030000 0x0   0x18030000 0 0x07fd0000>;
                ti,syscon-pcie-id = <&scm_conf 0x210>;
                ti,syscon-pcie-mode = <&scm_conf 0x4070>;
                bus-range = <0x0 0xff>;

diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 46c58162eca0d8434bb03225aabded8d561a37bb..e0262c2743eb2d77d4b24cab12b89e46ca182533 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -190,7 +190,7 @@
                pinctrl-single,pins = <
                        AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4)  /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
                        AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
-                       AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)  /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
+                       AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 4)  /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
                        AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
                >;
                bootph-all;

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 88f202f266c656dabf7c815544c860b595df84f7..8178333fb2b4a997e5ef256dc26169785ebb2e95 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -359,15 +359,15 @@
 
        mcu_cpsw_pins_default: mcu-cpsw-default-pins {
                pinctrl-single,pins = <
-                       J721S2_WKUP_IOPAD(0x02C, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
+                       J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
                        J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
                        J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
                        J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
-                       J721S2_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
+                       J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
                        J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
                        J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
                        J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
-                       J721S2_WKUP_IOPAD(0x00C, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
+                       J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
                        J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
                        J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
                        J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
@@ -392,7 +392,7 @@
 
        mcu_mcan1_pins_default: mcu-mcan1-default-pins {
                pinctrl-single,pins = <
-                       J721S2_WKUP_IOPAD(0x06C, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
+                       J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
                        J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/
                >;
        };
@@ -422,13 +422,13 @@
        mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
                pinctrl-single,pins = <
                        J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */
-                       J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */
+                       J721S2_WKUP_IOPAD(0x05c, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */
                        J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */
                        J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */
                        J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/
-                       J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */
+                       J721S2_WKUP_IOPAD(0x0b8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */
                        J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */
-                       J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */
+                       J721S2_WKUP_IOPAD(0x11c, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */
                        J721S2_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */
                >;
        };

diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index abe2f21e0e1db5babae87ba6ac68a3f7a5eb484f..e56772a334c58b592d582569257b22d4cb42822a 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -264,24 +264,24 @@
 
        vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
                pinctrl-single,pins = <
-                       J784S4_IOPAD(0x0C4, PIN_INPUT, 7) /* (AD36) ECAP0_IN_APWM_OUT.GPIO0_49 */
+                       J784S4_IOPAD(0x0c4, PIN_INPUT, 7) /* (AD36) ECAP0_IN_APWM_OUT.GPIO0_49 */
                >;
        };
 
        rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
                pinctrl-single,pins = <
-                       J784S4_IOPAD(0x0BC, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */
-                       J784S4_IOPAD(0x06C, PIN_INPUT, 7) /* (AJ37) MCASP4_AFSX.GPIO0_27 */
-                       J784S4_IOPAD(0x0B4, PIN_INPUT, 7) /* (AL34) MCASP1_AXR4.GPIO0_45 */
-                       J784S4_IOPAD(0x0C0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */
-                       J784S4_IOPAD(0x00C, PIN_INPUT, 7) /* (AF33) MCAN13_TX.GPIO0_3 */
-                       J784S4_IOPAD(0x0B8, PIN_INPUT, 7) /* (AC34) MCASP1_ACLKX.GPIO0_46 */
+                       J784S4_IOPAD(0x0bc, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */
+                       J784S4_IOPAD(0x06c, PIN_INPUT, 7) /* (AJ37) MCASP4_AFSX.GPIO0_27 */
+                       J784S4_IOPAD(0x0b4, PIN_INPUT, 7) /* (AL34) MCASP1_AXR4.GPIO0_45 */
+                       J784S4_IOPAD(0x0c0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */
+                       J784S4_IOPAD(0x00c, PIN_INPUT, 7) /* (AF33) MCAN13_TX.GPIO0_3 */
+                       J784S4_IOPAD(0x0b8, PIN_INPUT, 7) /* (AC34) MCASP1_ACLKX.GPIO0_46 */
                        J784S4_IOPAD(0x090, PIN_INPUT, 7) /* (AC35) MCASP0_AXR8.GPIO0_36 */
-                       J784S4_IOPAD(0x0A8, PIN_INPUT, 7) /* (AF34) MCASP0_AXR14.GPIO0_42 */
-                       J784S4_IOPAD(0x0A4, PIN_INPUT, 7) /* (AJ36) MCASP0_AXR13.GPIO0_41 */
+                       J784S4_IOPAD(0x0a8, PIN_INPUT, 7) /* (AF34) MCASP0_AXR14.GPIO0_42 */
+                       J784S4_IOPAD(0x0a4, PIN_INPUT, 7) /* (AJ36) MCASP0_AXR13.GPIO0_41 */
                        J784S4_IOPAD(0x034, PIN_INPUT, 7) /* (AJ34) PMIC_WAKE0n.GPIO0_13 */
-                       J784S4_IOPAD(0x0CC, PIN_INPUT, 7) /* (AM37) SPI0_CS0.GPIO0_51 */
-                       J784S4_IOPAD(0x08C, PIN_INPUT, 7) /* (AE35) MCASP0_AXR7.GPIO0_35 */
+                       J784S4_IOPAD(0x0cc, PIN_INPUT, 7) /* (AM37) SPI0_CS0.GPIO0_51 */
+                       J784S4_IOPAD(0x08c, PIN_INPUT, 7) /* (AE35) MCASP0_AXR7.GPIO0_35 */
                        J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */
                        J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */
                >;
@@ -347,8 +347,8 @@
 
        main_mcan7_pins_default: main-mcan7-default-pins {
                pinctrl-single,pins = <
-                       J784S4_IOPAD(0x0A0, PIN_INPUT, 0) /* (AD34) MCAN7_RX */
-                       J784S4_IOPAD(0x09C, PIN_OUTPUT, 0) /* (AF35) MCAN7_TX */
+                       J784S4_IOPAD(0x0a0, PIN_INPUT, 0) /* (AD34) MCAN7_RX */
+                       J784S4_IOPAD(0x09c, PIN_OUTPUT, 0) /* (AF35) MCAN7_TX */
                >;
        };
 

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index fec1db8b133d303b716e59dba76ec3308205ce2b..dc5c02a025f8fd71b16fe009a75882e3ce4bcdbe 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -212,7 +212,7 @@
                reg = <0x0 0x40f04200 0x0 0x28>;
                #pinctrl-cells = <1>;
                pinctrl-single,register-width = <32>;
-               pinctrl-single,function-mask = <0x0000000F>;
+               pinctrl-single,function-mask = <0x0000000f>;
                status = "reserved";
        };
 
@@ -222,7 +222,7 @@
                reg = <0x0 0x40f04280 0x0 0x28>;
                #pinctrl-cells = <1>;
                pinctrl-single,register-width = <32>;
-               pinctrl-single,function-mask = <0x0000000F>;
+               pinctrl-single,function-mask = <0x0000000f>;
                status = "reserved";
        };
 

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 050776cb4df8fefb03afeb579e8c152ce600ea58..689ba2ff81f7fd44a4b1bb3e1c9690225c89d457 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -443,29 +443,29 @@
 
        rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
                pinctrl-single,pins = <
-                       J721E_IOPAD(0x01C, PIN_INPUT, 7) /* (AD22) PRG1_PRU0_GPO6.GPIO0_7 */
+                       J721E_IOPAD(0x01c, PIN_INPUT, 7) /* (AD22) PRG1_PRU0_GPO6.GPIO0_7 */
                        J721E_IOPAD(0x120, PIN_INPUT, 7) /* (AA28) PRG0_PRU1_GPO8.GPIO0_71 */
-                       J721E_IOPAD(0x14C, PIN_INPUT, 7) /* (AA29) PRG0_PRU1_GPO19.GPIO0_82 */
-                       J721E_IOPAD(0x02C, PIN_INPUT, 7) /* (AD21) PRG1_PRU0_GPO10.GPIO0_11 */
+                       J721E_IOPAD(0x14c, PIN_INPUT, 7) /* (AA29) PRG0_PRU1_GPO19.GPIO0_82 */
+                       J721E_IOPAD(0x02c, PIN_INPUT, 7) /* (AD21) PRG1_PRU0_GPO10.GPIO0_11 */
                        J721E_IOPAD(0x198, PIN_INPUT, 7) /* (V25) RGMII6_TD1.GPIO0_101 */
-                       J721E_IOPAD(0x1B0, PIN_INPUT, 7) /* (W24) RGMII6_RD1.GPIO0_107 */
-                       J721E_IOPAD(0x1A0, PIN_INPUT, 7) /* (W29) RGMII6_TXC.GPIO0_103 */
+                       J721E_IOPAD(0x1b0, PIN_INPUT, 7) /* (W24) RGMII6_RD1.GPIO0_107 */
+                       J721E_IOPAD(0x1a0, PIN_INPUT, 7) /* (W29) RGMII6_TXC.GPIO0_103 */
                        J721E_IOPAD(0x008, PIN_INPUT, 7) /* (AG22) PRG1_PRU0_GPO1.GPIO0_2 */
-                       J721E_IOPAD(0x1D0, PIN_INPUT, 7) /* (AA3) SPI0_D1.GPIO0_115 */
-                       J721E_IOPAD(0x11C, PIN_INPUT, 7) /* (AA24) PRG0_PRU1_GPO7.GPIO0_70 */
+                       J721E_IOPAD(0x1d0, PIN_INPUT, 7) /* (AA3) SPI0_D1.GPIO0_115 */
+                       J721E_IOPAD(0x11c, PIN_INPUT, 7) /* (AA24) PRG0_PRU1_GPO7.GPIO0_70 */
                        J721E_IOPAD(0x148, PIN_INPUT, 7) /* (AA26) PRG0_PRU1_GPO18.GPIO0_81 */
                        J721E_IOPAD(0x004, PIN_INPUT, 7) /* (AC23) PRG1_PRU0_GPO0.GPIO0_1 */
                        J721E_IOPAD(0x014, PIN_INPUT, 7) /* (AH23) PRG1_PRU0_GPO4.GPIO0_5 */
                        J721E_IOPAD(0x020, PIN_INPUT, 7) /* (AE20) PRG1_PRU0_GPO7.GPIO0_8 */
-                       J721E_IOPAD(0x19C, PIN_INPUT, 7) /* (W27) RGMII6_TD0.GPIO0_102 */
-                       J721E_IOPAD(0x1B4, PIN_INPUT, 7) /* (W25) RGMII6_RD0.GPIO0_108 */
+                       J721E_IOPAD(0x19c, PIN_INPUT, 7) /* (W27) RGMII6_TD0.GPIO0_102 */
+                       J721E_IOPAD(0x1b4, PIN_INPUT, 7) /* (W25) RGMII6_RD0.GPIO0_108 */
                        J721E_IOPAD(0x188, PIN_INPUT, 7) /* (Y28) RGMII6_TX_CTL.GPIO0_97 */
-                       J721E_IOPAD(0x00C, PIN_INPUT, 7) /* (AF22) PRG1_PRU0_GPO2.GPIO0_3 */
+                       J721E_IOPAD(0x00c, PIN_INPUT, 7) /* (AF22) PRG1_PRU0_GPO2.GPIO0_3 */
                        J721E_IOPAD(0x010, PIN_INPUT, 7) /* (AJ23) PRG1_PRU0_GPO3.GPIO0_4 */
                        J721E_IOPAD(0x178, PIN_INPUT, 7) /* (U27) RGMII5_RD3.GPIO0_93 */
-                       J721E_IOPAD(0x17C, PIN_INPUT, 7) /* (U24) RGMII5_RD2.GPIO0_94 */
+                       J721E_IOPAD(0x17c, PIN_INPUT, 7) /* (U24) RGMII5_RD2.GPIO0_94 */
                        J721E_IOPAD(0x190, PIN_INPUT, 7) /* (W23) RGMII6_TD3.GPIO0_99 */
-                       J721E_IOPAD(0x18C, PIN_INPUT, 7) /* (V23) RGMII6_RX_CTL.GPIO0_98 */
+                       J721E_IOPAD(0x18c, PIN_INPUT, 7) /* (V23) RGMII6_RX_CTL.GPIO0_98 */
                >;
        };
 

diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
index b6e22c24295104d4e4449d36116e014cd446b9ed..ba109cc5b2bcc65985f7764bc845b1ed60f3e1f9 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
@@ -41,7 +41,7 @@
                        reg = <0x000>;
                        device_type = "cpu";
                        enable-method = "psci";
-                       i-cache-size = <0xC000>;
+                       i-cache-size = <0xc000>;
                        i-cache-line-size = <64>;
                        i-cache-sets = <256>;
                        d-cache-size = <0x8000>;
@@ -55,7 +55,7 @@
                        reg = <0x001>;
                        device_type = "cpu";
                        enable-method = "psci";
-                       i-cache-size = <0xC000>;
+                       i-cache-size = <0xc000>;
                        i-cache-line-size = <64>;
                        i-cache-sets = <256>;
                        d-cache-size = <0x8000>;

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 2a7f9c519735ae256e946a44066ee7dafafffb14..fd01437726ab4ec98ee03b3d81a907550fcba131 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -87,7 +87,7 @@
        wkup_pmx1: pinctrl@4301c038 {
                compatible = "pinctrl-single";
                /* Proxy 0 addressing */
-               reg = <0x00 0x4301c038 0x00 0x02C>;
+               reg = <0x00 0x4301c038 0x00 0x02c>;
                #pinctrl-cells = <1>;
                pinctrl-single,register-width = <32>;
                pinctrl-single,function-mask = <0xffffffff>;

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index 7baf5764862b1bad8a956a2483ef83e03176d9a6..e66330c71593adac9a3e14e4d73d2749c7902d20 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -436,7 +436,7 @@
        mcu_mcan1_pins_default: mcu-mcan1-default-pins {
                pinctrl-single,pins = <
                        J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */
-                       J722S_MCU_IOPAD(0x03C, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */
+                       J722S_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */
                >;
        };
 

diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
index cdc8570e54b29d068aab4e2788a8b36dfa539cfa..c8b634c346779039bb625016c080f09ae1f8cf1a 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
@@ -162,7 +162,7 @@
                         <0x00 0x0fd20200 0x00 0x0fd20200 0x00 0x00000200>, /* JPEGENC0_CORE_MMU */
                         <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */
                         <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
-                        <0x00 0x301C0000 0x00 0x301C0000 0x00 0x00001000>, /* DPHY-TX */
+                        <0x00 0x301c0000 0x00 0x301c0000 0x00 0x00001000>, /* DPHY-TX */
                         <0x00 0x30101000 0x00 0x30101000 0x00 0x00080100>, /* CSI window */
                         <0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>, /* DSS */
                         <0x00 0x30210000 0x00 0x30210000 0x00 0x00010000>, /* VPU */

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index e5073557773711b28a6049d0c27958c1147c1f39..ff3a85cbc524a906a7cb85e3b80764f3431c7b13 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -509,10 +509,10 @@
                        J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
                        J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
                        J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
-                       J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
+                       J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
                        J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
                        J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
-                       J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
+                       J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
                >;
        };
 };