arm: dts: meson-gx-u-boot: add binman configuration for U-Boot SPL

Add binman configuration to meson-gx-u-boot.dtsi to automate building
bootable images using amlimage.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20251126-spl-gx-v5-7-6cbffb2451ca@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi
index 9e0620f395e81048273690af4cee4b196ee7b0a7..cef7f90fcd4bf30d0279a7eaaf2b2ac06d98ac5f 100644 (file)
--- a/arch/arm/dts/meson-gx-u-boot.dtsi
+++ b/arch/arm/dts/meson-gx-u-boot.dtsi
@@ -2,6 +2,7 @@
 /*
  * Copyright (c) 2019 BayLibre, SAS.
  * Author: Maxime Jourdan <mjourdan@baylibre.com>
+ * Copyright (c) 2023 Ferass El Hafidi <funderscore@postmarketos.org>
  */
 
 / {
@@ -15,6 +16,12 @@
        soc {
                bootph-all;
        };
+
+#if defined(CONFIG_BINMAN)
+       binman: binman {
+               multiple-images;
+       };
+#endif
 };
 
 &vpu {
@@ -30,3 +37,121 @@
              <0x0 0xc883c000 0x0 0x1000>;
        reg-names = "hdmitx", "hhi";
 };
+
+#if defined(CONFIG_BINMAN)
+/* binman configuration on GXBB and GXL */
+
+&binman {
+       u-boot-amlogic {
+               filename = "u-boot-meson-with-spl.bin";
+               pad-byte = <0xff>;
+
+               mkimage {
+                       filename = "spl/u-boot-spl-signed.bin";
+                       /* args are per-SoC, and defined in meson-(gxbb/gxl)-u-boot.dtsi */
+
+                       u-boot-spl {
+                       };
+               };
+
+               fit: fit {
+                       description = "ATF and U-Boot images";
+                       #address-cells = <1>;
+                       fit,fdt-list = "of-list";
+                       fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+                       fit,align = <512>;
+                       offset = <CONFIG_SPL_PAD_TO>;
+
+                       images {
+                               u-boot {
+                                       description = "U-Boot";
+                                       type = "standalone";
+                                       os = "u-boot";
+                                       arch = "arm64";
+                                       compression = "none";
+                                       load = <CONFIG_TEXT_BASE>;
+                                       entry = <CONFIG_TEXT_BASE>;
+
+                                       u-boot-nodtb {
+                                       };
+
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE) && CONFIG_IS_ENABLED(SHA256)
+                                       hash {
+                                               algo = "sha256";
+                                       };
+#endif
+                               };
+
+                               atf {
+                                       description = "ARM Trusted Firmware";
+                                       type = "firmware";
+                                       os = "arm-trusted-firmware";
+                                       arch = "arm64";
+                                       compression = "none";
+                                       /*
+                                        * load and entry are SoC-specific, and thus
+                                        * defined in meson-(gxbb/gxl)-u-boot.dtsi
+                                        */
+
+                                       atf-bl31 {
+                                               filename = "bl31.bin";
+                                       };
+
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE) && CONFIG_IS_ENABLED(SHA256)
+                                       hash {
+                                               algo = "sha256";
+                                       };
+#endif
+                               };
+
+                               scp {
+                                       description = "SCP BL30 Firmware";
+                                       type = "scp";
+                                       arch = "arm"; /* The Cortex-M core is used as SCP */
+                                       compression = "none";
+                                       /*
+                                        * On GXBB the base address of the SCP firmware doesn't matter as SPL will
+                                        * send the firmware to the SCP anyway, and can get the base address from the
+                                        * FIT. On GXL it matters, as BL31 is supposed to send the firmware, so set the
+                                        * base address to what GXL BL2 would load the binary to.
+                                        */
+                                       load = <0x13c0000>;
+
+                                       scp {
+                                               filename = "scp.bin";
+                                       };
+                                       hash {
+                                               /*
+                                                * The hash is used by the SCP and passed to it
+                                                * by U-Boot SPL.
+                                                */
+                                               algo = "sha256";
+                                       };
+                               };
+
+                               @fdt-SEQ {
+                                       description = "NAME";
+                                       type = "flat_dt";
+                                       compression = "none";
+
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE) && CONFIG_IS_ENABLED(SHA256)
+                                       hash {
+                                               algo = "sha256";
+                                       };
+#endif
+                               };
+
+                       };
+                       configurations {
+                               default = "@config-DEFAULT-SEQ";
+                               @config-SEQ {
+                                       description = "NAME.dtb";
+                                       fdt = "fdt-SEQ";
+                                       firmware = "atf";
+                                       loadables = "scp", "u-boot";
+                               };
+                       };
+               };
+       };
+};
+#endif

diff --git a/arch/arm/dts/meson-gxbb-u-boot.dtsi b/arch/arm/dts/meson-gxbb-u-boot.dtsi
index c35158d7e9ee15be16cda93572e296e4e0e46eac..a4dc1c136f1ecefbc92ca67c0196ebbb43b63d1e 100644 (file)
--- a/arch/arm/dts/meson-gxbb-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-u-boot.dtsi
@@ -5,3 +5,23 @@
  */
 
 #include "meson-gx-u-boot.dtsi"
+
+#if defined(CONFIG_BINMAN)
+/* GXBB-specific binman configuration */
+&binman {
+       u-boot-amlogic {
+               mkimage {
+                       args = "-n", "gxbb", "-T", "amlimage";
+               };
+
+               fit: fit {
+                       images {
+                               atf {
+                                       load = <0x10100000>;
+                                       entry = <0x10100000>;
+                               };
+                       };
+               };
+       };
+};
+#endif

diff --git a/arch/arm/dts/meson-gxl-u-boot.dtsi b/arch/arm/dts/meson-gxl-u-boot.dtsi
index c35158d7e9ee15be16cda93572e296e4e0e46eac..3f1bbc1038fdfd8a59649a1c9e36cdeaa15d2189 100644 (file)
--- a/arch/arm/dts/meson-gxl-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxl-u-boot.dtsi
@@ -5,3 +5,23 @@
  */
 
 #include "meson-gx-u-boot.dtsi"
+
+#if defined(CONFIG_BINMAN)
+/* GXL-specific binman configuration */
+&binman {
+       u-boot-amlogic {
+               mkimage {
+                       args = "-n", "gxl", "-T", "amlimage";
+               };
+
+               fit: fit {
+                       images {
+                               atf {
+                                       load = <0x5100000>;
+                                       entry = <0x5100000>;
+                               };
+                       };
+               };
+       };
+};
+#endif