drm/amdgpu: Correct mmhub system aperture settings for A + A

Disable AGP and FB apeture on all available MMHUB
instances when vmid0 page table is enabled

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
index a72770e3d0e997d354db9507c82333c2859ab3da..60bba87e42a01efb29e35dc33d9a0db99bc9d7d4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
@@ -131,7 +131,7 @@ static void mmhub_v4_2_0_setup_vm_pt_regs(struct amdgpu_device *adev,
 static void mmhub_v4_2_0_mid_init_gart_aperture_regs(struct amdgpu_device *adev,
                                                     uint32_t mid_mask)
 {
-       uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
+       uint64_t pt_base;
        int i;
 
        if (adev->gmc.pdb0_bo)
@@ -190,41 +190,74 @@ static void mmhub_v4_2_0_mid_init_system_aperture_regs(struct amdgpu_device *ade
                return;
 
        for_each_inst(i, mid_mask) {
-               /* Program the AGP BAR */
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_BASE_LO32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_BASE_HI32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_BOT_LO32,
-                            lower_32_bits(adev->gmc.agp_start >> 24));
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_BOT_HI32,
-                            upper_32_bits(adev->gmc.agp_start >> 24));
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_TOP_LO32,
-                            lower_32_bits(adev->gmc.agp_end >> 24));
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_TOP_HI32,
-                            upper_32_bits(adev->gmc.agp_end >> 24));
+               if (adev->gmc.pdb0_bo) {
+                       /* Disable agp and system aperture
+                        * when vmid0 page table is enabled */
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_FB_LOCATION_TOP_LO32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_FB_LOCATION_TOP_HI32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_FB_LOCATION_BASE_LO32,
+                                    0xFFFFFFFF);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_FB_LOCATION_BASE_HI32, 1);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_TOP_LO32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_TOP_HI32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_BOT_LO32,
+                                    0xFFFFFFFF);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_BOT_HI32, 1);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_LO32,
+                                    0xFFFFFFFF);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_HI32,
+                                    0x7F);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_LO32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_HI32, 0);
+               } else {
+                       /* Program the AGP BAR */
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_BASE_LO32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_BASE_HI32, 0);
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_BOT_LO32,
+                                    lower_32_bits(adev->gmc.agp_start >> 24));
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_BOT_HI32,
+                                    upper_32_bits(adev->gmc.agp_start >> 24));
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_TOP_LO32,
+                                    lower_32_bits(adev->gmc.agp_end >> 24));
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_AGP_TOP_HI32,
+                                    upper_32_bits(adev->gmc.agp_end >> 24));
 
-               /* Program the system aperture low logical page number. */
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_LO32,
-                            lower_32_bits(min(adev->gmc.fb_start,
-                                              adev->gmc.agp_start) >> 18));
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_HI32,
-                            upper_32_bits(min(adev->gmc.fb_start,
-                                              adev->gmc.agp_start) >> 18));
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_LO32,
-                            lower_32_bits(max(adev->gmc.fb_end,
-                                              adev->gmc.agp_end) >> 18));
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_HI32,
-                            upper_32_bits(max(adev->gmc.fb_end,
-                                              adev->gmc.agp_end) >> 18));
+                       /* Program the system aperture low logical page number. */
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_LO32,
+                                    lower_32_bits(min(adev->gmc.fb_start,
+                                                  adev->gmc.agp_start) >> 18));
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_HI32,
+                                    upper_32_bits(min(adev->gmc.fb_start,
+                                                  adev->gmc.agp_start) >> 18));
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_LO32,
+                                    lower_32_bits(max(adev->gmc.fb_end,
+                                                  adev->gmc.agp_end) >> 18));
+                       WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
+                                    regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_HI32,
+                                    upper_32_bits(max(adev->gmc.fb_end,
+                                                  adev->gmc.agp_end) >> 18));
+               }
 
                /* Set default page address. */
                value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
@@ -252,38 +285,6 @@ static void mmhub_v4_2_0_mid_init_system_aperture_regs(struct amdgpu_device *ade
                WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
                             regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);
        }
-
-       /* In the case squeezing vram into GART aperture, we don't use
-        * FB aperture and AGP aperture. Disable them.
-        */
-       if (adev->gmc.pdb0_bo) {
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_FB_LOCATION_TOP_LO32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_FB_LOCATION_TOP_HI32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_FB_LOCATION_BASE_LO32, 0xFFFFFFFF);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_FB_LOCATION_BASE_HI32, 1);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_TOP_LO32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_TOP_HI32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_BOT_LO32, 0xFFFFFFFF);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_AGP_BOT_HI32, 1);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_LO32,
-                            0xFFFFFFFF);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_HI32,
-                            0x7F);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_LO32, 0);
-               WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
-                            regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_HI32, 0);
-       }
 }
 
 static void mmhub_v4_2_0_mid_init_tlb_regs(struct amdgpu_device *adev,