]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
IB/mlx5: Push pdn above mlx5r_umr_update_xlt()
authorJason Gunthorpe <jgg@nvidia.com>
Thu, 4 Jun 2026 01:27:47 +0000 (22:27 -0300)
committerJason Gunthorpe <jgg@nvidia.com>
Mon, 8 Jun 2026 17:32:43 +0000 (14:32 -0300)
Keep pushing the pdn higher to remove more places touching mr->pd:

- XLT combinations that don't use PDN can just pass 0
- Use local pd values instead of mr->pd
- Implicit MR does not have inplace rereg, so the mr->pd is safe

Link: https://patch.msgid.link/r/8-v1-29ebd2c229b5+fd5-ib_mr_pd_jgg@nvidia.com
Assisted-by: Codex:gpt-5-5
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/mlx5/odp.c
drivers/infiniband/hw/mlx5/umr.c
drivers/infiniband/hw/mlx5/umr.h

index d7feb49b28fbacece0692f884ba7b8a27d84a75e..50804b4c90e47777bf6a1c708aa096bd49892ea6 100644 (file)
@@ -221,7 +221,8 @@ static void free_implicit_child_mr_work(struct work_struct *work)
        mutex_lock(&odp_imr->umem_mutex);
        mlx5r_umr_update_xlt(mr->parent,
                             ib_umem_start(odp) >> mlx5_imr_mtt_shift, 1, 0,
-                            MLX5_IB_UPD_XLT_INDIRECT | MLX5_IB_UPD_XLT_ATOMIC);
+                            MLX5_IB_UPD_XLT_INDIRECT | MLX5_IB_UPD_XLT_ATOMIC,
+                            0);
        mutex_unlock(&odp_imr->umem_mutex);
        mlx5_ib_dereg_mr(&mr->ibmr, NULL);
 
@@ -318,10 +319,12 @@ static bool mlx5_ib_invalidate_range(struct mmu_interval_notifier *mni,
                        u64 umr_offset = idx & umr_block_mask;
 
                        if (in_block && umr_offset == 0) {
-                               mlx5r_umr_update_xlt(mr, blk_start_idx,
-                                                    idx - blk_start_idx, 0,
-                                                    MLX5_IB_UPD_XLT_ZAP |
-                                                    MLX5_IB_UPD_XLT_ATOMIC);
+                               mlx5r_umr_update_xlt(
+                                       mr, blk_start_idx, idx - blk_start_idx,
+                                       0,
+                                       MLX5_IB_UPD_XLT_ZAP |
+                                               MLX5_IB_UPD_XLT_ATOMIC,
+                                       0);
                                in_block = 0;
                                /* Count page invalidations */
                                invalidations += idx - blk_start_idx + 1;
@@ -329,10 +332,9 @@ static bool mlx5_ib_invalidate_range(struct mmu_interval_notifier *mni,
                }
        }
        if (in_block) {
-               mlx5r_umr_update_xlt(mr, blk_start_idx,
-                                    idx - blk_start_idx + 1, 0,
-                                    MLX5_IB_UPD_XLT_ZAP |
-                                    MLX5_IB_UPD_XLT_ATOMIC);
+               mlx5r_umr_update_xlt(
+                       mr, blk_start_idx, idx - blk_start_idx + 1, 0,
+                       MLX5_IB_UPD_XLT_ZAP | MLX5_IB_UPD_XLT_ATOMIC, 0);
                /* Count page invalidations */
                invalidations += idx - blk_start_idx + 1;
        }
@@ -502,11 +504,9 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
         */
        refcount_set(&mr->mmkey.usecount, 2);
 
-       err = mlx5r_umr_update_xlt(mr, 0,
-                                  mlx5_imr_mtt_entries,
-                                  PAGE_SHIFT,
-                                  MLX5_IB_UPD_XLT_ZAP |
-                                  MLX5_IB_UPD_XLT_ENABLE);
+       err = mlx5r_umr_update_xlt(mr, 0, mlx5_imr_mtt_entries, PAGE_SHIFT,
+                                  MLX5_IB_UPD_XLT_ZAP | MLX5_IB_UPD_XLT_ENABLE,
+                                  to_mpd(mr->ibmr.pd)->pdn);
        if (err) {
                ret = ERR_PTR(err);
                goto out_mr;
@@ -647,7 +647,8 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd,
                                   mlx5_imr_ksm_page_shift,
                                   MLX5_IB_UPD_XLT_INDIRECT |
                                   MLX5_IB_UPD_XLT_ZAP |
-                                  MLX5_IB_UPD_XLT_ENABLE);
+                                  MLX5_IB_UPD_XLT_ENABLE,
+                                  pd->pdn);
        if (err)
                goto out_mr;
 
@@ -720,7 +721,8 @@ static int pagefault_real_mr(struct mlx5_ib_mr *mr, struct ib_umem_odp *odp,
         * No need to check whether the MTTs really belong to this MR, since
         * ib_umem_odp_map_dma_and_lock already checks this.
         */
-       ret = mlx5r_umr_update_xlt(mr, start_idx, np, page_shift, xlt_flags);
+       ret = mlx5r_umr_update_xlt(mr, start_idx, np, page_shift, xlt_flags,
+                                  mlx5_mr_pdn(mr));
        mutex_unlock(&odp->umem_mutex);
 
        if (ret < 0) {
@@ -818,9 +820,9 @@ out:
         * next pagefault handler will see the new information.
         */
        mutex_lock(&odp_imr->umem_mutex);
-       err = mlx5r_umr_update_xlt(imr, upd_start_idx, upd_len, 0,
-                                  MLX5_IB_UPD_XLT_INDIRECT |
-                                         MLX5_IB_UPD_XLT_ATOMIC);
+       err = mlx5r_umr_update_xlt(
+               imr, upd_start_idx, upd_len, 0,
+               MLX5_IB_UPD_XLT_INDIRECT | MLX5_IB_UPD_XLT_ATOMIC, 0);
        mutex_unlock(&odp_imr->umem_mutex);
        if (err) {
                mlx5_ib_err(mr_to_mdev(imr), "Failed to update PAS\n");
index f3f428f5e1b6636862dc066a239b6667d0b38e23..48cae5cc1c1be2c8a45070f70cd61e598ef309bf 100644 (file)
@@ -846,7 +846,7 @@ static bool umr_can_use_indirect_mkey(struct mlx5_ib_dev *dev)
 }
 
 int mlx5r_umr_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
-                        int page_shift, int flags)
+                        int page_shift, int flags, u32 pdn)
 {
        int desc_size = (flags & MLX5_IB_UPD_XLT_INDIRECT)
                               ? sizeof(struct mlx5_klm)
@@ -862,7 +862,6 @@ int mlx5r_umr_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
        size_t orig_sg_length;
        size_t pages_iter;
        struct ib_sge sg;
-       u32 pdn = mlx5_mr_pdn(mr);
        int err = 0;
        void *xlt;
 
index 99192ec67957c72c60e251279333766997814de9..bda7123781a953abbdea578d960ae7c870be66b2 100644 (file)
@@ -104,7 +104,7 @@ int mlx5r_umr_update_mr_pas_range(struct mlx5_ib_mr *mr, unsigned int flags,
                                  u32 pdn, size_t start_block, size_t nblocks);
 int mlx5r_umr_update_mr_pas(struct mlx5_ib_mr *mr, unsigned int flags, u32 pdn);
 int mlx5r_umr_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
-                        int page_shift, int flags);
+                        int page_shift, int flags, u32 pdn);
 int mlx5r_umr_update_mr_page_shift(struct mlx5_ib_mr *mr,
                                   unsigned int page_shift);
 int mlx5r_umr_dmabuf_update_pgsz(struct mlx5_ib_mr *mr, u32 xlt_flags, u32 pdn,