return -EINVAL;
}
+static int w25n0xjw_set_sr4_hs(struct spinand_device *spinand, bool enable)
+{
+ int ret;
+ u8 sr4;
+
+ ret = spinand_read_reg_op(spinand, W25N0XJW_SR4, &sr4);
+ if (ret)
+ return ret;
+
+ if (enable)
+ sr4 |= W25N0XJW_SR4_HS;
+ else
+ sr4 &= ~W25N0XJW_SR4_HS;
+
+ return spinand_write_reg_op(spinand, W25N0XJW_SR4, sr4);
+}
+
static int w25n0xjw_hs_cfg(struct spinand_device *spinand,
enum spinand_bus_interface iface)
{
const struct spi_mem_op *op;
bool hs;
- u8 sr4;
- int ret;
if (iface != SSDR)
return -EOPNOTSUPP;
else
hs = true;
- ret = spinand_read_reg_op(spinand, W25N0XJW_SR4, &sr4);
- if (ret)
- return ret;
-
- if (hs)
- sr4 |= W25N0XJW_SR4_HS;
- else
- sr4 &= ~W25N0XJW_SR4_HS;
-
- ret = spinand_write_reg_op(spinand, W25N0XJW_SR4, sr4);
- if (ret)
- return ret;
-
- return 0;
+ return w25n0xjw_set_sr4_hs(spinand, hs);
}
static int w35n0xjw_write_vcr(struct spinand_device *spinand, u8 reg, u8 val)