arm64: dts: qcom: sdm845: Use RPMH_CE_CLK macro directly

[ Upstream commit eed1d9b6e36b06faa53c6dc74134ec21b1336d94 ]

In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries
to support crypto engine."), we decided to use the value indicated
by constant RPMH_CE_CLK rather than using it directly.

Now that the same RPMH clock value might be used for other
SoCs (in addition to sdm845), let's use the constant
RPMH_CE_CLK to make sure that this dtsi is compatible with the
other qcom ones.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Link: https://lore.kernel.org/r/20210519143700.27392-8-bhupesh.sharma@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0a86fe71a66d19d4d0e422fef1153527122e99b7..2ec4be930fd6f2fae6ab53f1eda09c6d5d5ba420 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2316,7 +2316,7 @@
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0 0x01dc4000 0 0x24000>;
                        interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&rpmhcc 15>;
+                       clocks = <&rpmhcc RPMH_CE_CLK>;
                        clock-names = "bam_clk";
                        #dma-cells = <1>;
                        qcom,ee = <0>;
@@ -2332,7 +2332,7 @@
                        reg = <0 0x01dfa000 0 0x6000>;
                        clocks = <&gcc GCC_CE1_AHB_CLK>,
                                 <&gcc GCC_CE1_AHB_CLK>,
-                                <&rpmhcc 15>;
+                                <&rpmhcc RPMH_CE_CLK>;
                        clock-names = "iface", "bus", "core";
                        dmas = <&cryptobam 6>, <&cryptobam 7>;
                        dma-names = "rx", "tx";