Fix some ppc 32/64-bit issues.

From-SVN: r38347

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bf3fcd98bc4cc6b9a776c7cf5e23a96b560faddb..53de662c547b246eba505e52a4c9b31a5a1efa4a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2000-12-18  David Edelsohn  <edelsohn@gnu.org>
+
+       * rs6000.c (and64_operand): Use logical_u_operand.
+       (first_reg_to_save): Don't save fixed or call-used registers
+       except PIC_OFFSET_TABLE_REGNUM when -fpic even though it is fixed.
+       * rs6000.md (anddi3): Prefer rldic? over andis instruction.
+
 2000-12-18  Zack Weinberg <zackw@Stanford.EDU>:
 
        * Makefile.in: Rename cpp to cpp0, tradcpp to tradcpp0, and

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 51291d492caa2b91edbbe16b6001d9f46c696bab..65c8d4c108d82de817e6275279e573124e172de0 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1127,7 +1127,7 @@ and64_operand (op, mode)
   if (fixed_regs[68])  /* CR0 not available, don't do andi./andis. */
     return (gpc_reg_operand (op, mode) || mask64_operand (op, mode));
 
-  return (logical_operand (op, mode) || mask64_operand (op, mode));
+  return (logical_u_operand (op, mode) || mask64_operand (op, mode));
 }
 
 /* Return 1 if the operand is either a non-special register or a
@@ -3406,7 +3406,11 @@ first_reg_to_save ()
 
   /* Find lowest numbered live register.  */
   for (first_reg = 13; first_reg <= 31; first_reg++)
-    if (regs_ever_live[first_reg])
+    if (regs_ever_live[first_reg]
+       && (! call_used_regs[first_reg]
+           || (first_reg == PIC_OFFSET_TABLE_REGNUM
+               && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
+               && flag_pic == 1)))
       break;
 
   if (profile_flag)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 0211728fa19faf890652ccec5680057ca688054d..3a0fa7c920c1133b0838dd37ed3aa1115f2f61f2 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5463,31 +5463,31 @@
 (define_insn "*anddi3_internal2"
   [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,x")
        (compare:CC (and:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r")
-                           (match_operand:DI 2 "and64_operand" "r,K,J,S"))
+                           (match_operand:DI 2 "and64_operand" "r,S,K,J"))
                    (const_int 0)))
    (clobber (match_scratch:DI 3 "=r,r,r,r"))]
   "TARGET_POWERPC64"
   "@
    and. %3,%1,%2
+   rldic%B2. %3,%1,0,%S2
    andi. %3,%1,%b2
-   andis. %3,%1,%u2
-   rldic%B2. %3,%1,0,%S2"
-  [(set_attr "type" "compare,compare,compare,delayed_compare")])
+   andis. %3,%1,%u2"
+  [(set_attr "type" "compare,delayed_compare,compare,compare")])
 
 (define_insn "*anddi3_internal3"
   [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,x,x")
        (compare:CC (and:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r")
-                           (match_operand:DI 2 "and64_operand" "r,K,J,S"))
+                           (match_operand:DI 2 "and64_operand" "r,S,K,J"))
                    (const_int 0)))
    (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")
        (and:DI (match_dup 1) (match_dup 2)))]
   "TARGET_POWERPC64"
   "@
    and. %0,%1,%2
+   rldic%B2. %0,%1,0,%S2
    andi. %0,%1,%b2
-   andis. %0,%1,%u2
-   rldic%B2. %0,%1,0,%S2"
-  [(set_attr "type" "compare,compare,compare,delayed_compare")])
+   andis. %0,%1,%u2"
+  [(set_attr "type" "compare,delayed_compare,compare,compare")])
 
 (define_expand "iordi3"
   [(set (match_operand:DI 0 "gpc_reg_operand" "")
@@ -6774,9 +6774,12 @@
   [(set (match_dup 0)
        (match_dup 2))
    (set (match_dup 0)
-       (zero_extend:DI (subreg:SI (match_dup 0) 0)))]
+       (zero_extend:DI (match_dup 3)))]
   "
-{ operands[2] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); }")
+{ 
+  operands[2] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); 
+  operands[3] = gen_lowpart_common (SImode, operands[0]);
+}")
 
 (define_split
   [(set (match_operand:DI 0 "gpc_reg_operand" "")