Fixes BZ#379504.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16340
$(AM_CFLAGS_PSO_BASE)
AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @FLAG_MIPS64@
-AM_CFLAGS_TILEGX_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
-AM_CFLAGS_PSO_TILEGX_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) $(AM_CFLAGS_PSO_BASE)
-
AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@
AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \
$(AM_CFLAGS_BASE) -fomit-frame-pointer \
PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
-PRELOAD_LDFLAGS_TILEGX_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@
PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@
-static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \
@FLAG_M64@
-TOOL_LDFLAGS_TILEGX_LINUX = \
- $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
-
TOOL_LDFLAGS_X86_SOLARIS = \
$(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@
LIBREPLACEMALLOC_MIPS64_LINUX = \
$(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a
-LIBREPLACEMALLOC_TILEGX_LINUX = \
- $(top_builddir)/coregrind/libreplacemalloc_toolpreload-tilegx-linux.a
-
LIBREPLACEMALLOC_X86_SOLARIS = \
$(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a
$(LIBREPLACEMALLOC_MIPS64_LINUX) \
-Wl,--no-whole-archive
-LIBREPLACEMALLOC_LDFLAGS_TILEGX_LINUX = \
- -Wl,--whole-archive \
- $(LIBREPLACEMALLOC_TILEGX_LINUX) \
- -Wl,--no-whole-archive
-
LIBREPLACEMALLOC_LDFLAGS_X86_SOLARIS = \
-Wl,--whole-archive \
$(LIBREPLACEMALLOC_X86_SOLARIS) \
pub/libvex_guest_s390x.h \
pub/libvex_guest_mips32.h \
pub/libvex_guest_mips64.h \
- pub/libvex_guest_tilegx.h \
pub/libvex_s390x_common.h \
pub/libvex_ir.h \
pub/libvex_trc_values.h
priv/guest_arm64_defs.h \
priv/guest_s390_defs.h \
priv/guest_mips_defs.h \
- priv/guest_tilegx_defs.h \
priv/host_generic_regs.h \
priv/host_generic_simd64.h \
priv/host_generic_simd128.h \
priv/host_arm_defs.h \
priv/host_arm64_defs.h \
priv/host_s390_defs.h \
- priv/host_tilegx_defs.h \
priv/s390_disasm.h \
priv/s390_defs.h \
- priv/host_mips_defs.h \
- priv/tilegx_disasm.h
+ priv/host_mips_defs.h
BUILT_SOURCES = pub/libvex_guest_offsets.h
CLEANFILES = pub/libvex_guest_offsets.h
pub/libvex_guest_arm64.h \
pub/libvex_guest_s390x.h \
pub/libvex_guest_mips32.h \
- pub/libvex_guest_mips64.h \
- pub/libvex_guest_tilegx.h
+ pub/libvex_guest_mips64.h
rm -f auxprogs/genoffsets.s
$(mkdir_p) auxprogs pub
$(CC) $(CFLAGS_FOR_GENOFFSETS) \
priv/guest_s390_toIR.c \
priv/guest_mips_helpers.c \
priv/guest_mips_toIR.c \
- priv/guest_tilegx_helpers.c \
- priv/guest_tilegx_toIR.c \
priv/host_generic_regs.c \
priv/host_generic_simd64.c \
priv/host_generic_simd128.c \
priv/host_s390_isel.c \
priv/s390_disasm.c \
priv/host_mips_defs.c \
- priv/host_mips_isel.c \
- priv/host_tilegx_defs.c \
- priv/host_tilegx_isel.c \
- priv/tilegx_disasm.c
+ priv/host_mips_isel.c
LIBVEXMULTIARCH_SOURCES = priv/multiarch_main_main.c
MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android,
MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris, X86/MacOSX
10.10 and AMD64/MacOSX 10.10. There is also preliminary support for
-X86/MacOSX 10.11/12, AMD64/MacOSX 10.11/12 and TILEGX/Linux.
+X86/MacOSX 10.11/12, and AMD64/MacOSX 10.11/12.
* The 'xtree concept' was added in 3.13:
An xtree is a tree of stacktraces with data associated to the stacktraces.
is handled like CLONE_VFORK (so removing CLONE_VM flag).
Applications that depends on CLONE_VM exact semantic will (still) not work.
+ - TileGX/Linux port was removed because the platform is essientially dead.
+
* ==================== TOOL CHANGES ====================
* Memcheck:
(task_register_dyld_shared_cache_image_info)
379390 unhandled syscall: mach:70 (host_create_mach_voucher_trap)
379473 MIPS: add support for rdhwr cycle counter register
+379504 remove TileGX/Linux port
Release 3.12.0 (20 October 2016)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*D1c = (cache_t) { 65536, 2, 64 };
*LLc = (cache_t) { 262144, 8, 64 };
-#elif defined(VGA_tilegx)
-
- // Set caches to default for Tilegx.
- *I1c = (cache_t) { 0x8000, 2, 64 };
- *D1c = (cache_t) { 0x8000, 2, 64 };
- *LLc = (cache_t) { 0x40000, 8, 64 };
-
#else
#error "Unknown arch"
# define N_IADDR_LO_ZERO_BITS 0
#elif defined(VGA_s390x) || defined(VGA_arm)
# define N_IADDR_LO_ZERO_BITS 1
-#elif defined(VGA_tilegx)
-# define N_IADDR_LO_ZERO_BITS 3
#else
# error "Unsupported architecture"
#endif
ARCH_MAX="mips64"
;;
- tilegx)
- AC_MSG_RESULT([ok (${host_cpu})])
- ARCH_MAX="tilegx"
- ;;
-
*)
AC_MSG_RESULT([no (${host_cpu})])
AC_MSG_ERROR([Unsupported host architecture. Sorry])
valt_load_address_sec_inner="0xUNSET"
AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})])
;;
- tilegx-linux)
- VGCONF_ARCH_PRI="tilegx"
- VGCONF_ARCH_SEC=""
- VGCONF_PLATFORM_PRI_CAPS="TILEGX_LINUX"
- VGCONF_PLATFORM_SEC_CAPS=""
- valt_load_address_pri_norml="0x38000000"
- valt_load_address_pri_inner="0x28000000"
- valt_load_address_sec_norml="0xUNSET"
- valt_load_address_sec_inner="0xUNSET"
- AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})])
- ;;
x86-solaris)
VGCONF_ARCH_PRI="x86"
VGCONF_ARCH_SEC=""
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX )
AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_MIPS64,
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX )
-AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_TILEGX,
- test x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX )
# Set up VGCONF_PLATFORMS_INCLUDE_<platform>. Either one or two of these
# become defined.
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX)
AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX,
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX)
-AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_TILEGX_LINUX,
- test x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX)
AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_DARWIN,
test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \
-o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN)
-o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \
-o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \
-o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \
- -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \
- -o x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX)
+ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX)
AM_CONDITIONAL(VGCONF_OS_IS_DARWIN,
test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \
-o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN)
none/tests/s390x/Makefile
none/tests/mips32/Makefile
none/tests/mips64/Makefile
- none/tests/tilegx/Makefile
none/tests/linux/Makefile
none/tests/darwin/Makefile
none/tests/solaris/Makefile
m_dispatch/dispatch-s390x-linux.S \
m_dispatch/dispatch-mips32-linux.S \
m_dispatch/dispatch-mips64-linux.S \
- m_dispatch/dispatch-tilegx-linux.S \
m_dispatch/dispatch-x86-darwin.S \
m_dispatch/dispatch-amd64-darwin.S \
m_dispatch/dispatch-x86-solaris.S \
m_gdbserver/valgrind-low-s390x.c \
m_gdbserver/valgrind-low-mips32.c \
m_gdbserver/valgrind-low-mips64.c \
- m_gdbserver/valgrind-low-tilegx.c \
m_gdbserver/version.c \
m_initimg/initimg-linux.c \
m_initimg/initimg-darwin.c \
m_sigframe/sigframe-s390x-linux.c \
m_sigframe/sigframe-mips32-linux.c \
m_sigframe/sigframe-mips64-linux.c \
- m_sigframe/sigframe-tilegx-linux.c \
m_sigframe/sigframe-x86-darwin.c \
m_sigframe/sigframe-amd64-darwin.c \
m_sigframe/sigframe-solaris.c \
m_syswrap/syscall-s390x-linux.S \
m_syswrap/syscall-mips32-linux.S \
m_syswrap/syscall-mips64-linux.S \
- m_syswrap/syscall-tilegx-linux.S \
m_syswrap/syscall-x86-darwin.S \
m_syswrap/syscall-amd64-darwin.S \
m_syswrap/syscall-x86-solaris.S \
m_syswrap/syswrap-s390x-linux.c \
m_syswrap/syswrap-mips32-linux.c \
m_syswrap/syswrap-mips64-linux.c \
- m_syswrap/syswrap-tilegx-linux.c \
m_syswrap/syswrap-x86-darwin.c \
m_syswrap/syswrap-amd64-darwin.c \
m_syswrap/syswrap-xen.c \
#define EM_PPC64 21 // ditto
#endif
-#ifndef EM_TILEGX
-#define EM_TILEGX 191
-#endif
-
/* Report fatal errors */
__attribute__((noreturn))
static void barf ( const char *format, ... )
(ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
platform = "mips64-linux";
- } else if (ehdr->e_machine == EM_TILEGX &&
- (ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
- ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
- platform = "tilegx-linux";
} else if (ehdr->e_machine == EM_AARCH64 &&
(ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
(0==strcmp(VG_PLATFORM,"arm-linux")) ||
(0==strcmp(VG_PLATFORM,"arm64-linux")) ||
(0==strcmp(VG_PLATFORM,"s390x-linux")) ||
- (0==strcmp(VG_PLATFORM,"tilegx-linux")) ||
(0==strcmp(VG_PLATFORM,"mips32-linux")) ||
(0==strcmp(VG_PLATFORM,"mips64-linux")))
default_platform = VG_PLATFORM;
# elif defined(VGP_amd64_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_s390x_linux) || defined(VGP_mips32_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
- || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
res = VG_(do_syscall6)(__NR_mmap, (UWord)start, length,
prot, flags, fd, offset);
# elif defined(VGP_x86_darwin)
/* ARM64 wants to use __NR_openat rather than __NR_open. */
SysRes res = VG_(do_syscall4)(__NR_openat,
VKI_AT_FDCWD, (UWord)pathname, flags, mode);
-# elif defined(VGP_tilegx_linux)
- SysRes res = VG_(do_syscall4)(__NR_openat, VKI_AT_FDCWD, (UWord)pathname,
- flags, mode);
# elif defined(VGO_linux) || defined(VGO_darwin)
SysRes res = VG_(do_syscall3)(__NR_open, (UWord)pathname, flags, mode);
# elif defined(VGO_solaris)
# if defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)path, (UWord)buf, bufsiz);
-# elif defined(VGP_tilegx_linux)
- res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD, (UWord)path,
- (UWord)buf, bufsiz);
# elif defined(VGO_linux) || defined(VGO_darwin)
res = VG_(do_syscall3)(__NR_readlink, (UWord)path, (UWord)buf, bufsiz);
# elif defined(VGO_solaris)
#elif defined(VGA_arm) || defined(VGA_ppc32) || \
defined(VGA_ppc64be) || defined(VGA_ppc64le) || \
- defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64) || \
- defined(VGA_tilegx)
+ defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64)
static Bool
get_cache_info(VexArchInfo *vai)
{
regs[VKI_MIPS64_EF_HI] = arch->vex.guest_HI;
regs[VKI_MIPS64_EF_CP0_STATUS] = arch->vex.guest_CP0_status;
regs[VKI_MIPS64_EF_CP0_EPC] = arch->vex.guest_PC;
-#elif defined(VGP_tilegx_linux)
-# define DO(n) regs->regs[n] = arch->vex.guest_r##n
- DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7);
- DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15);
- DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23);
- DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
- DO(32); DO(33); DO(34); DO(35); DO(36); DO(37); DO(38); DO(39);
- DO(40); DO(41); DO(42); DO(43); DO(44); DO(45); DO(46); DO(47);
- DO(48); DO(49); DO(50); DO(51); DO(52); DO(53); DO(54); DO(55);
- regs->pc = arch->vex.guest_pc;
- regs->orig_r0 = arch->vex.guest_r0;
#else
# error Unknown ELF platform
#endif
DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
# undef DO
-#elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux)
+#elif defined(VGP_arm_linux)
// umm ...
#elif defined(VGP_arm64_linux)
if (regno == 30) { *a = regs->fp; return True; }
# elif defined(VGP_arm64_linux)
if (regno == 31) { *a = regs->sp; return True; }
-# elif defined(VGP_tilegx_linux)
- if (regno == 52) { *a = regs->fp; return True; }
- if (regno == 54) { *a = regs->sp; return True; }
# else
# error "Unknown platform"
# endif
# elif defined(VGP_s390x_linux)
is_rx_map = seg->hasR && seg->hasX && !seg->hasW;
is_rw_map = seg->hasR && seg->hasW;
-# elif defined(VGA_tilegx)
- is_rx_map = seg->hasR && seg->hasX; // && !seg->hasW;
- is_rw_map = seg->hasR && seg->hasW; // && !seg->hasX;
# else
# error "Unknown platform"
# endif
|| defined(VGA_ppc64le)
# elif defined(VGP_arm64_linux)
case Creg_ARM64_X30: return eec->uregs->x30;
-# elif defined(VGA_tilegx)
- case Creg_TILEGX_IP: return eec->uregs->pc;
- case Creg_TILEGX_SP: return eec->uregs->sp;
- case Creg_TILEGX_BP: return eec->uregs->fp;
- case Creg_TILEGX_LR: return eec->uregs->lr;
# else
# error "Unsupported arch"
# endif
case CFIC_ARM64_X29REL:
cfa = cfsi_m->cfa_off + uregs->x29;
break;
-# elif defined(VGA_tilegx)
- case CFIC_IA_SPREL:
- cfa = cfsi_m->cfa_off + uregs->sp;
- break;
- case CFIR_SAME:
- cfa = uregs->fp;
- break;
- case CFIC_IA_BPREL:
- cfa = cfsi_m->cfa_off + uregs->fp;
- break;
# else
# error "Unsupported arch"
# endif
return compute_cfa(&uregs,
min_accessible, max_accessible, ce->di, ce->cfsi_m);
}
-#elif defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_tilegx)
+#elif defined(VGA_mips32) || defined(VGA_mips64)
{ D3UnwindRegs uregs;
uregs.pc = ip;
uregs.sp = sp;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
# elif defined(VGP_arm64_linux)
ipHere = uregsHere->pc;
-# elif defined(VGA_tilegx)
- ipHere = uregsHere->pc;
# else
# error "Unknown arch"
# endif
COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off);
COMPUTE(uregsPrev.x30, uregsHere->x30, cfsi_m->x30_how, cfsi_m->x30_off);
COMPUTE(uregsPrev.x29, uregsHere->x29, cfsi_m->x29_how, cfsi_m->x29_off);
-# elif defined(VGA_tilegx)
- COMPUTE(uregsPrev.pc, uregsHere->pc, cfsi_m->ra_how, cfsi_m->ra_off);
- COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off);
- COMPUTE(uregsPrev.fp, uregsHere->fp, cfsi_m->fp_how, cfsi_m->fp_off);
# else
# error "Unknown arch"
# endif
Int fp_off;
}
DiCfSI_m;
-#elif defined(VGA_tilegx)
-typedef
- struct {
- UChar cfa_how; /* a CFIC_IA value */
- UChar ra_how; /* a CFIR_ value */
- UChar sp_how; /* a CFIR_ value */
- UChar fp_how; /* a CFIR_ value */
- Int cfa_off;
- Int ra_off;
- Int sp_off;
- Int fp_off;
- }
- DiCfSI_m;
#else
# error "Unknown arch"
#endif
Creg_S390_SP,
Creg_S390_FP,
Creg_S390_LR,
- Creg_MIPS_RA,
- Creg_TILEGX_IP,
- Creg_TILEGX_SP,
- Creg_TILEGX_BP,
- Creg_TILEGX_LR
+ Creg_MIPS_RA
}
CfiReg;
# define FP_REG 30
# define SP_REG 29
# define RA_REG_DEFAULT 31
-#elif defined(VGP_tilegx_linux)
-# define FP_REG 52
-# define SP_REG 54
-# define RA_REG_DEFAULT 55
#else
# error "Unknown platform"
#endif
|| defined(VGP_ppc64le_linux) || defined(VGP_mips32_linux) \
|| defined(VGP_mips64_linux)
# define N_CFI_REGS 72
-#elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux)
+#elif defined(VGP_arm_linux)
# define N_CFI_REGS 320
#elif defined(VGP_arm64_linux)
# define N_CFI_REGS 128
if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) {
si_m->cfa_off = ctxs->cfa_off;
# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
- || defined(VGA_mips32) || defined(VGA_mips64) \
- || defined(VGA_tilegx)
+ || defined(VGA_mips32) || defined(VGA_mips64)
si_m->cfa_how = CFIC_IA_SPREL;
# elif defined(VGA_arm)
si_m->cfa_how = CFIC_ARM_R13REL;
if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) {
si_m->cfa_off = ctxs->cfa_off;
# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
- || defined(VGA_mips32) || defined(VGA_mips64) \
- || defined(VGA_tilegx)
+ || defined(VGA_mips32) || defined(VGA_mips64)
si_m->cfa_how = CFIC_IA_BPREL;
# elif defined(VGA_arm)
si_m->cfa_how = CFIC_ARM_R12REL;
*base = loc_start + ctx->initloc;
*len = (UInt)(ctx->loc - loc_start);
- return True;
-# elif defined(VGA_tilegx)
-
- /* --- entire tail of this fn specialised for tilegx --- */
-
- SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
- ctxs->reg[ctx->ra_reg] );
- SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
- ctxs->reg[FP_REG] );
- SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
- ctxs->reg[SP_REG] );
- si_m->sp_how = CFIR_CFAREL;
- si_m->sp_off = 0;
-
- if (si_m->fp_how == CFIR_UNKNOWN)
- si_m->fp_how = CFIR_SAME;
- if (si_m->cfa_how == CFIR_UNKNOWN) {
- si_m->cfa_how = CFIC_IA_SPREL;
- si_m->cfa_off = 160;
- }
- if (si_m->ra_how == CFIR_UNKNOWN) {
- if (!debuginfo->cfsi_exprs)
- debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
- "di.ccCt.2a",
- ML_(dinfo_free),
- sizeof(CfiExpr) );
- si_m->ra_how = CFIR_EXPR;
- si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
- Creg_TILEGX_LR);
- }
-
- if (si_m->ra_how == CFIR_SAME)
- { why = 3; goto failed; }
-
- if (loc_start >= ctx->loc)
- { why = 4; goto failed; }
- if (ctx->loc - loc_start > 10000000 /* let's say */)
- { why = 5; goto failed; }
-
- *base = loc_start + ctx->initloc;
- *len = (UInt)(ctx->loc - loc_start);
-
return True;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
/* These don't use CFI based unwinding (is that really true?) */
I_die_here;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) \
|| defined(VGA_ppc64le)
-# elif defined(VGA_tilegx)
- if (dwreg == SP_REG)
- return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_SP );
- if (dwreg == FP_REG)
- return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_BP );
- if (dwreg == srcuc->ra_reg)
- return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_IP );
# else
# error "Unknown arch"
# endif
# if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \
|| defined(VGP_arm_linux) || defined (VGP_s390x_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux) \
+ || defined(VGP_arm64_linux) \
|| defined(VGP_x86_solaris) || defined(VGP_amd64_solaris)
/* Accept .plt where mapped as rx (code) */
if (0 == VG_(strcmp)(name, ".plt")) {
SHOW_HOW(si_m->x30_how, si_m->x30_off);
VG_(printf)(" X29=");
SHOW_HOW(si_m->x29_how, si_m->x29_off);
-# elif defined(VGA_tilegx)
- VG_(printf)(" SP=");
- SHOW_HOW(si_m->sp_how, si_m->sp_off);
- VG_(printf)(" FP=");
- SHOW_HOW(si_m->fp_how, si_m->fp_off);
# else
# error "Unknown arch"
# endif
case Creg_S390_SP: VG_(printf)("SP"); break;
case Creg_S390_FP: VG_(printf)("FP"); break;
case Creg_S390_LR: VG_(printf)("LR"); break;
- case Creg_TILEGX_IP: VG_(printf)("PC"); break;
- case Creg_TILEGX_SP: VG_(printf)("SP"); break;
- case Creg_TILEGX_BP: VG_(printf)("BP"); break;
- case Creg_TILEGX_LR: VG_(printf)("R55"); break;
default: vg_assert(0);
}
}
return (UInt)(__res);
}
-#elif defined(VGP_tilegx_linux)
-
-static UInt local_sys_write_stderr ( const HChar* buf, Int n )
-{
- volatile Long block[2];
- block[0] = (Long)buf;
- block[1] = n;
- Long __res = 0;
- __asm__ volatile (
- "movei r0, 2 \n\t" /* stderr */
- "move r1, %1 \n\t" /* buf */
- "move r2, %2 \n\t" /* n */
- "move r3, zero \n\t"
- "moveli r10, %3 \n\t" /* set r10 = __NR_write */
- "swint1 \n\t" /* write() */
- "nop \n\t"
- "move %0, r0 \n\t" /* save return into block[0] */
- : "=r"(__res)
- : "r" (block[0]), "r"(block[1]), "n" (__NR_write)
- : "r0", "r1", "r2", "r3", "r4", "r5");
- if (__res < 0)
- __res = -1;
- return (UInt)__res;
-}
-
-static UInt local_sys_getpid ( void )
-{
- UInt __res, __err;
- __res = 0;
- __err = 0;
- __asm__ volatile (
- "moveli r10, %2\n\t" /* set r10 = __NR_getpid */
- "swint1\n\t" /* getpid() */
- "nop\n\t"
- "move %0, r0\n"
- "move %1, r1\n"
- : "=r" (__res), "=r"(__err)
- : "n" (__NR_getpid)
- : "r0", "r1", "r2", "r3", "r4",
- "r5", "r6", "r7", "r8", "r9",
- "r10", "r11", "r12", "r13", "r14",
- "r15", "r16", "r17", "r18", "r19",
- "r20", "r21", "r22", "r23", "r24",
- "r25", "r26", "r27", "r28", "r29");
- return __res;
-}
-
#elif defined(VGP_x86_solaris)
static UInt local_sys_write_stderr ( const HChar* buf, Int n )
{
+++ /dev/null
-
-/*--------------------------------------------------------------------*/
-/*--- begin dispatch-tilegx-linux.S ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#include "pub_core_basics_asm.h"
-
-#if defined(VGP_tilegx_linux)
-#include "pub_core_dispatch_asm.h"
-#include "pub_core_transtab_asm.h"
-#include "libvex_guest_offsets.h" /* for OFFSET_tilegx_PC */
-
- /*------------------------------------------------------------*/
- /*--- ---*/
- /*--- The dispatch loop. VG_(run_innerloop) is used to ---*/
- /*--- run all translations except no-redir ones. ---*/
- /*--- ---*/
- /*------------------------------------------------------------*/
-
- /*----------------------------------------------------*/
- /*--- Preamble (set everything up) ---*/
- /*----------------------------------------------------*/
-
- /* signature:
- void VG_(disp_run_translations)(UWord* two_words,
- void* guest_state,
- Addr host_addr );
- UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling );
- */
-
- .text
- .globl VG_(disp_run_translations)
- VG_(disp_run_translations):
-
- /* r0 holds two_words
- r1 holds guest_state
- r2 holds host_addr */
-
- /* New stack frame */
- addli sp, sp, -256
- addi r29, sp, 8
- /*
- high memory of stack
- 216 lr
- 208 r53
- 200 r52
- 192 r51
- ...
- 48 r33
- 40 r32
- 32 r31
- 24 r30
- 16 r1 <---
- 8 r0
- 0 <-sp
- */
- st_add r29, r0, 8
- st_add r29, r1, 8
-
- /* ... and r30 - r53 */
- st_add r29, r30, 8
- st_add r29, r31, 8
- st_add r29, r32, 8
- st_add r29, r33, 8
- st_add r29, r34, 8
- st_add r29, r35, 8
- st_add r29, r36, 8
- st_add r29, r37, 8
- st_add r29, r38, 8
- st_add r29, r39, 8
- st_add r29, r40, 8
- st_add r29, r41, 8
- st_add r29, r42, 8
- st_add r29, r43, 8
- st_add r29, r44, 8
- st_add r29, r45, 8
- st_add r29, r46, 8
- st_add r29, r47, 8
- st_add r29, r48, 8
- st_add r29, r49, 8
- st_add r29, r50, 8
- st_add r29, r51, 8
- st_add r29, r52, 8
- st_add r29, r53, 8
- st r29, lr
-
- /* Load the address of guest state into guest state register r50. */
- move r50, r1
-
- //j postamble
-
- /* jump to the code cache. */
- jr r2
- /*NOTREACHED*/
-
-
- /*----------------------------------------------------*/
- /*--- Postamble and exit. ---*/
- /*----------------------------------------------------*/
-
-postamble:
- /* At this point, r12 and r13 contain two
- words to be returned to the caller. r12
- holds a TRC value, and r13 optionally may
- hold another word (for CHAIN_ME exits, the
- address of the place to patch.) */
-
- /* run_innerloop_exit_REALLY:
- r50 holds VG_TRC_* value to return
- Return to parent stack
- addli sp, sp, 256 */
-
- addi r29, sp, 8
-
- /* Restore r0 from stack; holding address of twp words */
- ld_add r0, r29, 16
- /* store r12 in two_words[0] */
- st_add r0, r12, 8
- /* store r13 in two_words[1] */
- st r0, r13
-
- /* Restore callee-saved registers... */
- ld_add r30, r29, 8
- ld_add r31, r29, 8
- ld_add r32, r29, 8
- ld_add r33, r29, 8
- ld_add r34, r29, 8
- ld_add r35, r29, 8
- ld_add r36, r29, 8
- ld_add r37, r29, 8
- ld_add r38, r29, 8
- ld_add r39, r29, 8
- ld_add r40, r29, 8
- ld_add r41, r29, 8
- ld_add r42, r29, 8
- ld_add r43, r29, 8
- ld_add r44, r29, 8
- ld_add r45, r29, 8
- ld_add r46, r29, 8
- ld_add r47, r29, 8
- ld_add r48, r29, 8
- ld_add r49, r29, 8
- ld_add r50, r29, 8
- ld_add r51, r29, 8
- ld_add r52, r29, 8
- ld_add r53, r29, 8
- ld lr, r29
- addli sp, sp, 256 /* stack_size */
- jr lr
- nop
-
-
- /*----------------------------------------------------*/
- /*--- Continuation points ---*/
- /*----------------------------------------------------*/
-
- /* ------ Chain me to slow entry point ------ */
- .global VG_(disp_cp_chain_me_to_slowEP)
- VG_(disp_cp_chain_me_to_slowEP):
- /* We got called. The return address indicates
- where the patching needs to happen. Collect
- the return address and, exit back to C land,
- handing the caller the pair (Chain_me_S, RA) */
- # if (VG_TRC_CHAIN_ME_TO_SLOW_EP > 128)
- # error ("VG_TRC_CHAIN_ME_TO_SLOW_EP is > 128");
- # endif
- moveli r12, VG_TRC_CHAIN_ME_TO_SLOW_EP
- move r13, lr
- /* 32 = mkLoadImm_EXACTLY4
- 8 = jalr r9
- 8 = nop */
- addi r13, r13, -40
- j postamble
-
- /* ------ Chain me to slow entry point ------ */
- .global VG_(disp_cp_chain_me_to_fastEP)
- VG_(disp_cp_chain_me_to_fastEP):
- /* We got called. The return address indicates
- where the patching needs to happen. Collect
- the return address and, exit back to C land,
- handing the caller the pair (Chain_me_S, RA) */
- # if (VG_TRC_CHAIN_ME_TO_FAST_EP > 128)
- # error ("VG_TRC_CHAIN_ME_TO_FAST_EP is > 128");
- # endif
- moveli r12, VG_TRC_CHAIN_ME_TO_FAST_EP
- move r13, lr
- /* 32 = mkLoadImm_EXACTLY4
- 8 = jalr r9
- 8 = nop */
- addi r13, r13, -40
- j postamble
-
- /* ------ Indirect but boring jump ------ */
- .global VG_(disp_cp_xindir)
- VG_(disp_cp_xindir):
- /* Where are we going? */
- addli r11, r50, OFFSET_tilegx_pc
- ld r11, r11
-
- moveli r7, hw2_last(VG_(stats__n_xindirs_32))
- shl16insli r7, r7, hw1(VG_(stats__n_xindirs_32))
- shl16insli r7, r7, hw0(VG_(stats__n_xindirs_32))
- ld4u r6, r7
- addi r6, r6, 1
- st4 r7, r6
-
- /* try a fast lookup in the translation cache */
- /* r14 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
- = (t8 >> 3 & VG_TT_FAST_MASK) << 3 */
-
- move r14, r11
- /* Assume VG_TT_FAST_MASK < 4G */
- moveli r12, hw1(VG_TT_FAST_MASK)
- shl16insli r12, r12, hw0(VG_TT_FAST_MASK)
- shrui r14, r14, 3
- and r14, r14, r12
- shli r14, r14, 4
- /* Note, each tt_fast hash entry has two pointers i.e. 16 Bytes. */
-
- /* r13 = (addr of VG_(tt_fast)) + r14 */
- moveli r13, hw2_last(VG_(tt_fast))
- shl16insli r13, r13, hw1(VG_(tt_fast))
- shl16insli r13, r13, hw0(VG_(tt_fast))
-
- add r13, r13, r14
-
- /* r12 = VG_(tt_fast)[hash] :: ULong* */
- ld_add r12, r13, 8
-
- {
- ld r25, r13
- sub r7, r12, r11
- }
-
- bnez r7, fast_lookup_failed
-
- /* Run the translation */
- jr r25
-
- .quad 0x0
-
-fast_lookup_failed:
- /* %PC is up to date */
- /* back out decrement of the dispatch counter */
- /* hold dispatch_ctr in t0 (r8) */
-
- moveli r7, hw2_last(VG_(stats__n_xindir_misses_32))
- shl16insli r7, r7, hw1(VG_(stats__n_xindir_misses_32))
- shl16insli r7, r7, hw0(VG_(stats__n_xindir_misses_32))
- ld4u r6, r7
- addi r6, r6, 1
- st4 r7, r6
- moveli r12, VG_TRC_INNER_FASTMISS
- movei r13, 0
- j postamble
-
- /* ------ Assisted jump ------ */
- .global VG_(disp_cp_xassisted)
- VG_(disp_cp_xassisted):
- /* guest-state-pointer contains the TRC. Put the value into the
- return register */
- move r12, r50
- movei r13, 0
- j postamble
-
- /* ------ Event check failed ------ */
- .global VG_(disp_cp_evcheck_fail)
- VG_(disp_cp_evcheck_fail):
- moveli r12, VG_TRC_INNER_COUNTERZERO
- movei r13, 0
- j postamble
-
- .size VG_(disp_run_translations), .-VG_(disp_run_translations)
-
-#endif /* defined(VGP_tilegx_linux) */
-
-/* Let the linker know we don't need an executable stack */
-MARK_STACK_NO_EXEC
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
-
mips32_init_architecture(&the_low_target);
#elif defined(VGA_mips64)
mips64_init_architecture(&the_low_target);
-#elif defined(VGA_tilegx)
- tilegx_init_architecture(&the_low_target);
#else
#error "architecture missing in target.c valgrind_initialize_target"
#endif
+++ /dev/null
-/* Low level interface to valgrind, for the remote server for GDB integrated
- in valgrind.
- Copyright (C) 2012
- Free Software Foundation, Inc.
-
- This file is part of VALGRIND.
- It has been inspired from a file from gdbserver in gdb 6.6.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
-
-#include "server.h"
-#include "target.h"
-#include "regdef.h"
-#include "regcache.h"
-
-#include "pub_core_aspacemgr.h"
-#include "pub_core_threadstate.h"
-#include "pub_core_transtab.h"
-#include "pub_core_gdbserver.h"
-
-#include "valgrind_low.h"
-
-#include "libvex_guest_tilegx.h"
-#define REG_ONE(_n) { "r"#_n, 64 * (_n), 64 }
-#define REG_ONE_NAME(_n, _name) { _name, 64 * (_n), 64 }
-
-static struct reg regs[] = {
- REG_ONE(0),
- REG_ONE(1),
- REG_ONE(2),
- REG_ONE(3),
- REG_ONE(4),
- REG_ONE(5),
- REG_ONE(6),
- REG_ONE(7),
- REG_ONE(8),
- REG_ONE(9),
-
- REG_ONE(10),
- REG_ONE(11),
- REG_ONE(12),
- REG_ONE(13),
- REG_ONE(14),
- REG_ONE(15),
- REG_ONE(16),
- REG_ONE(17),
- REG_ONE(18),
- REG_ONE(19),
-
- REG_ONE(20),
- REG_ONE(21),
- REG_ONE(22),
- REG_ONE(23),
- REG_ONE(24),
- REG_ONE(25),
- REG_ONE(26),
- REG_ONE(27),
- REG_ONE(28),
- REG_ONE(29),
-
- REG_ONE(30),
- REG_ONE(31),
- REG_ONE(32),
- REG_ONE(33),
- REG_ONE(34),
- REG_ONE(35),
- REG_ONE(36),
- REG_ONE(37),
- REG_ONE(38),
- REG_ONE(39),
-
- REG_ONE(40),
- REG_ONE(41),
- REG_ONE(42),
- REG_ONE(43),
- REG_ONE(44),
- REG_ONE(45),
- REG_ONE(46),
- REG_ONE(47),
- REG_ONE(48),
- REG_ONE(49),
-
- REG_ONE(50),
- REG_ONE(51),
- REG_ONE(52),
- REG_ONE(53),
-
- REG_ONE_NAME(54, "sp"),
- REG_ONE_NAME(55, "lr"),
- REG_ONE(56),
- REG_ONE(57),
- REG_ONE(58),
- REG_ONE(59),
-
- REG_ONE(60),
- REG_ONE(61),
- REG_ONE(62),
- REG_ONE_NAME(63, "zero"),
- REG_ONE_NAME(64, "pc"),
-};
-
-#define num_regs (sizeof (regs) / sizeof (regs[0]))
-
-static const char *expedite_regs[] = { "sp", "pc", 0 };
-
-static
-CORE_ADDR get_pc (void)
-{
- unsigned long pc;
-
- collect_register_by_name ("pc", &pc);
-
- dlog(1, "stop pc is %p\n", (void *) pc);
- return pc;
-}
-
-static
-void set_pc ( CORE_ADDR newpc )
-{
- Bool mod;
- supply_register_by_name ("pc", &newpc, &mod);
- if (mod)
- dlog(1, "set pc to %p\n", C2v (newpc));
- else
- dlog(1, "set pc not changed %p\n", C2v (newpc));
-}
-
-/* store registers in the guest state (gdbserver_to_valgrind)
- or fetch register from the guest state (valgrind_to_gdbserver). */
-static
-void transfer_register ( ThreadId tid, int abs_regno, void * buf,
- transfer_direction dir, int size, Bool *mod )
-{
- ThreadState* tst = VG_(get_ThreadState)(tid);
- int set = abs_regno / num_regs;
- int regno = abs_regno % num_regs;
- *mod = False;
-
- VexGuestTILEGXState* tilegx = (VexGuestTILEGXState*) get_arch (set, tst);
-
- switch (regno) {
- case 0: VG_(transfer) (&tilegx->guest_r0, buf, dir, size, mod); break;
- case 1: VG_(transfer) (&tilegx->guest_r1, buf, dir, size, mod); break;
- case 2: VG_(transfer) (&tilegx->guest_r2, buf, dir, size, mod); break;
- case 3: VG_(transfer) (&tilegx->guest_r3, buf, dir, size, mod); break;
- case 4: VG_(transfer) (&tilegx->guest_r4, buf, dir, size, mod); break;
- case 5: VG_(transfer) (&tilegx->guest_r5, buf, dir, size, mod); break;
- case 6: VG_(transfer) (&tilegx->guest_r6, buf, dir, size, mod); break;
- case 7: VG_(transfer) (&tilegx->guest_r7, buf, dir, size, mod); break;
- case 8: VG_(transfer) (&tilegx->guest_r8, buf, dir, size, mod); break;
- case 9: VG_(transfer) (&tilegx->guest_r9, buf, dir, size, mod); break;
- case 10: VG_(transfer) (&tilegx->guest_r10, buf, dir, size, mod); break;
- case 11: VG_(transfer) (&tilegx->guest_r11, buf, dir, size, mod); break;
- case 12: VG_(transfer) (&tilegx->guest_r12, buf, dir, size, mod); break;
- case 13: VG_(transfer) (&tilegx->guest_r13, buf, dir, size, mod); break;
- case 14: VG_(transfer) (&tilegx->guest_r14, buf, dir, size, mod); break;
- case 15: VG_(transfer) (&tilegx->guest_r15, buf, dir, size, mod); break;
- case 16: VG_(transfer) (&tilegx->guest_r16, buf, dir, size, mod); break;
- case 17: VG_(transfer) (&tilegx->guest_r17, buf, dir, size, mod); break;
- case 18: VG_(transfer) (&tilegx->guest_r18, buf, dir, size, mod); break;
- case 19: VG_(transfer) (&tilegx->guest_r19, buf, dir, size, mod); break;
- case 20: VG_(transfer) (&tilegx->guest_r20, buf, dir, size, mod); break;
- case 21: VG_(transfer) (&tilegx->guest_r21, buf, dir, size, mod); break;
- case 22: VG_(transfer) (&tilegx->guest_r22, buf, dir, size, mod); break;
- case 23: VG_(transfer) (&tilegx->guest_r23, buf, dir, size, mod); break;
- case 24: VG_(transfer) (&tilegx->guest_r24, buf, dir, size, mod); break;
- case 25: VG_(transfer) (&tilegx->guest_r25, buf, dir, size, mod); break;
- case 26: VG_(transfer) (&tilegx->guest_r26, buf, dir, size, mod); break;
- case 27: VG_(transfer) (&tilegx->guest_r27, buf, dir, size, mod); break;
- case 28: VG_(transfer) (&tilegx->guest_r28, buf, dir, size, mod); break;
- case 29: VG_(transfer) (&tilegx->guest_r29, buf, dir, size, mod); break;
- case 30: VG_(transfer) (&tilegx->guest_r30, buf, dir, size, mod); break;
- case 31: VG_(transfer) (&tilegx->guest_r31, buf, dir, size, mod); break;
- case 32: VG_(transfer) (&tilegx->guest_r32, buf, dir, size, mod); break;
- case 33: VG_(transfer) (&tilegx->guest_r33, buf, dir, size, mod); break;
- case 34: VG_(transfer) (&tilegx->guest_r34, buf, dir, size, mod); break;
- case 35: VG_(transfer) (&tilegx->guest_r35, buf, dir, size, mod); break;
- case 36: VG_(transfer) (&tilegx->guest_r36, buf, dir, size, mod); break;
- case 37: VG_(transfer) (&tilegx->guest_r37, buf, dir, size, mod); break;
- case 38: VG_(transfer) (&tilegx->guest_r38, buf, dir, size, mod); break;
- case 39: VG_(transfer) (&tilegx->guest_r39, buf, dir, size, mod); break;
- case 40: VG_(transfer) (&tilegx->guest_r40, buf, dir, size, mod); break;
- case 41: VG_(transfer) (&tilegx->guest_r41, buf, dir, size, mod); break;
- case 42: VG_(transfer) (&tilegx->guest_r42, buf, dir, size, mod); break;
- case 43: VG_(transfer) (&tilegx->guest_r43, buf, dir, size, mod); break;
- case 44: VG_(transfer) (&tilegx->guest_r44, buf, dir, size, mod); break;
- case 45: VG_(transfer) (&tilegx->guest_r45, buf, dir, size, mod); break;
- case 46: VG_(transfer) (&tilegx->guest_r46, buf, dir, size, mod); break;
- case 47: VG_(transfer) (&tilegx->guest_r47, buf, dir, size, mod); break;
- case 48: VG_(transfer) (&tilegx->guest_r48, buf, dir, size, mod); break;
- case 49: VG_(transfer) (&tilegx->guest_r49, buf, dir, size, mod); break;
- case 50: VG_(transfer) (&tilegx->guest_r50, buf, dir, size, mod); break;
- case 51: VG_(transfer) (&tilegx->guest_r51, buf, dir, size, mod); break;
- case 52: VG_(transfer) (&tilegx->guest_r52, buf, dir, size, mod); break;
- case 53: VG_(transfer) (&tilegx->guest_r53, buf, dir, size, mod); break;
- case 54: VG_(transfer) (&tilegx->guest_r54, buf, dir, size, mod); break;
- case 55: VG_(transfer) (&tilegx->guest_r55, buf, dir, size, mod); break;
- case 56: VG_(transfer) (&tilegx->guest_r56, buf, dir, size, mod); break;
- case 57: VG_(transfer) (&tilegx->guest_r57, buf, dir, size, mod); break;
- case 58: VG_(transfer) (&tilegx->guest_r58, buf, dir, size, mod); break;
- case 59: VG_(transfer) (&tilegx->guest_r59, buf, dir, size, mod); break;
- case 60: VG_(transfer) (&tilegx->guest_r60, buf, dir, size, mod); break;
- case 61: VG_(transfer) (&tilegx->guest_r61, buf, dir, size, mod); break;
- case 62: VG_(transfer) (&tilegx->guest_r62, buf, dir, size, mod); break;
- case 63: VG_(transfer) (&tilegx->guest_r63, buf, dir, size, mod); break;
- case 64: VG_(transfer) (&tilegx->guest_pc, buf, dir, size, mod); break;
-
- default: VG_(printf)("regno: %d\n", regno); vg_assert(0);
- }
-}
-
-static
-const char* target_xml ( Bool shadow_mode )
-{
- return NULL;
-#if 0
- if (shadow_mode)
- return "tilegx-linux-valgrind.xml";
- else
- return "tilegx-linux.xml";
-#endif
-}
-
-static CORE_ADDR** target_get_dtv (ThreadState *tst)
-{
- VexGuestTILEGXState* tilegx = (VexGuestTILEGXState*)&tst->arch.vex;
- // tilegx dtv location similar to mips
- return (CORE_ADDR**)((CORE_ADDR)tilegx->guest_r53
- - 0x7000 - sizeof(CORE_ADDR));
-}
-
-static struct valgrind_target_ops low_target = {
- num_regs,
- regs,
- 54, //sp = r54, which is register offset 54 in regs
- transfer_register,
- get_pc,
- set_pc,
- "tilegx",
- target_xml,
- target_get_dtv
-};
-
-void tilegx_init_architecture ( struct valgrind_target_ops *target )
-{
- *target = low_target;
- set_register_cache (regs, num_regs);
- gdbserver_expedite_regs = expedite_regs;
-}
extern void s390x_init_architecture (struct valgrind_target_ops *target);
extern void mips32_init_architecture (struct valgrind_target_ops *target);
extern void mips64_init_architecture (struct valgrind_target_ops *target);
-extern void tilegx_init_architecture (struct valgrind_target_ops *target);
#endif
arch->vex.guest_PC = iifii.initial_client_IP;
arch->vex.guest_r31 = iifii.initial_client_SP;
-# elif defined(VGP_tilegx_linux)
- vg_assert(0 == sizeof(VexGuestTILEGXState) % LibVEX_GUEST_STATE_ALIGN);
-
- /* Zero out the initial state. */
- LibVEX_GuestTILEGX_initialise(&arch->vex);
-
- /* Zero out the shadow areas. */
- VG_(memset)(&arch->vex_shadow1, 0, sizeof(VexGuestTILEGXState));
- VG_(memset)(&arch->vex_shadow2, 0, sizeof(VexGuestTILEGXState));
-
- /* Put essential stuff into the new state. */
- arch->vex.guest_r54 = iifii.initial_client_SP;
- arch->vex.guest_pc = iifii.initial_client_IP;
-
# else
# error Unknown platform
# endif
(srP)->misc.MIPS64.r31 = (ULong)ra; \
(srP)->misc.MIPS64.r28 = (ULong)gp; \
}
-#elif defined(VGP_tilegx_linux)
-# define GET_STARTREGS(srP) \
- { ULong pc, sp, fp, ra; \
- __asm__ __volatile__( \
- "move r8, lr \n" \
- "jal 0f \n" \
- "0:\n" \
- "move %0, lr \n" \
- "move lr, r8 \n" /* put old lr back*/ \
- "move %1, sp \n" \
- "move %2, r52 \n" \
- "move %3, lr \n" \
- : "=r" (pc), \
- "=r" (sp), \
- "=r" (fp), \
- "=r" (ra) \
- : /* reads none */ \
- : "%r8" /* trashed */ ); \
- (srP)->r_pc = (ULong)pc - 8; \
- (srP)->r_sp = (ULong)sp; \
- (srP)->misc.TILEGX.r52 = (ULong)fp; \
- (srP)->misc.TILEGX.r55 = (ULong)ra; \
- }
#else
# error Unknown platform
#endif
SysRes VG_(mknod) ( const HChar* pathname, Int mode, UWord dev )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
/* ARM64 wants to use __NR_mknodat rather than __NR_mknod. */
SysRes res = VG_(do_syscall4)(__NR_mknodat,
VKI_AT_FDCWD, (UWord)pathname, mode, dev);
SysRes VG_(open) ( const HChar* pathname, Int flags, Int mode )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
/* ARM64 wants to use __NR_openat rather than __NR_open. */
SysRes res = VG_(do_syscall4)(__NR_openat,
VKI_AT_FDCWD, (UWord)pathname, flags, mode);
} else {
return -1;
}
-# elif defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# elif defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall2)(__NR_pipe2, (UWord)fd, 0);
return sr_isError(res) ? -1 : 0;
# elif defined(VGO_linux)
# endif /* defined(__NR_stat64) */
/* This is the fallback ("vanilla version"). */
{ struct vki_stat buf;
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
res = VG_(do_syscall3)(__NR3264_fstatat, VKI_AT_FDCWD,
(UWord)file_name, (UWord)&buf);
# else
Int VG_(rename) ( const HChar* old_name, const HChar* new_name )
{
-# if defined(VGO_solaris) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGO_solaris) || defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall4)(__NR_renameat, VKI_AT_FDCWD, (UWord)old_name,
VKI_AT_FDCWD, (UWord)new_name);
# elif defined(VGO_linux) || defined(VGO_darwin)
Int VG_(unlink) ( const HChar* file_name )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall2)(__NR_unlinkat, VKI_AT_FDCWD,
(UWord)file_name);
# elif defined(VGO_linux) || defined(VGO_darwin)
SysRes VG_(poll) (struct vki_pollfd *fds, Int nfds, Int timeout)
{
SysRes res;
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
/* ARM64 wants to use __NR_ppoll rather than __NR_poll. */
struct vki_timespec timeout_ts;
if (timeout >= 0) {
{
SysRes res;
/* res = readlink( path, buf, bufsiz ); */
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)path, (UWord)buf, bufsiz);
# elif defined(VGO_linux) || defined(VGO_darwin)
UWord w = (irusr ? VKI_R_OK : 0)
| (iwusr ? VKI_W_OK : 0)
| (ixusr ? VKI_X_OK : 0);
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall3)(__NR_faccessat, VKI_AT_FDCWD, (UWord)path, w);
# elif defined(VGO_linux) || defined(VGO_darwin)
SysRes res = VG_(do_syscall2)(__NR_access, (UWord)path, w);
return res;
# elif defined(VGP_amd64_linux) || defined(VGP_s390x_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
- || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_pread64, fd, (UWord)buf, count, offset);
return res;
# elif defined(VGP_amd64_darwin)
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall3)(__NR_socket, domain, type, protocol );
return sr_isError(res) ? -1 : sr_Res(res);
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall3)(__NR_connect, sockfd, (UWord)serv_addr, addrlen);
return sr_isError(res) ? -1 : sr_Res(res);
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall6)(__NR_sendto, sd, (UWord)msg,
count, VKI_MSG_NOSIGNAL, 0,0);
return sr_isError(res) ? -1 : sr_Res(res);
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
- || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall3)( __NR_getsockname,
(UWord)sd, (UWord)name, (UWord)namelen );
return sr_isError(res) ? -1 : sr_Res(res);
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
- || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall3)( __NR_getpeername,
(UWord)sd, (UWord)name, (UWord)namelen );
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall5)( __NR_getsockopt,
(UWord)sd, (UWord)level, (UWord)optname,
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall5)( __NR_setsockopt,
(UWord)sd, (UWord)level, (UWord)optname,
* the /proc/self link is pointing...
*/
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)"/proc/self",
(UWord)pid, sizeof(pid));
if (size < 0) return -1;
# if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux)
Int i;
SysRes sres;
UShort list16[size];
Int VG_(fork) ( void )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall5)(__NR_clone, VKI_SIGCHLD,
(UWord)NULL, (UWord)NULL, (UWord)NULL, (UWord)NULL);
(UWord) nbytes, (UWord) 3);
vg_assert( !sr_isError(sres) );
-# elif defined(VGA_tilegx)
- const HChar *start, *end;
-
- /* L1 ICache is 32KB. cacheline size is 64 bytes. */
- if (nbytes > 0x8000) nbytes = 0x8000;
-
- start = (const HChar *)((unsigned long)ptr & -64ULL);
- end = (const HChar*)ptr + nbytes - 1;
-
- __insn_mf();
-
- do {
- const HChar* p;
- for (p = start; p <= end; p += 64)
- __insn_icoh(p);
- } while (0);
-
- __insn_drain();
-
# endif
}
= VG_(threads)[tid].arch.vex.guest_r31;
regs->misc.MIPS64.r28
= VG_(threads)[tid].arch.vex.guest_r28;
-# elif defined(VGA_tilegx)
- regs->r_pc = VG_(threads)[tid].arch.vex.guest_pc;
- regs->r_sp = VG_(threads)[tid].arch.vex.guest_r54;
- regs->misc.TILEGX.r52
- = VG_(threads)[tid].arch.vex.guest_r52;
- regs->misc.TILEGX.r55
- = VG_(threads)[tid].arch.vex.guest_r55;
# else
# error "Unknown arch"
# endif
(*f)(tid, "x28", vex->guest_X28);
(*f)(tid, "x29", vex->guest_X29);
(*f)(tid, "x30", vex->guest_X30);
-#elif defined(VGA_tilegx)
- (*f)(tid, "r0", vex->guest_r0 );
- (*f)(tid, "r1", vex->guest_r1 );
- (*f)(tid, "r2", vex->guest_r2 );
- (*f)(tid, "r3", vex->guest_r3 );
- (*f)(tid, "r4", vex->guest_r4 );
- (*f)(tid, "r5", vex->guest_r5 );
- (*f)(tid, "r6", vex->guest_r6 );
- (*f)(tid, "r7", vex->guest_r7 );
- (*f)(tid, "r8", vex->guest_r8 );
- (*f)(tid, "r9", vex->guest_r9 );
- (*f)(tid, "r10", vex->guest_r10);
- (*f)(tid, "r11", vex->guest_r11);
- (*f)(tid, "r12", vex->guest_r12);
- (*f)(tid, "r13", vex->guest_r13);
- (*f)(tid, "r14", vex->guest_r14);
- (*f)(tid, "r15", vex->guest_r15);
- (*f)(tid, "r16", vex->guest_r16);
- (*f)(tid, "r17", vex->guest_r17);
- (*f)(tid, "r18", vex->guest_r18);
- (*f)(tid, "r19", vex->guest_r19);
- (*f)(tid, "r20", vex->guest_r20);
- (*f)(tid, "r21", vex->guest_r21);
- (*f)(tid, "r22", vex->guest_r22);
- (*f)(tid, "r23", vex->guest_r23);
- (*f)(tid, "r24", vex->guest_r24);
- (*f)(tid, "r25", vex->guest_r25);
- (*f)(tid, "r26", vex->guest_r26);
- (*f)(tid, "r27", vex->guest_r27);
- (*f)(tid, "r28", vex->guest_r28);
- (*f)(tid, "r29", vex->guest_r29);
- (*f)(tid, "r30", vex->guest_r30);
- (*f)(tid, "r31", vex->guest_r31);
- (*f)(tid, "r32", vex->guest_r32);
- (*f)(tid, "r33", vex->guest_r33);
- (*f)(tid, "r34", vex->guest_r34);
- (*f)(tid, "r35", vex->guest_r35);
- (*f)(tid, "r36", vex->guest_r36);
- (*f)(tid, "r37", vex->guest_r37);
- (*f)(tid, "r38", vex->guest_r38);
- (*f)(tid, "r39", vex->guest_r39);
- (*f)(tid, "r40", vex->guest_r40);
- (*f)(tid, "r41", vex->guest_r41);
- (*f)(tid, "r42", vex->guest_r42);
- (*f)(tid, "r43", vex->guest_r43);
- (*f)(tid, "r44", vex->guest_r44);
- (*f)(tid, "r45", vex->guest_r45);
- (*f)(tid, "r46", vex->guest_r46);
- (*f)(tid, "r47", vex->guest_r47);
- (*f)(tid, "r48", vex->guest_r48);
- (*f)(tid, "r49", vex->guest_r49);
- (*f)(tid, "r50", vex->guest_r50);
- (*f)(tid, "r51", vex->guest_r51);
- (*f)(tid, "r52", vex->guest_r52);
- (*f)(tid, "r53", vex->guest_r53);
- (*f)(tid, "r54", vex->guest_r54);
- (*f)(tid, "r55", vex->guest_r55);
#else
# error Unknown arch
#endif
return True;
}
-#elif defined(VGA_tilegx)
- {
- va = VexArchTILEGX;
- vai.hwcaps = VEX_HWCAPS_TILEGX_BASE;
- vai.endness = VexEndnessLE;
-
- VG_(machine_get_cache_info)(&vai);
-
- return True;
- }
-
#else
# error "Unknown arch"
#endif
# elif defined(VGA_mips64)
return 8;
-# elif defined(VGA_tilegx)
- return 8;
-
# else
# error "Unknown arch"
# endif
|| defined(VGP_ppc32_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_s390x_linux) || defined(VGP_mips32_linux) \
|| defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
- || defined(VGP_tilegx_linux) || defined(VGP_x86_solaris) \
- || defined(VGP_amd64_solaris)
+ || defined(VGP_x86_solaris) || defined(VGP_amd64_solaris)
return f;
# elif defined(VGP_ppc64be_linux)
/* ppc64-linux uses the AIX scheme, in which f is a pointer to a
VG_TRACK(post_reg_write, Vg_CoreClientReq, tid,
offsetof(VexGuestS390XState, guest_r2),
sizeof(VG_(threads)[tid].arch.vex.guest_r2));
-# elif defined(VGA_tilegx)
- VG_(threads)[tid].arch.vex.guest_r0 = to_run;
- VG_TRACK(post_reg_write, Vg_CoreClientReq, tid,
- offsetof(VexGuestTILEGXState, guest_r0),
- sizeof(VG_(threads)[tid].arch.vex.guest_r0));
#else
I_die_here : architecture missing in m_main.c
#endif
"\tnop\n"
".previous\n"
);
-#elif defined(VGP_tilegx_linux)
-asm("\n"
- ".text\n"
- "\t.align 8\n"
- "\t.globl _start\n"
- "\t.type _start,@function\n"
- "_start:\n"
-
- "\tjal 1f\n"
- "1:\n"
-
- /* --FIXME, bundle them :) */
- /* r19 <- Addr(interim_stack) */
- "\tmoveli r19, hw2_last(vgPlain_interim_stack)\n"
- "\tshl16insli r19, r19, hw1(vgPlain_interim_stack)\n"
- "\tshl16insli r19, r19, hw0(vgPlain_interim_stack)\n"
-
- "\tmoveli r20, hw1("VG_STRINGIFY(VG_STACK_GUARD_SZB)")\n"
- "\tshl16insli r20, r20, hw0("VG_STRINGIFY(VG_STACK_GUARD_SZB)")\n"
- "\tmoveli r21, hw1("VG_STRINGIFY(VG_DEFAULT_STACK_ACTIVE_SZB)")\n"
- "\tshl16insli r21, r21, hw0("VG_STRINGIFY(VG_DEFAULT_STACK_ACTIVE_SZB)")\n"
- "\tadd r19, r19, r20\n"
- "\tadd r19, r19, r21\n"
-
- "\tmovei r12, 0x0F\n"
- "\tnor r12, zero, r12\n"
-
- "\tand r19, r19, r12\n"
-
- /* now r19 = &vgPlain_interim_stack + VG_STACK_GUARD_SZB +
- VG_STACK_ACTIVE_SZB rounded down to the nearest 16-byte
- boundary. And $54 is the original SP. Set the SP to r0 and
- call _start_in_C, passing it the initial SP. */
-
- "\tmove r0, r54\n" // r0 <- $sp (_start_in_C first arg)
- "\tmove r54, r19\n" // $sp <- r19 (new sp)
-
- "\tjal _start_in_C_linux\n"
-);
#else
# error "Unknown linux platform"
#endif
VgSmc VG_(clo_smc_check) = Vg_SmcAllNonFile;
#elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \
|| defined(VGA_arm) || defined(VGA_arm64) \
- || defined(VGA_mips32) || defined(VGA_mips64) \
- || defined(VGA_tilegx)
+ || defined(VGA_mips32) || defined(VGA_mips64)
VgSmc VG_(clo_smc_check) = Vg_SmcStack;
#else
# error "Unknown arch"
);
}
-# elif defined(VGP_tilegx_linux)
- if (0==VG_(strcmp)("Memcheck", VG_(details).name)) {
-
- add_hardwired_spec(
- "ld.so.1", "strlen",
- (Addr)&VG_(tilegx_linux_REDIR_FOR_strlen), NULL
- );
- }
-
# elif defined(VGP_x86_solaris)
/* If we're using memcheck, use these intercepts right from
the start, otherwise ld.so makes a lot of noise. */
#elif defined(VGA_mips32) || defined(VGA_mips64)
# define VG_CLREQ_ARGS guest_r12
# define VG_CLREQ_RET guest_r11
-#elif defined(VGA_tilegx)
-# define VG_CLREQ_ARGS guest_r12
-# define VG_CLREQ_RET guest_r11
#else
# error Unknown arch
#endif
+++ /dev/null
-
-/*--------------------------------------------------------------------*/
-/*--- Create/destroy signal delivery frames. ---*/
-/*--- sigframe-tilegx-linux.c ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#if defined(VGP_tilegx_linux)
-
-#include "pub_core_basics.h"
-#include "pub_core_vki.h"
-#include "pub_core_vkiscnums.h"
-#include "pub_core_threadstate.h"
-#include "pub_core_aspacemgr.h"
-#include "pub_core_libcbase.h"
-#include "pub_core_libcassert.h"
-#include "pub_core_libcprint.h"
-#include "pub_core_machine.h"
-#include "pub_core_options.h"
-#include "pub_core_sigframe.h"
-#include "pub_core_signals.h"
-#include "pub_core_tooliface.h"
-#include "pub_core_trampoline.h"
-#include "priv_sigframe.h"
-
-struct vg_sig_private
-{
- UInt magicPI;
- UInt sigNo_private;
- VexGuestTILEGXState vex_shadow1;
- VexGuestTILEGXState vex_shadow2;
-};
-
-#ifndef C_ABI_SAVE_AREA_SIZE
-#define C_ABI_SAVE_AREA_SIZE 16
-#endif
-struct rt_sigframe {
- unsigned char save_area[C_ABI_SAVE_AREA_SIZE]; /* caller save area */
- vki_siginfo_t rs_info;
- struct vki_ucontext rs_uc;
- struct vg_sig_private priv;
-};
-
-
-static
-void setup_sigcontext2 ( ThreadState* tst, struct vki_sigcontext **sc1,
- const vki_siginfo_t *si )
-{
-
- struct vki_sigcontext *sc = *sc1;
-
- VG_TRACK( pre_mem_write, Vg_CoreSignal, tst->tid, "signal frame mcontext",
- (Addr)sc, sizeof(unsigned long long)*34 );
- sc->gregs[0] = tst->arch.vex.guest_r0;
- sc->gregs[1] = tst->arch.vex.guest_r1;
- sc->gregs[2] = tst->arch.vex.guest_r2;
- sc->gregs[3] = tst->arch.vex.guest_r3;
- sc->gregs[4] = tst->arch.vex.guest_r4;
- sc->gregs[5] = tst->arch.vex.guest_r5;
- sc->gregs[6] = tst->arch.vex.guest_r6;
- sc->gregs[7] = tst->arch.vex.guest_r7;
- sc->gregs[8] = tst->arch.vex.guest_r8;
- sc->gregs[9] = tst->arch.vex.guest_r9;
- sc->gregs[10] = tst->arch.vex.guest_r10;
- sc->gregs[11] = tst->arch.vex.guest_r11;
- sc->gregs[12] = tst->arch.vex.guest_r12;
- sc->gregs[13] = tst->arch.vex.guest_r13;
- sc->gregs[14] = tst->arch.vex.guest_r14;
- sc->gregs[15] = tst->arch.vex.guest_r15;
- sc->gregs[16] = tst->arch.vex.guest_r16;
- sc->gregs[17] = tst->arch.vex.guest_r17;
- sc->gregs[18] = tst->arch.vex.guest_r18;
- sc->gregs[19] = tst->arch.vex.guest_r19;
- sc->gregs[20] = tst->arch.vex.guest_r20;
- sc->gregs[21] = tst->arch.vex.guest_r21;
- sc->gregs[22] = tst->arch.vex.guest_r22;
- sc->gregs[23] = tst->arch.vex.guest_r23;
- sc->gregs[24] = tst->arch.vex.guest_r24;
- sc->gregs[25] = tst->arch.vex.guest_r25;
- sc->gregs[26] = tst->arch.vex.guest_r26;
- sc->gregs[27] = tst->arch.vex.guest_r27;
- sc->gregs[28] = tst->arch.vex.guest_r28;
- sc->gregs[29] = tst->arch.vex.guest_r29;
- sc->gregs[30] = tst->arch.vex.guest_r30;
- sc->gregs[31] = tst->arch.vex.guest_r31;
- sc->gregs[32] = tst->arch.vex.guest_r32;
- sc->gregs[33] = tst->arch.vex.guest_r33;
- sc->gregs[34] = tst->arch.vex.guest_r34;
- sc->gregs[35] = tst->arch.vex.guest_r35;
- sc->gregs[36] = tst->arch.vex.guest_r36;
- sc->gregs[37] = tst->arch.vex.guest_r37;
- sc->gregs[38] = tst->arch.vex.guest_r38;
- sc->gregs[39] = tst->arch.vex.guest_r39;
- sc->gregs[40] = tst->arch.vex.guest_r40;
- sc->gregs[41] = tst->arch.vex.guest_r41;
- sc->gregs[42] = tst->arch.vex.guest_r42;
- sc->gregs[43] = tst->arch.vex.guest_r43;
- sc->gregs[44] = tst->arch.vex.guest_r44;
- sc->gregs[45] = tst->arch.vex.guest_r45;
- sc->gregs[46] = tst->arch.vex.guest_r46;
- sc->gregs[47] = tst->arch.vex.guest_r47;
- sc->gregs[48] = tst->arch.vex.guest_r48;
- sc->gregs[49] = tst->arch.vex.guest_r49;
- sc->gregs[50] = tst->arch.vex.guest_r50;
- sc->gregs[51] = tst->arch.vex.guest_r51;
- sc->gregs[52] = tst->arch.vex.guest_r52;
- sc->tp = tst->arch.vex.guest_r53;
- sc->sp = tst->arch.vex.guest_r54;
- sc->lr = tst->arch.vex.guest_r55;
- sc->pc = tst->arch.vex.guest_pc;
-}
-
-/* EXPORTED */
-void VG_(sigframe_create)( ThreadId tid,
- Bool on_altstack,
- Addr sp_top_of_frame,
- const vki_siginfo_t *siginfo,
- const struct vki_ucontext *siguc,
- void *handler,
- UInt flags,
- const vki_sigset_t *mask,
- void *restorer )
-{
- Addr sp;
- ThreadState* tst;
- Addr faultaddr;
- Int sigNo = siginfo->si_signo;
- struct vg_sig_private *priv;
-
- /* Stack must be 8-byte aligned */
- sp_top_of_frame &= ~0x7ULL;
-
- sp = sp_top_of_frame - sizeof(struct rt_sigframe);
-
- tst = VG_(get_ThreadState)(tid);
- if (! ML_(sf_maybe_extend_stack)(tst, sp, sizeof(struct rt_sigframe), flags))
- return;
-
- vg_assert(VG_IS_8_ALIGNED(sp));
-
- /* SIGILL defines addr to be the faulting address */
-
- faultaddr = (Addr)siginfo->_sifields._sigfault._addr;
- if (sigNo == VKI_SIGILL && siginfo->si_code > 0)
- faultaddr = tst->arch.vex.guest_pc;
-
-
- struct rt_sigframe *frame = (struct rt_sigframe *) sp;
- struct vki_ucontext *ucp = &frame->rs_uc;
- if (VG_(clo_trace_signals))
- VG_(printf)("rt_sigframe\n");
- /* Create siginfo. */
- VG_TRACK( pre_mem_write, Vg_CoreSignal, tid, "signal frame siginfo",
- (Addr)&frame->rs_info, sizeof(frame->rs_info) );
-
- VG_(memcpy)(&frame->rs_info, siginfo, sizeof(*siginfo));
-
- VG_TRACK( post_mem_write, Vg_CoreSignal, tid,
- (Addr)&frame->rs_info, sizeof(frame->rs_info) );
-
- /* Create the ucontext. */
- VG_TRACK( pre_mem_write, Vg_CoreSignal, tid, "signal frame ucontext",
- (Addr)ucp, offsetof(struct vki_ucontext, uc_mcontext) );
-
- ucp->uc_flags = 0;
- ucp->uc_link = 0;
- ucp->uc_stack = tst->altstack;
-
- VG_TRACK( post_mem_write, Vg_CoreSignal, tid, (Addr)ucp,
- offsetof(struct vki_ucontext, uc_mcontext) );
-
- struct vki_sigcontext *scp = &(frame->rs_uc.uc_mcontext);
- setup_sigcontext2(tst, &(scp), siginfo);
-
- ucp->uc_sigmask = tst->sig_mask;
-
- priv = &frame->priv;
-
- /*
- * Arguments to signal handler:
- *
- * r0 = signal number
- * r1 = 0 (should be cause)
- * r2 = pointer to ucontext
- *
- * r54 points to the struct rt_sigframe.
- */
-
- tst->arch.vex.guest_r0 = siginfo->si_signo;
- tst->arch.vex.guest_r1 = (Addr) &frame->rs_info;
- tst->arch.vex.guest_r2 = (Addr) &frame->rs_uc;
- tst->arch.vex.guest_r54 = (Addr) frame;
-
- if (flags & VKI_SA_RESTORER)
- {
- tst->arch.vex.guest_r55 = (Addr) restorer;
- }
- else
- {
- tst->arch.vex.guest_r55 = (Addr)&VG_(tilegx_linux_SUBST_FOR_rt_sigreturn);
- }
-
- priv->magicPI = 0x31415927;
- priv->sigNo_private = sigNo;
- priv->vex_shadow1 = tst->arch.vex_shadow1;
- priv->vex_shadow2 = tst->arch.vex_shadow2;
- /* Set the thread so it will next run the handler. */
- /* tst->m_sp = sp; also notify the tool we've updated SP */
- VG_TRACK( post_reg_write, Vg_CoreSignal, tid, VG_O_STACK_PTR, sizeof(Addr));
- if (VG_(clo_trace_signals))
- VG_(printf)("handler = %p\n", handler);
- tst->arch.vex.guest_pc = (Addr) handler;
- /* This thread needs to be marked runnable, but we leave that the
- caller to do. */
-}
-
-/* EXPORTED */
-void VG_(sigframe_destroy)( ThreadId tid, Bool isRT )
-{
- ThreadState *tst;
- struct vg_sig_private *priv1;
- Addr sp;
- UInt frame_size;
- struct vki_sigcontext *mc;
- Int sigNo;
- Bool has_siginfo = isRT;
-
- vg_assert(VG_(is_valid_tid)(tid));
- tst = VG_(get_ThreadState)(tid);
- sp = tst->arch.vex.guest_r54 + 8;
- if (has_siginfo)
- {
- struct rt_sigframe *frame = (struct rt_sigframe *)sp;
- struct vki_ucontext *ucp = &frame->rs_uc;
-
- if (0)
- VG_(printf)("destroy signal frame; sp = %lx, "
- " %pc = %lx, status=%d\n",
- (Addr)frame, tst->arch.vex.guest_pc, (Int)tst->status);
-
- frame_size = sizeof(*frame);
- mc = &ucp->uc_mcontext;
- priv1 = &frame->priv;
- vg_assert(priv1->magicPI == 0x31415927);
- sigNo = priv1->sigNo_private;
- }
- else
- {
- vg_assert(0);
- }
-
- //restore regs
- tst->arch.vex.guest_r0 = mc->gregs[0];
- tst->arch.vex.guest_r1 = mc->gregs[1];
- tst->arch.vex.guest_r2 = mc->gregs[2];
- tst->arch.vex.guest_r3 = mc->gregs[3];
- tst->arch.vex.guest_r4 = mc->gregs[4];
- tst->arch.vex.guest_r5 = mc->gregs[5];
- tst->arch.vex.guest_r6 = mc->gregs[6];
- tst->arch.vex.guest_r7 = mc->gregs[7];
- tst->arch.vex.guest_r8 = mc->gregs[8];
- tst->arch.vex.guest_r9 = mc->gregs[9];
- tst->arch.vex.guest_r10 = mc->gregs[10];
- tst->arch.vex.guest_r11 = mc->gregs[11];
- tst->arch.vex.guest_r12 = mc->gregs[12];
- tst->arch.vex.guest_r13 = mc->gregs[13];
- tst->arch.vex.guest_r14 = mc->gregs[14];
- tst->arch.vex.guest_r15 = mc->gregs[15];
- tst->arch.vex.guest_r16 = mc->gregs[16];
- tst->arch.vex.guest_r17 = mc->gregs[17];
- tst->arch.vex.guest_r18 = mc->gregs[18];
- tst->arch.vex.guest_r19 = mc->gregs[19];
- tst->arch.vex.guest_r20 = mc->gregs[20];
- tst->arch.vex.guest_r21 = mc->gregs[21];
- tst->arch.vex.guest_r22 = mc->gregs[22];
- tst->arch.vex.guest_r23 = mc->gregs[23];
- tst->arch.vex.guest_r24 = mc->gregs[24];
- tst->arch.vex.guest_r25 = mc->gregs[25];
- tst->arch.vex.guest_r26 = mc->gregs[26];
- tst->arch.vex.guest_r27 = mc->gregs[27];
- tst->arch.vex.guest_r28 = mc->gregs[28];
- tst->arch.vex.guest_r29 = mc->gregs[29];
- tst->arch.vex.guest_r30 = mc->gregs[30];
- tst->arch.vex.guest_r31 = mc->gregs[31];
- tst->arch.vex.guest_r32 = mc->gregs[32];
- tst->arch.vex.guest_r33 = mc->gregs[33];
- tst->arch.vex.guest_r34 = mc->gregs[34];
- tst->arch.vex.guest_r35 = mc->gregs[35];
- tst->arch.vex.guest_r36 = mc->gregs[36];
- tst->arch.vex.guest_r37 = mc->gregs[37];
- tst->arch.vex.guest_r38 = mc->gregs[38];
- tst->arch.vex.guest_r39 = mc->gregs[39];
- tst->arch.vex.guest_r40 = mc->gregs[40];
- tst->arch.vex.guest_r41 = mc->gregs[41];
- tst->arch.vex.guest_r42 = mc->gregs[42];
- tst->arch.vex.guest_r43 = mc->gregs[43];
- tst->arch.vex.guest_r44 = mc->gregs[44];
- tst->arch.vex.guest_r45 = mc->gregs[45];
- tst->arch.vex.guest_r46 = mc->gregs[46];
- tst->arch.vex.guest_r47 = mc->gregs[47];
- tst->arch.vex.guest_r48 = mc->gregs[48];
- tst->arch.vex.guest_r49 = mc->gregs[49];
- tst->arch.vex.guest_r50 = mc->gregs[50];
- tst->arch.vex.guest_r51 = mc->gregs[51];
- tst->arch.vex.guest_r52 = mc->gregs[52];
- tst->arch.vex.guest_r53 = mc->tp;
- tst->arch.vex.guest_r54 = mc->sp;
- tst->arch.vex.guest_r55 = mc->lr;
- tst->arch.vex.guest_pc = mc->pc;
-
- VG_TRACK(die_mem_stack_signal, sp, frame_size);
- if (VG_(clo_trace_signals))
- VG_(message)( Vg_DebugMsg,
- "VG_(signal_return) (thread %u): isRT=%d valid magic; EIP=%#x\n",
- tid, isRT, tst->arch.vex.guest_pc);
- /* tell the tools */
- VG_TRACK( post_deliver_signal, tid, sigNo );
-}
-
-#endif // defined(VGP_tilegx_linux)
-
-/*--------------------------------------------------------------------*/
-/*--- end sigframe-tilegx-linux.c ---*/
-/*--------------------------------------------------------------------*/
(srP)->misc.MIPS64.r28 = (uc)->uc_mcontext.sc_regs[28]; \
}
-#elif defined(VGP_tilegx_linux)
-# define VG_UCONTEXT_INSTR_PTR(uc) ((uc)->uc_mcontext.pc)
-# define VG_UCONTEXT_STACK_PTR(uc) ((uc)->uc_mcontext.sp)
-# define VG_UCONTEXT_FRAME_PTR(uc) ((uc)->uc_mcontext.gregs[52])
-# define VG_UCONTEXT_SYSCALL_NUM(uc) ((uc)->uc_mcontext.gregs[10])
-# define VG_UCONTEXT_SYSCALL_SYSRES(uc) \
- /* Convert the value in uc_mcontext.rax into a SysRes. */ \
- VG_(mk_SysRes_tilegx_linux)((uc)->uc_mcontext.gregs[0])
-# define VG_UCONTEXT_TO_UnwindStartRegs(srP, uc) \
- { (srP)->r_pc = (uc)->uc_mcontext.pc; \
- (srP)->r_sp = (uc)->uc_mcontext.sp; \
- (srP)->misc.TILEGX.r52 = (uc)->uc_mcontext.gregs[52]; \
- (srP)->misc.TILEGX.r55 = (uc)->uc_mcontext.lr; \
- }
-
#elif defined(VGP_x86_solaris)
# define VG_UCONTEXT_INSTR_PTR(uc) ((Addr)(uc)->uc_mcontext.gregs[VKI_EIP])
# define VG_UCONTEXT_STACK_PTR(uc) ((Addr)(uc)->uc_mcontext.gregs[VKI_UESP])
" syscall\n" \
".previous\n"
-#elif defined(VGP_tilegx_linux)
-# define _MY_SIGRETURN(name) \
- ".text\n" \
- "my_sigreturn:\n" \
- " moveli r10 ," #name "\n" \
- " swint1\n" \
- ".previous\n"
-
#elif defined(VGP_x86_solaris) || defined(VGP_amd64_solaris)
/* Not used on Solaris. */
# define _MY_SIGRETURN(name) \
#endif
-/* ------------------------ tilegx ------------------------- */
-#if defined(VGP_tilegx_linux)
-UInt VG_(get_StackTrace_wrk) ( ThreadId tid_if_known,
- /*OUT*/Addr* ips, UInt max_n_ips,
- /*OUT*/Addr* sps, /*OUT*/Addr* fps,
- const UnwindStartRegs* startRegs,
- Addr fp_max_orig )
-{
- Bool debug = False;
- Int i;
- Addr fp_max;
- UInt n_found = 0;
- const Int cmrf = VG_(clo_merge_recursive_frames);
-
- vg_assert(sizeof(Addr) == sizeof(UWord));
- vg_assert(sizeof(Addr) == sizeof(void*));
-
- D3UnwindRegs uregs;
- uregs.pc = startRegs->r_pc;
- uregs.sp = startRegs->r_sp;
- Addr fp_min = uregs.sp - VG_STACK_REDZONE_SZB;
-
- uregs.fp = startRegs->misc.TILEGX.r52;
- uregs.lr = startRegs->misc.TILEGX.r55;
-
- fp_max = VG_PGROUNDUP(fp_max_orig);
- if (fp_max >= sizeof(Addr))
- fp_max -= sizeof(Addr);
-
- if (debug)
- VG_(printf)("max_n_ips=%u fp_min=0x%lx fp_max_orig=0x%lx, "
- "fp_max=0x%lx pc=0x%lx sp=0x%lx fp=0x%lx\n",
- max_n_ips, fp_min, fp_max_orig, fp_max,
- uregs.pc, uregs.sp, uregs.fp);
-
- if (sps) sps[0] = uregs.sp;
- if (fps) fps[0] = uregs.fp;
- ips[0] = uregs.pc;
- i = 1;
-
- /* Loop unwinding the stack. */
- while (True) {
- if (debug) {
- VG_(printf)("i: %d, pc: 0x%lx, sp: 0x%lx, lr: 0x%lx\n",
- i, uregs.pc, uregs.sp, uregs.lr);
- }
- if (i >= max_n_ips)
- break;
-
- D3UnwindRegs uregs_copy = uregs;
- if (VG_(use_CF_info)( &uregs, fp_min, fp_max )) {
- if (debug)
- VG_(printf)("USING CFI: pc: 0x%lx, sp: 0x%lx, fp: 0x%lx, lr: 0x%lx\n",
- uregs.pc, uregs.sp, uregs.fp, uregs.lr);
- if (0 != uregs.pc && 1 != uregs.pc &&
- (uregs.pc < fp_min || uregs.pc > fp_max)) {
- if (sps) sps[i] = uregs.sp;
- if (fps) fps[i] = uregs.fp;
- if (uregs.pc != uregs_copy.pc && uregs.sp != uregs_copy.sp)
- ips[i++] = uregs.pc - 8;
- uregs.pc = uregs.pc - 8;
- RECURSIVE_MERGE(cmrf,ips,i);
- continue;
- } else
- uregs = uregs_copy;
- }
-
- Long frame_offset = 0;
- PtrdiffT offset;
- if (VG_(get_inst_offset_in_function)(uregs.pc, &offset)) {
- Addr start_pc = uregs.pc;
- Addr limit_pc = uregs.pc - offset;
- Addr cur_pc;
- /* Try to find any stack adjustment from current instruction
- bundles downward. */
- for (cur_pc = start_pc; cur_pc > limit_pc; cur_pc -= 8) {
- ULong inst;
- Long off = 0;
- ULong* cur_inst;
- /* Fetch the instruction. */
- cur_inst = (ULong *)cur_pc;
- inst = *cur_inst;
- if(debug)
- VG_(printf)("cur_pc: 0x%lx, inst: 0x%lx\n", cur_pc, inst);
-
- if ((inst & 0xC000000000000000ULL) == 0) {
- /* Bundle is X type. */
- if ((inst & 0xC000000070000fffULL) ==
- (0x0000000010000db6ULL)) {
- /* addli at X0 */
- off = (short)(0xFFFF & (inst >> 12));
- } else if ((inst & 0xF80007ff80000000ULL) ==
- (0x000006db00000000ULL)) {
- /* addli at X1 addli*/
- off = (short)(0xFFFF & (inst >> 43));
- } else if ((inst & 0xC00000007FF00FFFULL) ==
- (0x0000000040100db6ULL)) {
- /* addi at X0 */
- off = (char)(0xFF & (inst >> 12));
- } else if ((inst & 0xFFF807ff80000000ULL) ==
- (0x180806db00000000ULL)) {
- /* addi at X1 */
- off = (char)(0xFF & (inst >> 43));
- }
- } else {
- /* Bundle is Y type. */
- if ((inst & 0x0000000078000FFFULL) ==
- (0x0000000000000db6ULL)) {
- /* addi at Y0 */
- off = (char)(0xFF & (inst >> 12));
- } else if ((inst & 0x3C0007FF80000000ULL) ==
- (0x040006db00000000ULL)) {
- /* addi at Y1 */
- off = (char)(0xFF & (inst >> 43));
- }
- }
-
- if(debug && off)
- VG_(printf)("offset: -0x%lx\n", -off);
-
- if (off < 0) {
- /* frame offset should be modular of 8 */
- vg_assert((off & 7) == 0);
- frame_offset += off;
- } else if (off > 0)
- /* Exit loop if a positive stack adjustment is found, which
- usually means that the stack cleanup code in the function
- epilogue is reached. */
- break;
- }
- }
-
- if (frame_offset < 0) {
- if (0 == uregs.pc || 1 == uregs.pc) break;
-
- /* Subtract the offset from the current stack. */
- uregs.sp = uregs.sp + (ULong)(-frame_offset);
-
- if (debug)
- VG_(printf)("offset: i: %d, pc: 0x%lx, sp: 0x%lx, lr: 0x%lx\n",
- i, uregs.pc, uregs.sp, uregs.lr);
-
- if (uregs.pc == uregs.lr - 8 ||
- uregs.lr - 8 >= fp_min && uregs.lr - 8 <= fp_max) {
- if (debug)
- VG_(printf)("new lr = 0x%lx\n", *(ULong*)uregs.sp);
- uregs.lr = *(ULong*)uregs.sp;
- }
-
- uregs.pc = uregs.lr - 8;
-
- if (uregs.lr != 0) {
- /* Avoid the invalid pc = 0xffff...ff8 */
- if (sps)
- sps[i] = uregs.sp;
-
- if (fps)
- fps[i] = fps[0];
-
- ips[i++] = uregs.pc;
-
- RECURSIVE_MERGE(cmrf,ips,i);
- }
- continue;
- }
-
- /* A special case for the 1st frame. Assume it was a bad jump.
- Use the link register "lr" and current stack and frame to
- try again. */
- if (i == 1) {
- if (sps) {
- sps[1] = sps[0];
- uregs.sp = sps[0];
- }
- if (fps) {
- fps[1] = fps[0];
- uregs.fp = fps[0];
- }
- if (0 == uregs.lr || 1 == uregs.lr)
- break;
-
- uregs.pc = uregs.lr - 8;
- ips[i++] = uregs.lr - 8;
- RECURSIVE_MERGE(cmrf,ips,i);
- continue;
- }
- /* No luck. We have to give up. */
- break;
- }
-
- if (debug) {
- /* Display the back trace. */
- Int ii ;
- for ( ii = 0; ii < i; ii++) {
- if (sps) {
- VG_(printf)("%d: pc=%lx ", ii, ips[ii]);
- VG_(printf)("sp=%lx\n", sps[ii]);
- } else {
- VG_(printf)("%d: pc=%lx\n", ii, ips[ii]);
- }
- }
- }
-
- n_found = i;
- return n_found;
-}
-#endif
-
/*------------------------------------------------------------*/
/*--- ---*/
/*--- END platform-dependent unwinder worker functions ---*/
return res;
}
-SysRes VG_(mk_SysRes_tilegx_linux) ( Long val ) {
- SysRes res;
- res._isError = val >= -4095 && val <= -1;
- if (res._isError) {
- res._val = (ULong)(-val);
- } else {
- res._val = (ULong)val;
- }
- return res;
-}
-
/* PPC uses the CR7.SO bit to flag an error (CR0 in IBM-speak) */
/* Note this must be in the bottom bit of the second arg */
SysRes VG_(mk_SysRes_ppc32_linux) ( UInt val, UInt cr0so ) {
".previous \n\t"
);
-#elif defined(VGP_tilegx_linux)
-extern UWord do_syscall_WRK (
- UWord syscall_no,
- UWord a1, UWord a2, UWord a3,
- UWord a4, UWord a5, UWord a6
- );
-asm(
- ".text\n"
- "do_syscall_WRK:\n"
- "move r10, r0\n"
- "move r0, r1\n"
- "move r1, r2\n"
- "move r2, r3\n"
- "move r3, r4\n"
- "move r4, r5\n"
- "move r5, r6\n"
- "swint1\n"
- "jrp lr\n"
- ".previous\n"
- );
-
#elif defined(VGP_x86_solaris)
extern ULong
ULong A3 = (ULong)v1_a3[1];
return VG_(mk_SysRes_mips64_linux)( V0, V1, A3 );
-# elif defined(VGP_tilegx_linux)
- UWord val = do_syscall_WRK(sysno,a1,a2,a3,a4,a5,a6);
-
- return VG_(mk_SysRes_tilegx_linux)( val );
-
# elif defined(VGP_x86_solaris)
UInt val, val2, err = False;
Bool restart;
Int* child_tid, //stack 16 48
Int* parent_tid, //stack 20 52
void* tls_ptr); //stack 24 56
-extern Long do_syscall_clone_tilegx_linux ( Word (*fn) (void *), //r0
- void* stack, //r1
- Long flags, //r2
- void* arg, //r3
- Long* child_tid, //r4
- Long* parent_tid, //r5
- void* tls_ptr ); //r6
- #endif // __PRIV_SYSWRAP_LINUX_H
+#endif // __PRIV_SYSWRAP_LINUX_H
/*--------------------------------------------------------------------*/
/*--- end ---*/
|| defined(VGP_ppc32_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_arm_linux) || defined(VGP_s390x_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
- || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
Int o_arg1;
Int o_arg2;
Int o_arg3;
+++ /dev/null
-/*--------------------------------------------------------------------*/
-/*--- Support for doing system calls. syscall-tilegx-linux.S ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2012 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#include "pub_core_basics_asm.h"
-
-#if defined(VGP_tilegx_linux)
-
-#include "pub_core_vkiscnums_asm.h"
-#include "libvex_guest_offsets.h"
-
-
-/*----------------------------------------------------------------*/
-/*
- Perform a syscall for the client. This will run a syscall
- with the client's specific per-thread signal mask.
-
- The structure of this function is such that, if the syscall is
- interrupted by a signal, we can determine exactly what
- execution state we were in with respect to the execution of
- the syscall by examining the value of IP in the signal
- handler. This means that we can always do the appropriate
- thing to precisely emulate the kernel's signal/syscall
- interactions.
-
- The syscall number is taken from the argument, even though it
- should also be in regs->v0. The syscall result is written
- back to regs->v0 on completion.
-
- Returns 0 if the syscall was successfully called (even if the
- syscall itself failed), or a nonzero error code in the lowest
- 8 bits if one of the sigprocmasks failed (there's no way to
- determine which one failed). And there's no obvious way to
- recover from that either, but nevertheless we want to know.
-
- VG_(fixup_guest_state_after_syscall_interrupted) does the
- thread state fixup in the case where we were interrupted by a
- signal.
-
- Prototype:
-
- UWord ML_(do_syscall_for_client_WRK)(
- Int syscallno, // r0
- void* guest_state, // r1
- const vki_sigset_t *sysmask, // r2
- const vki_sigset_t *postmask, // r3
- Int nsigwords) // r4
-*/
-/* from vki_arch.h */
-#define VKI_SIG_SETMASK 2
-
-.globl ML_(do_syscall_for_client_WRK)
-ML_(do_syscall_for_client_WRK):
-
- addli sp, sp, -64 // alloc 64B new stack space
- addli r29, sp, 56 // r29 points to offset 56 above sp
- st_add r29, r0, -8 // save r0
- // offset 48
- st_add r29, r1, -8 // save r1
- // offset 40
- st_add r29, r2, -8 // save r2
- // offset 32
- st_add r29, r3, -8 // save r3
- // offset 24
- st_add r29, r4, -8 // save r4
- // offset 16
- st r29, lr // save lr
-1:
- {
- moveli r10, __NR_rt_sigprocmask
- moveli r0, VKI_SIG_SETMASK
- }
- {
- move r1, r2
- move r2, r3
- }
- move r3, r4
- swint1
-
- // error, go 7f
- bnez r1, 7f
-
- /* Get registers from guest_state. */
- addli r29, sp, 56 // get syscallno
- ld r10, r29
- addli r29, sp, 48
- ld r29, r29 // r29 points to guest_state
- ld_add r0, r29, 8 // read r0
- ld_add r1, r29, 8 // read r1
- ld_add r2, r29, 8 // read r2
- ld_add r3, r29, 8 // read r3
- ld_add r4, r29, 8 // read r4
- ld_add r5, r29, 8 // read r5
-
-2: swint1 // syscall
-3:
- // Write register into guest_state
- addli r29, sp, 48
- ld r29, r29
- st_add r29, r0, 8
- st_add r29, r1, 8
- st_add r29, r2, 8
- st_add r29, r3, 8
- st_add r29, r4, 8
- st_add r29, r5, 8
- nop
-4:
- {
- moveli r10, __NR_rt_sigprocmask
- moveli r0, VKI_SIG_SETMASK
- }
- addli r29, sp, 32
- {
- ld r1, r29
- movei r2, 0
- }
- addli r29, sp, 24
- ld r3, r29
-
- swint1
- // error, go 7f
- bnez r1, 7f
- nop
-5: addli r29, sp, 16
- {
- ld lr, r29 // restore lr
- addli sp, sp, 64
- }
- jr lr
-
-7: addi r29, sp, 16
- {
- ld lr, r29 // restore lr
- addi sp, sp, 64
- }
- {
- // r0 = 0x8000
- shl16insli r0, zero, -0x8000
- jr lr
- }
-
- .section .rodata
- /* export the ranges so that
- VG_(fixup_guest_state_after_syscall_interrupted) can do the
- right thing */
-
- .globl ML_(blksys_setup)
- .globl ML_(blksys_restart)
- .globl ML_(blksys_complete)
- .globl ML_(blksys_committed)
- .globl ML_(blksys_finished)
- ML_(blksys_setup): .quad 1b
- ML_(blksys_restart): .quad 2b
- ML_(blksys_complete): .quad 3b
- ML_(blksys_committed): .quad 4b
- ML_(blksys_finished): .quad 5b
- .previous
-
-#endif /* defined(VGP_tilegx_linux) */
-
-/* Let the linker know we don't need an executable stack */
-MARK_STACK_NO_EXEC
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
-
: "r" (VgTs_Empty), "n" (__NR_exit), "m" (tst->os_state.exitcode)
: "cc", "memory" , "v0", "a0"
);
-#elif defined(VGP_tilegx_linux)
- asm volatile (
- "st4 %0, %1\n" /* set tst->status = VgTs_Empty */
- "moveli r10, %2\n" /* set r10 = __NR_exit */
- "move r0, %3\n" /* set r0 = tst->os_state.exitcode */
- "swint1\n" /* exit(tst->os_state.exitcode) */
- : "=m" (tst->status)
- : "r" (VgTs_Empty), "n" (__NR_exit), "r" (tst->os_state.exitcode)
- : "r0", "r1", "r2", "r3", "r4", "r5");
#else
# error Unknown platform
#endif
/* High half word64 is syscall return value. Low half is
the entire CR, from which we need to extract CR0.SO. */
res = VG_ (mk_SysRes_mips32_linux) (/*val */ ret, 0, /*errflag */ 0);
-#elif defined(VGP_tilegx_linux)
- Long ret = 0;
- ctst->arch.vex.guest_r0 = 0;
- ctst->arch.vex.guest_r3 = 0;
- ret = do_syscall_clone_tilegx_linux
- (ML_ (start_thread_NORETURN), stack, flags, ctst,
- child_tidptr, parent_tidptr, NULL);
- /* High half word64 is syscall return value. */
- res = VG_(mk_SysRes_tilegx_linux) (/*val */ ret);
#else
# error Unknown platform
#endif
#elif defined(VGP_mips32_linux)
ctst->arch.vex.guest_ULR = tlsaddr;
ctst->arch.vex.guest_r27 = tlsaddr;
-#elif defined(VGP_tilegx_linux)
- ctst->arch.vex.guest_r53 = tlsaddr;
#else
# error Unknown platform
#endif
VG_TRACK( pre_thread_ll_exit, ctid );
}
-#if defined(VGP_tilegx_linux)
- // ??? why do we set unconditionally r0 to 0, even when error out ???
- ptst->arch.vex.guest_r0 = 0;
-#endif
-
return res;
}
res = VG_(do_syscall5)( __NR_clone, flags,
(UWord)NULL, (UWord)parent_tidptr,
(UWord)NULL, (UWord)child_tidptr );
-#elif defined(VGP_amd64_linux) || defined(VGP_tilegx_linux)
+#elif defined(VGP_amd64_linux)
/* note that the last two arguments are the opposite way round to x86 and
ppc32 as the amd64 kernel expects the arguments in a different order */
res = VG_(do_syscall5)( __NR_clone, flags,
#define PRA_CHILD_TIDPTR PRA5
#define ARG_TLS ARG4
#define PRA_TLS PRA4
-#elif defined(VGP_amd64_linux) || defined(VGP_tilegx_linux) \
- || defined(VGP_s390x_linux)
+#elif defined(VGP_amd64_linux) || defined(VGP_s390x_linux)
#define ARG_CHILD_TIDPTR ARG4
#define PRA_CHILD_TIDPTR PRA4
#define ARG_TLS ARG5
#endif
#if defined(VGP_amd64_linux) || defined(VGP_s390x_linux) \
- || defined(VGP_tilegx_linux) || defined(VGP_arm64_linux)
+ || defined(VGP_arm64_linux)
PRE(sys_lookup_dcookie)
{
*flags |= SfMayBlock;
canonical->arg7 = 0;
canonical->arg8 = 0;
-#elif defined(VGP_tilegx_linux)
- VexGuestTILEGXState* gst = (VexGuestTILEGXState*)gst_vanilla;
- canonical->sysno = gst->guest_r10;
- canonical->arg1 = gst->guest_r0;
- canonical->arg2 = gst->guest_r1;
- canonical->arg3 = gst->guest_r2;
- canonical->arg4 = gst->guest_r3;
- canonical->arg5 = gst->guest_r4;
- canonical->arg6 = gst->guest_r5;
- canonical->arg7 = 0;
- canonical->arg8 = 0;
-
#elif defined(VGP_x86_solaris)
VexGuestX86State* gst = (VexGuestX86State*)gst_vanilla;
UWord *stack = (UWord *)gst->guest_ESP;
gst->guest_r8 = canonical->arg5;
gst->guest_r9 = canonical->arg6;
-#elif defined(VGP_tilegx_linux)
- VexGuestTILEGXState* gst = (VexGuestTILEGXState*)gst_vanilla;
- gst->guest_r10 = canonical->sysno;
- gst->guest_r0 = canonical->arg1;
- gst->guest_r1 = canonical->arg2;
- gst->guest_r2 = canonical->arg3;
- gst->guest_r3 = canonical->arg4;
- gst->guest_r4 = canonical->arg5;
- gst->guest_r5 = canonical->arg6;
-
#elif defined(VGP_x86_solaris)
VexGuestX86State* gst = (VexGuestX86State*)gst_vanilla;
UWord *stack = (UWord *)gst->guest_ESP;
canonical->sres = VG_(mk_SysRes_s390x_linux)( gst->guest_r2 );
canonical->what = SsComplete;
-# elif defined(VGP_tilegx_linux)
- VexGuestTILEGXState* gst = (VexGuestTILEGXState*)gst_vanilla;
- canonical->sres = VG_(mk_SysRes_tilegx_linux)( gst->guest_r0 );
- canonical->what = SsComplete;
-
# elif defined(VGP_x86_solaris)
VexGuestX86State* gst = (VexGuestX86State*)gst_vanilla;
UInt carry = 1 & LibVEX_GuestX86_get_eflags(gst);
VG_TRACK( post_reg_write, Vg_CoreSysCall, tid,
OFFSET_mips64_r7, sizeof(UWord) );
-# elif defined(VGP_tilegx_linux)
- VexGuestTILEGXState* gst = (VexGuestTILEGXState*)gst_vanilla;
- vg_assert(canonical->what == SsComplete);
- if (sr_isError(canonical->sres)) {
- gst->guest_r0 = - (Long)sr_Err(canonical->sres);
- // r1 hold errno
- gst->guest_r1 = (Long)sr_Err(canonical->sres);
- } else {
- gst->guest_r0 = sr_Res(canonical->sres);
- gst->guest_r1 = 0;
- }
-
# elif defined(VGP_x86_solaris)
VexGuestX86State* gst = (VexGuestX86State*)gst_vanilla;
SysRes sres = canonical->sres;
layout->uu_arg7 = -1; /* impossible value */
layout->uu_arg8 = -1; /* impossible value */
-#elif defined(VGP_tilegx_linux)
- layout->o_sysno = OFFSET_tilegx_r(10);
- layout->o_arg1 = OFFSET_tilegx_r(0);
- layout->o_arg2 = OFFSET_tilegx_r(1);
- layout->o_arg3 = OFFSET_tilegx_r(2);
- layout->o_arg4 = OFFSET_tilegx_r(3);
- layout->o_arg5 = OFFSET_tilegx_r(4);
- layout->o_arg6 = OFFSET_tilegx_r(5);
- layout->uu_arg7 = -1; /* impossible value */
- layout->uu_arg8 = -1; /* impossible value */
-
#elif defined(VGP_x86_solaris)
layout->o_sysno = OFFSET_x86_EAX;
/* Syscall parameters are on the stack. */
# error "Unknown endianness"
# endif
}
-#elif defined(VGP_tilegx_linux)
- arch->vex.guest_pc -= 8; // sizeof({ swint1 })
-
- /* Make sure our caller is actually sane, and we're really backing
- back over a syscall. no other instruction in same bundle.
- */
- {
- unsigned long *p = (unsigned long *)arch->vex.guest_pc;
-
- if (p[0] != 0x286b180051485000ULL ) // "swint1", little enidan only
- VG_(message)(Vg_DebugMsg,
- "?! restarting over syscall at 0x%lx %lx\n",
- arch->vex.guest_pc, p[0]);
- vg_assert(p[0] == 0x286b180051485000ULL);
- }
#elif defined(VGP_x86_solaris)
arch->vex.guest_EIP -= 2; // sizeof(int $0x91) or sizeof(syscall)
+++ /dev/null
-
-/*--------------------------------------------------------------------*/
-/*--- Platform-specific syscalls stuff. syswrap-tilegx-linux.c ----*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu */
-
-#if defined(VGP_tilegx_linux)
-#include "pub_core_basics.h"
-#include "pub_core_vki.h"
-#include "pub_core_vkiscnums.h"
-#include "pub_core_threadstate.h"
-#include "pub_core_aspacemgr.h"
-#include "pub_core_debuglog.h"
-#include "pub_core_libcbase.h"
-#include "pub_core_libcassert.h"
-#include "pub_core_libcprint.h"
-#include "pub_core_libcproc.h"
-#include "pub_core_libcsignal.h"
-#include "pub_core_options.h"
-#include "pub_core_scheduler.h"
-#include "pub_core_sigframe.h" // For VG_(sigframe_destroy)()
-#include "pub_core_signals.h"
-#include "pub_core_syscall.h"
-#include "pub_core_syswrap.h"
-#include "pub_core_tooliface.h"
-#include "pub_core_stacks.h" // VG_(register_stack)
-#include "pub_core_transtab.h" // VG_(discard_translations)
-#include "priv_types_n_macros.h"
-#include "priv_syswrap-generic.h" /* for decls of generic wrappers */
-#include "priv_syswrap-linux.h" /* for decls of linux wrappers */
-#include "priv_syswrap-main.h"
-
-#include "pub_core_debuginfo.h" // VG_(di_notify_*)
-#include "pub_core_xarray.h"
-#include "pub_core_clientstate.h" // VG_(brk_base), VG_(brk_limit)
-#include "pub_core_errormgr.h"
-#include "pub_core_libcfile.h"
-#include "pub_core_machine.h" // VG_(get_SP)
-#include "pub_core_mallocfree.h"
-#include "pub_core_stacktrace.h" // For VG_(get_and_pp_StackTrace)()
-#include "pub_core_ume.h"
-
-#include "config.h"
-
-/* ---------------------------------------------------------------------
- clone() handling
- ------------------------------------------------------------------ */
-/* Call f(arg1), but first switch stacks, using 'stack' as the new
- stack, and use 'retaddr' as f's return-to address. Also, clear all
- the integer registers before entering f.*/
-
-__attribute__ ((noreturn))
-void ML_(call_on_new_stack_0_1) (Addr stack, Addr retaddr,
- void (*f) (Word), Word arg1);
- // r0 = stack
- // r1 = retaddr
- // r2 = f
- // r3 = arg1
- asm (
- ".text\n"
- ".globl vgModuleLocal_call_on_new_stack_0_1\n"
- "vgModuleLocal_call_on_new_stack_0_1:\n"
- " {\n"
- " move sp, r0\n\t"
- " move r51, r2\n\t"
- " }\n"
- " {\n"
- " move r0, r3\n\t"
- " move r1, zero\n\t"
- " }\n"
- " {\n"
- " move r2, zero\n\t"
- " move r3, zero\n\t"
- " }\n"
- " {\n"
- " move r4, zero\n\t"
- " move r5, zero\n\t"
- " }\n"
- " {\n"
- " move r6, zero\n\t"
- " move r7, zero\n\t"
- " }\n"
- " {\n"
- " move r8, zero\n\t"
- " move r9, zero\n\t"
- " }\n"
- " {\n"
- " move r10, zero\n\t"
- " move r11, zero\n\t"
- " }\n"
- " {\n"
- " move r12, zero\n\t"
- " move r13, zero\n\t"
- " }\n"
- " {\n"
- " move r14, zero\n\t"
- " move r15, zero\n\t"
- " }\n"
- " {\n"
- " move r16, zero\n\t"
- " move r17, zero\n\t"
- " }\n"
- " {\n"
- " move r18, zero\n\t"
- " move r19, zero\n\t"
- " }\n"
- " {\n"
- " move r20, zero\n\t"
- " move r21, zero\n\t"
- " }\n"
- " {\n"
- " move r22, zero\n\t"
- " move r23, zero\n\t"
- " }\n"
- " {\n"
- " move r24, zero\n\t"
- " move r25, zero\n\t"
- " }\n"
- " {\n"
- " move r26, zero\n\t"
- " move r27, zero\n\t"
- " }\n"
- " {\n"
- " move r28, zero\n\t"
- " move r29, zero\n\t"
- " }\n"
- " {\n"
- " move r30, zero\n\t"
- " move r31, zero\n\t"
- " }\n"
- " {\n"
- " move r32, zero\n\t"
- " move r33, zero\n\t"
- " }\n"
- " {\n"
- " move r34, zero\n\t"
- " move r35, zero\n\t"
- " }\n"
- " {\n"
- " move r36, zero\n\t"
- " move r37, zero\n\t"
- " }\n"
- " {\n"
- " move r38, zero\n\t"
- " move r39, zero\n\t"
- " }\n"
- " {\n"
- " move r40, zero\n\t"
- " move r41, zero\n\t"
- " }\n"
- " {\n"
- " move r42, zero\n\t"
- " move r43, zero\n\t"
- " }\n"
- " {\n"
- " move r44, zero\n\t"
- " move r45, zero\n\t"
- " }\n"
- " {\n"
- " move r46, zero\n\t"
- " move r47, zero\n\t"
- " }\n"
- " {\n"
- " move r48, zero\n\t"
- " move r49, zero\n\t"
- " }\n"
- " {\n"
- " move r50, zero\n\t"
- " jr r51\n\t"
- " }\n"
- " ill \n" // should never get here
- );
-/*
- Perform a clone system call. clone is strange because it has
- fork()-like return-twice semantics, so it needs special
- handling here.
- Upon entry, we have:
- int (fn)(void*) in r0
- void* child_stack in r1
- int flags in r2
- void* arg in r3
- pid_t* child_tid in r4
- pid_t* parent_tid in r5
- void* tls_ptr in r6
-
- System call requires:
- int $__NR_clone in r10
- int flags in r0
- void* child_stack in r1
- pid_t* parent_tid in r2
- void* tls_ptr in $r3
- pid_t* child_tid in sr4
-
- int clone(int (*fn)(void *arg), void *child_stack, int flags, void *arg,
- void *parent_tidptr, void *tls, void *child_tidptr)
-
- Returns an Int encoded in the linux-tilegx way, not a SysRes.
-*/
-#define __NR_CLONE VG_STRINGIFY(__NR_clone)
-#define __NR_EXIT VG_STRINGIFY(__NR_exit)
-
- /*
- stack
- high -> 4 r29
- 3
- 2
- 1 r10
- low -> 0 lr <- sp
- */
-// See priv_syswrap-linux.h for arg profile.
- asm (
- ".text\n"
- " .globl do_syscall_clone_tilegx_linux\n"
- " do_syscall_clone_tilegx_linux:\n"
- " beqz r0, .Linvalid\n"
- " beqz r1, .Linvalid\n"
- " {\n"
- " st sp, r29; " // save r29 at top
- " addli sp, sp, -32\n" // open new stack space
- " }\n"
-
- " move r29, sp; " // r29 <- sp
- " st r29, lr\n" // save lr at 0(sp)
-
- " addi r29, r29, 8\n"
- " {\n"
- " st r29, r10\n" // save r10 at 8(sp)
- /* setup child stack */
- " addi r1, r1, -32\n" // new stack frame for child
- " }\n"
- /* save fn */
- " { st r1, r0; addi r1, r1, 8 }\n"
- /* save args */
- " { st r1, r3; addi r1, r1, 8 }\n"
- /* save flags */
- " { st r1, r2; addi r1, r1, -16 }\n"
-
- /* Child stack layout
-
- flags
- args
- r1-> fn
- */
- " {\n"
- /* prepare args for clone. */
- " move r0, r2\n" // arg0 = flags
- /* arg1=r1 child stack */
- " move r2, r5\n" // arg2 = parent tid
- " }\n"
- " {\n"
- " move r3, r4\n" // arg3 = child tid
- " move r4, r6\n" // arg4 = tls
- " }\n"
- " moveli r10, " __NR_CLONE "\n"
- " swint1\n"
-
- " beqz r0, .Lchild\n"
- " move r29, sp\n"
- " ld lr, r29\n" // Restore lr
- " addi r29, r29, 8\n"
- " {\n"
- " ld r10, r29\n" // resotre r10
- " addi sp, sp, 32\n"
- " }\n"
- " ld r29, sp\n"
- " jrp lr\n"
-
- ".Lchild:"
- " move r2, sp\n"
- " {\n"
- " ld r3, r2\n"
- " addi r2, r2, 8\n"
- " }\n"
- " ld r0, r2\n"
- " jalr r3\n"
- " moveli r10, " __NR_EXIT "\n"
- " swint1\n"
-
- ".Linvalid:"
- " { movei r1, 22; jrp lr }\n"
- );
-
-#undef __NR_CLONE
-#undef __NR_EXIT
-
-// forward declarations
-extern Addr do_brk ( Addr newbrk );
-
-extern
-SysRes do_mremap( Addr old_addr, SizeT old_len,
- Addr new_addr, SizeT new_len,
- UWord flags, ThreadId tid );
-
-extern Bool linux_kernel_2_6_22(void);
-
-/* ---------------------------------------------------------------------
- More thread stuff
- ------------------------------------------------------------------ */
-
-// TILEGX doesn't have any architecture specific thread stuff that
-// needs to be cleaned up.
-void
-VG_ (cleanup_thread) ( ThreadArchState * arch ) { }
-
-/* ---------------------------------------------------------------------
- PRE/POST wrappers for tilegx/Linux-specific syscalls
- ------------------------------------------------------------------ */
-#define PRE(name) DEFN_PRE_TEMPLATE(tilegx_linux, name)
-#define POST(name) DEFN_POST_TEMPLATE(tilegx_linux, name)
-
-/* Add prototypes for the wrappers declared here, so that gcc doesn't
- harass us for not having prototypes. Really this is a kludge --
- the right thing to do is to make these wrappers 'static' since they
- aren't visible outside this file, but that requires even more macro
- magic. */
-
-DECL_TEMPLATE (tilegx_linux, sys_rt_sigreturn);
-DECL_TEMPLATE (tilegx_linux, sys_socket);
-DECL_TEMPLATE (tilegx_linux, sys_setsockopt);
-DECL_TEMPLATE (tilegx_linux, sys_getsockopt);
-DECL_TEMPLATE (tilegx_linux, sys_connect);
-DECL_TEMPLATE (tilegx_linux, sys_accept);
-DECL_TEMPLATE (tilegx_linux, sys_accept4);
-DECL_TEMPLATE (tilegx_linux, sys_sendto);
-DECL_TEMPLATE (tilegx_linux, sys_recvfrom);
-DECL_TEMPLATE (tilegx_linux, sys_sendmsg);
-DECL_TEMPLATE (tilegx_linux, sys_recvmsg);
-DECL_TEMPLATE (tilegx_linux, sys_shutdown);
-DECL_TEMPLATE (tilegx_linux, sys_bind);
-DECL_TEMPLATE (tilegx_linux, sys_listen);
-DECL_TEMPLATE (tilegx_linux, sys_getsockname);
-DECL_TEMPLATE (tilegx_linux, sys_getpeername);
-DECL_TEMPLATE (tilegx_linux, sys_socketpair);
-DECL_TEMPLATE (tilegx_linux, sys_semget);
-DECL_TEMPLATE (tilegx_linux, sys_semop);
-DECL_TEMPLATE (tilegx_linux, sys_semtimedop);
-DECL_TEMPLATE (tilegx_linux, sys_semctl);
-DECL_TEMPLATE (tilegx_linux, sys_msgget);
-DECL_TEMPLATE (tilegx_linux, sys_msgrcv);
-DECL_TEMPLATE (tilegx_linux, sys_msgsnd);
-DECL_TEMPLATE (tilegx_linux, sys_msgctl);
-DECL_TEMPLATE (tilegx_linux, sys_shmget);
-DECL_TEMPLATE (tilegx_linux, sys_shmat);
-DECL_TEMPLATE (tilegx_linux, sys_shmdt);
-DECL_TEMPLATE (tilegx_linux, sys_shmdt);
-DECL_TEMPLATE (tilegx_linux, sys_shmctl);
-DECL_TEMPLATE (tilegx_linux, sys_arch_prctl);
-DECL_TEMPLATE (tilegx_linux, sys_ptrace);
-DECL_TEMPLATE (tilegx_linux, sys_fadvise64);
-DECL_TEMPLATE (tilegx_linux, sys_mmap);
-DECL_TEMPLATE (tilegx_linux, sys_syscall184);
-DECL_TEMPLATE (tilegx_linux, sys_cacheflush);
-DECL_TEMPLATE (tilegx_linux, sys_set_dataplane);
-
-PRE(sys_rt_sigreturn)
-{
- /* This isn't really a syscall at all - it's a misuse of the
- syscall mechanism by m_sigframe. VG_(sigframe_create) sets the
- return address of the signal frames it creates to be a short
- piece of code which does this "syscall". The only purpose of
- the syscall is to call VG_(sigframe_destroy), which restores the
- thread's registers from the frame and then removes it.
- Consequently we must ask the syswrap driver logic not to write
- back the syscall "result" as that would overwrite the
- just-restored register state. */
-
- ThreadState* tst;
- PRINT("sys_rt_sigreturn ( )");
-
- vg_assert(VG_(is_valid_tid)(tid));
- vg_assert(tid >= 1 && tid < VG_N_THREADS);
- vg_assert(VG_(is_running_thread)(tid));
-
- /* Adjust RSP to point to start of frame; skip back up over handler
- ret addr */
- tst = VG_(get_ThreadState)(tid);
- tst->arch.vex.guest_r54 -= sizeof(Addr);
-
- /* This is only so that the RIP is (might be) useful to report if
- something goes wrong in the sigreturn. JRS 20070318: no idea
- what this is for */
- ML_(fixup_guest_state_to_restart_syscall)(&tst->arch);
-
- /* Restore register state from frame and remove it, as
- described above */
- VG_(sigframe_destroy)(tid, True);
-
- /* Tell the driver not to update the guest state with the "result",
- and set a bogus result to keep it happy. */
- *flags |= SfNoWriteResult;
- SET_STATUS_Success(0);
-
- /* Check to see if any signals arose as a result of this. */
- *flags |= SfPollAfter;
-}
-
-PRE(sys_arch_prctl)
-{
- PRINT( "arch_prctl ( %ld, %lx )", SARG1, ARG2 );
-
- vg_assert(VG_(is_valid_tid)(tid));
- vg_assert(tid >= 1 && tid < VG_N_THREADS);
- vg_assert(VG_(is_running_thread)(tid));
-
- I_die_here;
-}
-
-// Parts of this are tilegx-specific, but the *PEEK* cases are generic.
-//
-// ARG3 is only used for pointers into the traced process's address
-// space and for offsets into the traced process's struct
-// user_regs_struct. It is never a pointer into this process's memory
-// space, and we should therefore not check anything it points to.
-PRE(sys_ptrace)
-{
- PRINT("sys_ptrace ( %ld, %ld, %#lx, %#lx )", SARG1, SARG2, ARG3, ARG4);
- PRE_REG_READ4(int, "ptrace",
- long, request, long, pid, unsigned long, addr, unsigned long, data);
- switch (ARG1) {
- case VKI_PTRACE_PEEKTEXT:
- case VKI_PTRACE_PEEKDATA:
- case VKI_PTRACE_PEEKUSR:
- PRE_MEM_WRITE( "ptrace(peek)", ARG4,
- sizeof (long));
- break;
- case VKI_PTRACE_GETREGS:
- PRE_MEM_WRITE( "ptrace(getregs)", ARG4,
- sizeof (struct vki_user_regs_struct));
- break;
-#if 0 // FIXME
- case VKI_PTRACE_GETFPREGS:
- PRE_MEM_WRITE( "ptrace(getfpregs)", ARG4,
- sizeof (struct vki_user_i387_struct));
- break;
-#endif
- case VKI_PTRACE_SETREGS:
- PRE_MEM_READ( "ptrace(setregs)", ARG4,
- sizeof (struct vki_user_regs_struct));
- break;
-#if 0 // FIXME
- case VKI_PTRACE_SETFPREGS:
- PRE_MEM_READ( "ptrace(setfpregs)", ARG4,
- sizeof (struct vki_user_i387_struct));
- break;
-#endif
- case VKI_PTRACE_GETEVENTMSG:
- PRE_MEM_WRITE( "ptrace(geteventmsg)", ARG4, sizeof(unsigned long));
- break;
- case VKI_PTRACE_GETSIGINFO:
- PRE_MEM_WRITE( "ptrace(getsiginfo)", ARG4, sizeof(vki_siginfo_t));
- break;
- case VKI_PTRACE_SETSIGINFO:
- PRE_MEM_READ( "ptrace(setsiginfo)", ARG4, sizeof(vki_siginfo_t));
- break;
- default:
- break;
- }
-}
-
-POST(sys_ptrace)
-{
- switch (ARG1) {
- case VKI_PTRACE_PEEKTEXT:
- case VKI_PTRACE_PEEKDATA:
- case VKI_PTRACE_PEEKUSR:
- POST_MEM_WRITE( ARG4, sizeof (long));
- break;
- case VKI_PTRACE_GETREGS:
- POST_MEM_WRITE( ARG4, sizeof (struct vki_user_regs_struct));
- break;
-#if 0 // FIXME
- case VKI_PTRACE_GETFPREGS:
- POST_MEM_WRITE( ARG4, sizeof (struct vki_user_i387_struct));
- break;
-#endif
- case VKI_PTRACE_GETEVENTMSG:
- POST_MEM_WRITE( ARG4, sizeof(unsigned long));
- break;
- case VKI_PTRACE_GETSIGINFO:
- /* XXX: This is a simplification. Different parts of the
- * siginfo_t are valid depending on the type of signal.
- */
- POST_MEM_WRITE( ARG4, sizeof(vki_siginfo_t));
- break;
- default:
- break;
- }
-}
-
-PRE(sys_socket)
-{
- PRINT("sys_socket ( %ld, %ld, %ld )", SARG1, SARG2, SARG3);
- PRE_REG_READ3(long, "socket", int, domain, int, type, int, protocol);
-}
-POST(sys_socket)
-{
- SysRes r;
- vg_assert(SUCCESS);
- r = ML_(generic_POST_sys_socket)(tid, VG_(mk_SysRes_Success)(RES));
- SET_STATUS_from_SysRes(r);
-}
-
-PRE(sys_setsockopt)
-{
- PRINT("sys_setsockopt ( %ld, %ld, %ld, %#lx, %ld )", SARG1, SARG2, SARG3,
- ARG4, SARG5);
- PRE_REG_READ5(long, "setsockopt",
- int, s, int, level, int, optname,
- const void *, optval, int, optlen);
- ML_(generic_PRE_sys_setsockopt)(tid, ARG1,ARG2,ARG3,ARG4,ARG5);
-}
-
-PRE(sys_getsockopt)
-{
- PRINT("sys_getsockopt ( %ld, %ld, %ld, %#lx, %#lx )", SARG1, SARG2, SARG3,
- ARG4, ARG5);
- PRE_REG_READ5(long, "getsockopt",
- int, s, int, level, int, optname,
- void *, optval, int, *optlen);
- ML_(linux_PRE_sys_getsockopt)(tid, ARG1,ARG2,ARG3,ARG4,ARG5);
-}
-POST(sys_getsockopt)
-{
- vg_assert(SUCCESS);
- ML_(linux_POST_sys_getsockopt)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3,ARG4,ARG5);
-}
-
-PRE(sys_connect)
-{
- *flags |= SfMayBlock;
- PRINT("sys_connect ( %ld, %#lx, %ld )", SARG1, ARG2, SARG3);
- PRE_REG_READ3(long, "connect",
- int, sockfd, struct sockaddr *, serv_addr, int, addrlen);
- ML_(generic_PRE_sys_connect)(tid, ARG1,ARG2,ARG3);
-}
-
-PRE(sys_accept)
-{
- *flags |= SfMayBlock;
- PRINT("sys_accept ( %ld, %#lx, %#lx )", SARG1, ARG2, ARG3);
- PRE_REG_READ3(long, "accept",
- int, s, struct sockaddr *, addr, int *, addrlen);
- ML_(generic_PRE_sys_accept)(tid, ARG1,ARG2,ARG3);
-}
-POST(sys_accept)
-{
- SysRes r;
- vg_assert(SUCCESS);
- r = ML_(generic_POST_sys_accept)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3);
- SET_STATUS_from_SysRes(r);
-}
-
-PRE(sys_accept4)
-{
- *flags |= SfMayBlock;
- PRINT("sys_accept4 ( %ld, %#lx, %#lx, %ld )", SARG1, ARG2, ARG3, SARG4);
- PRE_REG_READ4(long, "accept4",
- int, s, struct sockaddr *, addr, int *, addrlen, int, flags);
- ML_(generic_PRE_sys_accept)(tid, ARG1,ARG2,ARG3);
-}
-POST(sys_accept4)
-{
- SysRes r;
- vg_assert(SUCCESS);
- r = ML_(generic_POST_sys_accept)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3);
- SET_STATUS_from_SysRes(r);
-}
-
-PRE(sys_sendto)
-{
- *flags |= SfMayBlock;
- PRINT("sys_sendto ( %ld, %#lx, %ld, %lu, %#lx, %ld )", SARG1, ARG2, SARG3,
- ARG4, ARG5, SARG6);
- PRE_REG_READ6(long, "sendto",
- int, s, const void *, msg, int, len,
- unsigned int, flags,
- const struct sockaddr *, to, int, tolen);
- ML_(generic_PRE_sys_sendto)(tid, ARG1,ARG2,ARG3,ARG4,ARG5,ARG6);
-}
-
-PRE(sys_recvfrom)
-{
- *flags |= SfMayBlock;
- PRINT("sys_recvfrom ( %ld, %#lx, %ld, %lu, %#lx, %#lx )", SARG1, ARG2, SARG3,
- ARG4, ARG5, ARG6);
- PRE_REG_READ6(long, "recvfrom",
- int, s, void *, buf, int, len, unsigned int, flags,
- struct sockaddr *, from, int *, fromlen);
- ML_(generic_PRE_sys_recvfrom)(tid, ARG1,ARG2,ARG3,ARG4,ARG5,ARG6);
-}
-POST(sys_recvfrom)
-{
- vg_assert(SUCCESS);
- ML_(generic_POST_sys_recvfrom)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3,ARG4,ARG5,ARG6);
-}
-
-PRE(sys_sendmsg)
-{
- *flags |= SfMayBlock;
- PRINT("sys_sendmsg ( %ld, %#lx, %ld )", SARG1, ARG2, SARG3);
- PRE_REG_READ3(long, "sendmsg",
- int, s, const struct msghdr *, msg, int, flags);
- ML_(generic_PRE_sys_sendmsg)(tid, "msg", ARG2);
-}
-
-PRE(sys_recvmsg)
-{
- *flags |= SfMayBlock;
- PRINT("sys_recvmsg ( %ld, %#lx, %ld )", SARG1, ARG2, SARG3);
- PRE_REG_READ3(long, "recvmsg", int, s, struct msghdr *, msg, int, flags);
- ML_(generic_PRE_sys_recvmsg)(tid, "msg", (struct vki_msghdr *) ARG2);
-}
-
-POST(sys_recvmsg)
-{
- ML_(generic_POST_sys_recvmsg)(tid, "msg", (struct vki_msghdr *)ARG2, RES);
-}
-
-PRE(sys_shutdown)
-{
- *flags |= SfMayBlock;
- PRINT("sys_shutdown ( %ld, %ld )", SARG1, SARG2);
- PRE_REG_READ2(int, "shutdown", int, s, int, how);
-}
-
-PRE(sys_bind)
-{
- PRINT("sys_bind ( %ld, %#lx, %ld )", SARG1, ARG2, SARG3);
- PRE_REG_READ3(long, "bind",
- int, sockfd, struct sockaddr *, my_addr, int, addrlen);
- ML_(generic_PRE_sys_bind)(tid, ARG1,ARG2,ARG3);
-}
-
-PRE(sys_listen)
-{
- PRINT("sys_listen ( %ld, %ld )", SARG1, SARG2);
- PRE_REG_READ2(long, "listen", int, s, int, backlog);
-}
-
-PRE(sys_getsockname)
-{
- PRINT("sys_getsockname ( %ld, %#lx, %#lx )", SARG1, ARG2, ARG3);
- PRE_REG_READ3(long, "getsockname",
- int, s, struct sockaddr *, name, int *, namelen);
- ML_(generic_PRE_sys_getsockname)(tid, ARG1,ARG2,ARG3);
-}
-POST(sys_getsockname)
-{
- vg_assert(SUCCESS);
- ML_(generic_POST_sys_getsockname)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3);
-}
-
-PRE(sys_getpeername)
-{
- PRINT("sys_getpeername ( %ld, %#lx, %#lx )", SARG1, ARG2, ARG3);
- PRE_REG_READ3(long, "getpeername",
- int, s, struct sockaddr *, name, int *, namelen);
- ML_(generic_PRE_sys_getpeername)(tid, ARG1,ARG2,ARG3);
-}
-POST(sys_getpeername)
-{
- vg_assert(SUCCESS);
- ML_(generic_POST_sys_getpeername)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3);
-}
-
-PRE(sys_socketpair)
-{
- PRINT("sys_socketpair ( %ld, %ld, %ld, %#lx )", SARG1, SARG2, SARG3, ARG4);
- PRE_REG_READ4(long, "socketpair",
- int, d, int, type, int, protocol, int*, sv);
- ML_(generic_PRE_sys_socketpair)(tid, ARG1,ARG2,ARG3,ARG4);
-}
-POST(sys_socketpair)
-{
- vg_assert(SUCCESS);
- ML_(generic_POST_sys_socketpair)(tid, VG_(mk_SysRes_Success)(RES),
- ARG1,ARG2,ARG3,ARG4);
-}
-
-PRE(sys_semget)
-{
- PRINT("sys_semget ( %ld, %ld, %ld )", SARG1, SARG2, SARG3);
- PRE_REG_READ3(long, "semget", vki_key_t, key, int, nsems, int, semflg);
-}
-
-PRE(sys_semop)
-{
- *flags |= SfMayBlock;
- PRINT("sys_semop ( %ld, %#lx, %lu )", SARG1, ARG2, ARG3);
- PRE_REG_READ3(long, "semop",
- int, semid, struct sembuf *, sops, unsigned, nsoops);
- ML_(generic_PRE_sys_semop)(tid, ARG1,ARG2,ARG3);
-}
-
-PRE(sys_semtimedop)
-{
- *flags |= SfMayBlock;
- PRINT("sys_semtimedop ( %ld, %#lx, %lu, %#lx )", SARG1, ARG2, ARG3, ARG4);
- PRE_REG_READ4(long, "semtimedop",
- int, semid, struct sembuf *, sops, unsigned, nsoops,
- struct timespec *, timeout);
- ML_(generic_PRE_sys_semtimedop)(tid, ARG1,ARG2,ARG3,ARG4);
-}
-
-PRE(sys_semctl)
-{
- switch (ARG3 & ~VKI_IPC_64) {
- case VKI_IPC_INFO:
- case VKI_SEM_INFO:
- PRINT("sys_semctl ( %ld, %ld, %ld, %#lx )", SARG1, SARG2, SARG3, ARG4);
- PRE_REG_READ4(long, "semctl",
- int, semid, int, semnum, int, cmd, struct seminfo *, arg);
- break;
- case VKI_IPC_STAT:
- case VKI_SEM_STAT:
- case VKI_IPC_SET:
- PRINT("sys_semctl ( %ld, %ld, %ld, %#lx )", SARG1, SARG2, SARG3, ARG4);
- PRE_REG_READ4(long, "semctl",
- int, semid, int, semnum, int, cmd, struct semid_ds *, arg);
- break;
- case VKI_GETALL:
- case VKI_SETALL:
- PRINT("sys_semctl ( %ld, %ld, %ld, %#lx )", SARG1, SARG2, SARG3, ARG4);
- PRE_REG_READ4(long, "semctl",
- int, semid, int, semnum, int, cmd, unsigned short *, arg);
- break;
- default:
- PRINT("sys_semctl ( %ld, %ld, %ld )", SARG1, SARG2, SARG3);
- PRE_REG_READ3(long, "semctl",
- int, semid, int, semnum, int, cmd);
- break;
- }
- ML_(generic_PRE_sys_semctl)(tid, ARG1,ARG2,ARG3|VKI_IPC_64,ARG4);
-}
-POST(sys_semctl)
-{
- ML_(generic_POST_sys_semctl)(tid, RES,ARG1,ARG2,ARG3|VKI_IPC_64,ARG4);
-}
-
-PRE(sys_msgget)
-{
- PRINT("sys_msgget ( %ld, %ld )", SARG1, SARG2);
- PRE_REG_READ2(long, "msgget", vki_key_t, key, int, msgflg);
-}
-
-PRE(sys_msgsnd)
-{
- PRINT("sys_msgsnd ( %ld, %#lx, %lu, %ld )", SARG1, ARG2, ARG3, SARG4);
- PRE_REG_READ4(long, "msgsnd",
- int, msqid, struct msgbuf *, msgp, vki_size_t, msgsz,
- int, msgflg);
- ML_(linux_PRE_sys_msgsnd)(tid, ARG1,ARG2,ARG3,ARG4);
- if ((ARG4 & VKI_IPC_NOWAIT) == 0)
- *flags |= SfMayBlock;
-}
-
-PRE(sys_msgrcv)
-{
- PRINT("sys_msgrcv ( %ld, %#lx, %lu, %ld, %ld )", SARG1, ARG2, ARG3,
- SARG4, SARG5);
- PRE_REG_READ5(long, "msgrcv",
- int, msqid, struct msgbuf *, msgp, vki_size_t, msgsz,
- long, msgytp, int, msgflg);
- ML_(linux_PRE_sys_msgrcv)(tid, ARG1,ARG2,ARG3,ARG4,ARG5);
- if ((ARG4 & VKI_IPC_NOWAIT) == 0)
- *flags |= SfMayBlock;
-}
-POST(sys_msgrcv)
-{
- ML_(linux_POST_sys_msgrcv)(tid, RES,ARG1,ARG2,ARG3,ARG4,ARG5);
-}
-
-PRE(sys_msgctl)
-{
- PRINT("sys_msgctl ( %ld, %ld, %#lx )", SARG1, SARG2, ARG3);
- PRE_REG_READ3(long, "msgctl",
- int, msqid, int, cmd, struct msqid_ds *, buf);
- ML_(linux_PRE_sys_msgctl)(tid, ARG1,ARG2,ARG3);
-}
-POST(sys_msgctl)
-{
- ML_(linux_POST_sys_msgctl)(tid, RES,ARG1,ARG2,ARG3);
-}
-
-PRE(sys_shmget)
-{
- PRINT("sys_shmget ( %ld, %lu, %ld )", SARG1, ARG2, SARG3);
- PRE_REG_READ3(long, "shmget", vki_key_t, key, vki_size_t, size, int, shmflg);
-}
-
-PRE(sys_shmat)
-{
- UWord arg2tmp;
- PRINT("sys_shmat ( %ld, %#lx, %ld )", SARG1, ARG2, SARG3);
- PRE_REG_READ3(long, "shmat",
- int, shmid, const void *, shmaddr, int, shmflg);
- arg2tmp = ML_(generic_PRE_sys_shmat)(tid, ARG1,ARG2,ARG3);
- if (arg2tmp == 0)
- SET_STATUS_Failure( VKI_EINVAL );
- else
- ARG2 = arg2tmp; // used in POST
-}
-POST(sys_shmat)
-{
- ML_(generic_POST_sys_shmat)(tid, RES,ARG1,ARG2,ARG3);
-}
-
-PRE(sys_shmdt)
-{
- PRINT("sys_shmdt ( %#lx )",ARG1);
- PRE_REG_READ1(long, "shmdt", const void *, shmaddr);
- if (!ML_(generic_PRE_sys_shmdt)(tid, ARG1))
- SET_STATUS_Failure( VKI_EINVAL );
-}
-POST(sys_shmdt)
-{
- ML_(generic_POST_sys_shmdt)(tid, RES,ARG1);
-}
-
-PRE(sys_shmctl)
-{
- PRINT("sys_shmctl ( %ld, %ld, %#lx )", SARG1, SARG2, ARG3);
- PRE_REG_READ3(long, "shmctl",
- int, shmid, int, cmd, struct shmid_ds *, buf);
- ML_(generic_PRE_sys_shmctl)(tid, ARG1,ARG2|VKI_IPC_64,ARG3);
-}
-POST(sys_shmctl)
-{
- ML_(generic_POST_sys_shmctl)(tid, RES,ARG1,ARG2|VKI_IPC_64,ARG3);
-}
-
-PRE(sys_fadvise64)
-{
- PRINT("sys_fadvise64 ( %ld, %ld, %lu, %ld )", SARG1, SARG2, ARG3, SARG4);
- PRE_REG_READ4(long, "fadvise64",
- int, fd, vki_loff_t, offset, vki_size_t, len, int, advice);
-}
-
-PRE(sys_mmap)
-{
- SysRes r;
-
- PRINT("sys_mmap ( %#lx, %lu, %lu, %lu, %lu, %lu )",
- ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 );
- PRE_REG_READ6(long, "mmap",
- unsigned long, start, unsigned long, length,
- unsigned long, prot, unsigned long, flags,
- unsigned long, fd, unsigned long, offset);
-
- r = ML_(generic_PRE_sys_mmap)( tid, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 );
- SET_STATUS_from_SysRes(r);
-}
-
-
-/* ---------------------------------------------------------------
- PRE/POST wrappers for TILEGX/Linux-variant specific syscalls
- ------------------------------------------------------------ */
-PRE(sys_cacheflush)
-{
- PRINT("cacheflush (%lx, %ld, %ld)", ARG1, SARG2, SARG3);
- PRE_REG_READ3(long, "cacheflush", unsigned long, addr,
- int, nbytes, int, cache);
- VG_ (discard_translations) ((Addr)ARG1, (ULong) ARG2,
- "PRE(sys_cacheflush)");
- SET_STATUS_Success(0);
-}
-
-PRE(sys_set_dataplane)
-{
- *flags |= SfMayBlock;
- PRINT("sys_set_dataplane ( %lu )", ARG1);
- PRE_REG_READ1(long, "set_dataplane", unsigned long, flag);
-}
-
-#undef PRE
-#undef POST
-
-
-/* ---------------------------------------------------------------------
- The TILEGX/Linux syscall table
- ------------------------------------------------------------------ */
-
-/* Add an tilegx-linux specific wrapper to a syscall table. */
-#define PLAX_(const, name) WRAPPER_ENTRY_X_(tilegx_linux, const, name)
-#define PLAXY(const, name) WRAPPER_ENTRY_XY(tilegx_linux, const, name)
-
-// This table maps from __NR_xxx syscall numbers (from
-// linux/include/asm/unistd.h) to the appropriate PRE/POST sys_foo()
-//
-// When implementing these wrappers, you need to work out if the wrapper is
-// generic, Linux-only (but arch-independent), or TILEGX/Linux only.
-
-static SyscallTableEntry syscall_table[] = {
-
- LINXY(__NR_io_setup, sys_io_setup), // 0
- LINX_(__NR_io_destroy, sys_io_destroy), // 1
- LINX_(__NR_io_submit, sys_io_submit), // 2
- LINXY(__NR_io_cancel, sys_io_cancel), // 3
- LINXY(__NR_io_getevents, sys_io_getevents), // 4
- LINX_(__NR_setxattr, sys_setxattr), // 5
- LINX_(__NR_lsetxattr, sys_lsetxattr), // 6
- LINX_(__NR_fsetxattr, sys_fsetxattr), // 7
- LINXY(__NR_getxattr, sys_getxattr), // 8
- LINXY(__NR_lgetxattr, sys_lgetxattr), // 9
- LINXY(__NR_fgetxattr, sys_fgetxattr), // 10
- LINXY(__NR_listxattr, sys_listxattr), // 11
- LINXY(__NR_llistxattr, sys_llistxattr), // 12
- LINXY(__NR_flistxattr, sys_flistxattr), // 13
- LINX_(__NR_removexattr, sys_removexattr), // 14
- LINX_(__NR_lremovexattr, sys_lremovexattr), // 15
- LINX_(__NR_fremovexattr, sys_fremovexattr), // 16
- GENXY(__NR_getcwd, sys_getcwd), // 17
- LINXY(__NR_lookup_dcookie, sys_lookup_dcookie), // 18
- LINX_(__NR_eventfd2, sys_eventfd2), // 19
- LINXY(__NR_epoll_create1, sys_epoll_create1), // 20
- LINX_(__NR_epoll_ctl, sys_epoll_ctl), // 21
- LINXY(__NR_epoll_pwait, sys_epoll_pwait), // 22
- GENXY(__NR_dup, sys_dup), // 23
- GENXY(__NR_dup2, sys_dup2), // 23
- LINXY(__NR_dup3, sys_dup3), // 24
- LINXY(__NR_fcntl, sys_fcntl), // 25
- LINXY(__NR_inotify_init1, sys_inotify_init1), // 26
- LINX_(__NR_inotify_add_watch, sys_inotify_add_watch), // 27
- LINX_(__NR_inotify_rm_watch, sys_inotify_rm_watch), // 28
- LINXY(__NR_ioctl, sys_ioctl), // 29
- LINX_(__NR_ioprio_set, sys_ioprio_set), // 30
- LINX_(__NR_ioprio_get, sys_ioprio_get), // 31
- GENX_(__NR_flock, sys_flock), // 32
- LINX_(__NR_mknodat, sys_mknodat), // 33
- LINX_(__NR_mkdirat, sys_mkdirat), // 34
- LINX_(__NR_unlinkat, sys_unlinkat), // 35
- LINX_(__NR_symlinkat, sys_symlinkat), // 36
- LINX_(__NR_linkat, sys_linkat), // 37
- LINX_(__NR_renameat, sys_renameat), // 38
- LINX_(__NR_umount2, sys_umount), // 39
- LINX_(__NR_mount, sys_mount), // 40
-
- GENXY(__NR_statfs, sys_statfs), // 43
- GENXY(__NR_fstatfs, sys_fstatfs), // 44
- GENX_(__NR_truncate, sys_truncate), // 45
- GENX_(__NR_ftruncate, sys_ftruncate), // 46
- LINX_(__NR_fallocate, sys_fallocate), // 47
- LINX_(__NR_faccessat, sys_faccessat), // 48
- GENX_(__NR_chdir, sys_chdir), // 49
- GENX_(__NR_fchdir, sys_fchdir), // 50
- GENX_(__NR_chroot, sys_chroot), // 51
- GENX_(__NR_fchmod, sys_fchmod), // 52
- LINX_(__NR_fchmodat, sys_fchmodat), // 53
- LINX_(__NR_fchownat, sys_fchownat), // 54
- GENX_(__NR_fchown, sys_fchown), // 55
- LINXY(__NR_openat, sys_openat), // 56
- GENXY(__NR_close, sys_close), // 57
- LINX_(__NR_vhangup, sys_vhangup), // 58
- LINXY(__NR_pipe2, sys_pipe2), // 59
- LINX_(__NR_quotactl, sys_quotactl), // 60
- GENXY(__NR_getdents64, sys_getdents64), // 61
- LINX_(__NR_lseek, sys_lseek), // 62
- GENXY(__NR_read, sys_read), // 63
- GENX_(__NR_write, sys_write), // 64
- GENXY(__NR_readv, sys_readv), // 65
- GENX_(__NR_writev, sys_writev), // 66
- GENXY(__NR_pread64, sys_pread64), // 67
- GENX_(__NR_pwrite64, sys_pwrite64), // 68
- LINXY(__NR_preadv, sys_preadv), // 69
- LINX_(__NR_pwritev, sys_pwritev), // 70
- LINXY(__NR_sendfile, sys_sendfile), // 71
- LINXY(__NR_pselect6, sys_pselect6), // 72
- LINXY(__NR_ppoll, sys_ppoll), // 73
- LINXY(__NR_signalfd4, sys_signalfd4), // 74
- LINX_(__NR_splice, sys_splice), // 75
- LINX_(__NR_readlinkat, sys_readlinkat), // 78
- LINXY(__NR3264_fstatat, sys_newfstatat), // 79
- GENXY(__NR_fstat, sys_newfstat), // 80
- GENX_(__NR_sync, sys_sync), // 81
- GENX_(__NR_fsync, sys_fsync), // 82
- GENX_(__NR_fdatasync, sys_fdatasync), // 83
- LINX_(__NR_sync_file_range, sys_sync_file_range), // 84
- LINXY(__NR_timerfd_create, sys_timerfd_create), // 85
- LINXY(__NR_timerfd_settime, sys_timerfd_settime), // 86
- LINXY(__NR_timerfd_gettime, sys_timerfd_gettime), // 87
- LINX_(__NR_utimensat, sys_utimensat), // 88
-
- LINXY(__NR_capget, sys_capget), // 90
- LINX_(__NR_capset, sys_capset), // 91
- LINX_(__NR_personality, sys_personality), // 92
- GENX_(__NR_exit, sys_exit), // 93
- LINX_(__NR_exit_group, sys_exit_group), // 94
- LINXY(__NR_waitid, sys_waitid), // 95
- LINX_(__NR_set_tid_address, sys_set_tid_address), // 96
- LINXY(__NR_futex, sys_futex), // 98
- LINX_(__NR_set_robust_list, sys_set_robust_list), // 99
- LINXY(__NR_get_robust_list, sys_get_robust_list), // 100
- GENXY(__NR_nanosleep, sys_nanosleep), // 101
- GENXY(__NR_getitimer, sys_getitimer), // 102
- GENXY(__NR_setitimer, sys_setitimer), // 103
- LINX_(__NR_init_module, sys_init_module), // 105
- LINX_(__NR_delete_module, sys_delete_module), // 106
- LINXY(__NR_timer_create, sys_timer_create), // 107
- LINXY(__NR_timer_gettime, sys_timer_gettime), // 108
- LINX_(__NR_timer_getoverrun, sys_timer_getoverrun), // 109
- LINXY(__NR_timer_settime, sys_timer_settime), // 110
- LINX_(__NR_timer_delete, sys_timer_delete), // 111
- LINX_(__NR_clock_settime, sys_clock_settime), // 112
- LINXY(__NR_clock_gettime, sys_clock_gettime), // 113
- LINXY(__NR_clock_getres, sys_clock_getres), // 114
- LINXY(__NR_clock_nanosleep, sys_clock_nanosleep), // 115
- LINXY(__NR_syslog, sys_syslog), // 116
- PLAXY(__NR_ptrace, sys_ptrace), // 117
- LINXY(__NR_sched_setparam, sys_sched_setparam), // 118
- LINX_(__NR_sched_setscheduler, sys_sched_setscheduler), // 119
- LINX_(__NR_sched_getscheduler, sys_sched_getscheduler), // 120
- LINXY(__NR_sched_getparam, sys_sched_getparam), // 121
- LINX_(__NR_sched_setaffinity, sys_sched_setaffinity), // 122
- LINXY(__NR_sched_getaffinity, sys_sched_getaffinity), // 123
- LINX_(__NR_sched_yield, sys_sched_yield), // 124
- LINX_(__NR_sched_get_priority_max, sys_sched_get_priority_max), // 125
- LINX_(__NR_sched_get_priority_min, sys_sched_get_priority_min), // 126
- LINXY(__NR_sched_rr_get_interval, sys_sched_rr_get_interval), // 127
-
- GENX_(__NR_kill, sys_kill), // 129
- LINXY(__NR_tkill, sys_tkill), // 130
- LINXY(__NR_tgkill, sys_tgkill), // 131
- GENXY(__NR_sigaltstack, sys_sigaltstack), // 132
- LINX_(__NR_rt_sigsuspend, sys_rt_sigsuspend), // 133
- LINXY(__NR_rt_sigaction, sys_rt_sigaction), // 134
- LINXY(__NR_rt_sigprocmask, sys_rt_sigprocmask), // 135
- LINXY(__NR_rt_sigpending, sys_rt_sigpending), // 136
- LINXY(__NR_rt_sigtimedwait, sys_rt_sigtimedwait), // 137
- LINXY(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo), // 138
- PLAX_(__NR_rt_sigreturn, sys_rt_sigreturn), // 139
- GENX_(__NR_setpriority, sys_setpriority), // 140
- GENX_(__NR_getpriority, sys_getpriority), // 141
-
- GENX_(__NR_setregid, sys_setregid), // 143
- GENX_(__NR_setgid, sys_setgid), // 144
- GENX_(__NR_setreuid, sys_setreuid), // 145
- GENX_(__NR_setuid, sys_setuid), // 146
- LINX_(__NR_setresuid, sys_setresuid), // 147
- LINXY(__NR_getresuid, sys_getresuid), // 148
- LINX_(__NR_setresgid, sys_setresgid), // 149
- LINXY(__NR_getresgid, sys_getresgid), // 150
- LINX_(__NR_setfsuid, sys_setfsuid), // 151
- LINX_(__NR_setfsgid, sys_setfsgid), // 152
- GENXY(__NR_times, sys_times), // 153
- GENX_(__NR_setpgid, sys_setpgid), // 154
- GENX_(__NR_getpgid, sys_getpgid), // 155
- GENX_(__NR_getsid, sys_getsid), // 156
- GENX_(__NR_setsid, sys_setsid), // 157
- GENXY(__NR_getgroups, sys_getgroups), // 158
- GENX_(__NR_setgroups, sys_setgroups), // 159
- GENXY(__NR_uname, sys_newuname), // 160
- GENXY(__NR_getrlimit, sys_getrlimit), // 163
- GENX_(__NR_setrlimit, sys_setrlimit), // 164
- GENXY(__NR_getrusage, sys_getrusage), // 165
- GENX_(__NR_umask, sys_umask), // 166
- LINXY(__NR_prctl, sys_prctl), // 167
-
- GENXY(__NR_gettimeofday, sys_gettimeofday), // 169
- GENX_(__NR_settimeofday, sys_settimeofday), // 170
- LINXY(__NR_adjtimex, sys_adjtimex), // 171
- GENX_(__NR_getpid, sys_getpid), // 172
- GENX_(__NR_getppid, sys_getppid), // 173
- GENX_(__NR_getuid, sys_getuid), // 174
- GENX_(__NR_geteuid, sys_geteuid), // 175
- GENX_(__NR_getgid, sys_getgid), // 176
- GENX_(__NR_getegid, sys_getegid), // 177
- LINX_(__NR_gettid, sys_gettid), // 178
- LINXY(__NR_sysinfo, sys_sysinfo), // 179
- LINXY(__NR_mq_open, sys_mq_open), // 180
- LINX_(__NR_mq_unlink, sys_mq_unlink), // 181
- LINX_(__NR_mq_timedsend, sys_mq_timedsend), // 182
- LINXY(__NR_mq_timedreceive, sys_mq_timedreceive), // 183
- LINX_(__NR_mq_notify, sys_mq_notify), // 184
- LINXY(__NR_mq_getsetattr, sys_mq_getsetattr), // 185
- PLAX_(__NR_msgget, sys_msgget), // 186
- PLAXY(__NR_msgctl, sys_msgctl), // 187
- PLAXY(__NR_msgrcv, sys_msgrcv), // 188
- PLAX_(__NR_msgsnd, sys_msgsnd), // 189
- PLAX_(__NR_semget, sys_semget), // 190
- PLAXY(__NR_semctl, sys_semctl), // 191
- PLAX_(__NR_semtimedop, sys_semtimedop), // 192
- PLAX_(__NR_semop, sys_semop), // 193
- PLAX_(__NR_shmget, sys_shmget), // 194
- PLAXY(__NR_shmat, sys_shmat), // 196
- PLAXY(__NR_shmctl, sys_shmctl), // 195
- PLAXY(__NR_shmdt, sys_shmdt), // 197
- PLAXY(__NR_socket, sys_socket), // 198
- PLAXY(__NR_socketpair, sys_socketpair), // 199
- PLAX_(__NR_bind, sys_bind), // 200
- PLAX_(__NR_listen, sys_listen), // 201
- PLAXY(__NR_accept, sys_accept), // 202
- PLAX_(__NR_connect, sys_connect), // 203
- PLAXY(__NR_getsockname, sys_getsockname), // 204
- PLAXY(__NR_getpeername, sys_getpeername), // 205
- PLAX_(__NR_sendto, sys_sendto), // 206
- PLAXY(__NR_recvfrom, sys_recvfrom), // 207
- PLAX_(__NR_setsockopt, sys_setsockopt), // 208
- PLAXY(__NR_getsockopt, sys_getsockopt), // 209
- PLAX_(__NR_shutdown, sys_shutdown), // 210
- PLAX_(__NR_sendmsg, sys_sendmsg), // 211
- PLAXY(__NR_recvmsg, sys_recvmsg), // 212
- LINX_(__NR_readahead, sys_readahead), // 213
- GENX_(__NR_brk, sys_brk), // 214
- GENXY(__NR_munmap, sys_munmap), // 215
- GENX_(__NR_mremap, sys_mremap), // 216
- LINX_(__NR_add_key, sys_add_key), // 217
- LINX_(__NR_request_key, sys_request_key), // 218
- LINXY(__NR_keyctl, sys_keyctl), // 219
- LINX_(__NR_clone, sys_clone), // 220
- GENX_(__NR_execve, sys_execve), // 221
- PLAX_(__NR_mmap, sys_mmap), // 222
- GENXY(__NR_mprotect, sys_mprotect), // 226
- GENX_(__NR_msync, sys_msync), // 227
- GENX_(__NR_mlock, sys_mlock), // 228
- GENX_(__NR_munlock, sys_munlock), // 229
- GENX_(__NR_mlockall, sys_mlockall), // 230
- LINX_(__NR_munlockall, sys_munlockall), // 231
- GENX_(__NR_mincore, sys_mincore), // 232
- GENX_(__NR_madvise, sys_madvise), // 233
-
- LINX_(__NR_mbind, sys_mbind), // 235
- LINXY(__NR_get_mempolicy, sys_get_mempolicy), // 236
- LINX_(__NR_set_mempolicy, sys_set_mempolicy), // 237
-
- LINXY(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo), // 240
-
- PLAXY(__NR_accept4, sys_accept4), // 242
-
- PLAX_(__NR_cacheflush, sys_cacheflush), // 245
- PLAX_(__NR_set_dataplane, sys_set_dataplane), // 246
-
- GENXY(__NR_wait4, sys_wait4), // 260
-};
-
-SyscallTableEntry* ML_(get_linux_syscall_entry) ( UInt sysno )
-{
- const UInt syscall_table_size
- = sizeof(syscall_table) / sizeof(syscall_table[0]);
-
- /* Is it in the contiguous initial section of the table? */
- if (sysno < syscall_table_size) {
- SyscallTableEntry* sys = &syscall_table[sysno];
- if (sys->before == NULL)
- return NULL; /* no entry */
- else
- return sys;
- }
- //vex_printf("sysno: %d\n", sysno);
-
- /* Can't find a wrapper */
- return NULL;
-}
-
-#endif // defined(VGP_tilegx_linux)
-
-/*--------------------------------------------------------------------*/
-/*--- end syswrap-tilegx-linux.c ---*/
-/*--------------------------------------------------------------------*/
# undef UD2_1024
# undef UD2_PAGE
-/*---------------------- tilegx-linux ----------------------*/
-#else
-#if defined(VGP_tilegx_linux)
-
-# define UD2_16 ill ; ill
-# define UD2_64 UD2_16 ; UD2_16 ; UD2_16 ; UD2_16
-# define UD2_256 UD2_64 ; UD2_64 ; UD2_64 ; UD2_64
-# define UD2_1024 UD2_256 ; UD2_256 ; UD2_256 ; UD2_256
-# define UD2_4K UD2_1024 ; UD2_1024 ; UD2_1024 ; UD2_1024
-# define UD2_16K UD2_4K ; UD2_4K ; UD2_4K ; UD2_4K
-# define UD2_PAGE UD2_16K ; UD2_16K ; UD2_16K ; UD2_16K
- /* a leading page of unexecutable code */
- UD2_PAGE
-
-.global VG_(trampoline_stuff_start)
-VG_(trampoline_stuff_start):
-
-.global VG_(tilegx_linux_SUBST_FOR_rt_sigreturn)
-VG_(tilegx_linux_SUBST_FOR_rt_sigreturn):
- /* This is a very specific sequence which GDB uses to
- recognize signal handler frames. */
- moveli r10, __NR_rt_sigreturn
- swint1
- ill
-
-.global VG_(tilegx_linux_REDIR_FOR_vgettimeofday)
-.type VG_(tilegx_linux_REDIR_FOR_vgettimeofday), @function
-VG_(tilegx_linux_REDIR_FOR_vgettimeofday):
- moveli r10, __NR_gettimeofday
- swint1
- jrp lr
-.size VG_(tilegx_linux_REDIR_FOR_vgettimeofday), .-VG_(tilegx_linux_REDIR_FOR_vgettimeofday)
-
-.global VG_(tilegx_linux_REDIR_FOR_vtime)
-.type VG_(tilegx_linux_REDIR_FOR_vtime), @function
-VG_(tilegx_linux_REDIR_FOR_vtime):
- moveli r10, __NR_gettimeofday
- swint1
- jrp lr
-.size VG_(tilegx_linux_REDIR_FOR_vtime), .-VG_(tilegx_linux_REDIR_FOR_vtime)
-
-.global VG_(tilegx_linux_REDIR_FOR_strlen)
-.type VG_(tilegx_linux_REDIR_FOR_strlen), @function
-VG_(tilegx_linux_REDIR_FOR_strlen):
- {
- movei r1, 0
- beqz r0, 2f
- }
-1: {
- addi r1, r1, 1
- ld1s_add r2, r0, 1
- }
- bnezt r2, 1b
- addi r1, r1, -1
-2: move r0, r1
- jrp lr
-.size VG_(tilegx_linux_REDIR_FOR_strlen), .-VG_(tilegx_linux_REDIR_FOR_strlen)
-
-.global VG_(trampoline_stuff_end)
-VG_(trampoline_stuff_end):
-
- /* and a trailing page of unexecutable code */
- UD2_PAGE
-
-# undef UD2_16
-# undef UD2_64
-# undef UD2_256
-# undef UD2_1024
-# undef UD2_4K
-# undef UD2_16K
-# undef UD2_PAGE
-
/*---------------- x86-solaris ----------------*/
#else
#if defined(VGP_x86_solaris)
#endif
#endif
#endif
-#endif
/* Let the linker know we don't need an executable stack */
MARK_STACK_NO_EXEC
static Bool translations_allowable_from_seg ( NSegment const* seg, Addr addr )
{
# if defined(VGA_x86) || defined(VGA_s390x) || defined(VGA_mips32) \
- || defined(VGA_mips64) || defined(VGA_tilegx)
+ || defined(VGA_mips64)
Bool allowR = True;
# else
Bool allowR = False;
#if defined(VGP_ppc32_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
# define VG_STACK_GUARD_SZB 65536 // 1 or 16 pages
#else
# define VG_STACK_GUARD_SZB 8192 // 2 pages
ULong r31; /* Return address of the last subroutine call */
ULong r28;
} MIPS64;
- struct {
- ULong r52;
- ULong r55;
- } TILEGX;
} misc;
}
UnwindStartRegs;
typedef
struct { Addr pc; Addr sp; Addr fp; Addr ra; }
D3UnwindRegs;
-#elif defined(VGA_tilegx)
-typedef
- struct { Addr pc; Addr sp; Addr fp; Addr lr; }
- D3UnwindRegs;
#else
# error "Unsupported arch"
#endif
# define VG_ELF_MACHINE EM_MIPS
# define VG_ELF_CLASS ELFCLASS64
# undef VG_PLAT_USES_PPCTOC
-#elif defined(VGP_tilegx_linux)
-# define VG_ELF_DATA2XXX ELFDATA2LSB
- #ifndef EM_TILEGX
- #define EM_TILEGX 191
- #endif
-# define VG_ELF_MACHINE EM_TILEGX
-# define VG_ELF_CLASS ELFCLASS64
-# undef VG_PLAT_USES_PPCTOC
#else
# error Unknown platform
#endif
# define VG_INSTR_PTR guest_PC
# define VG_STACK_PTR guest_r29
# define VG_FRAME_PTR guest_r30
-#elif defined(VGA_tilegx)
-# define VG_INSTR_PTR guest_pc
-# define VG_STACK_PTR guest_r54
-# define VG_FRAME_PTR guest_r52
#else
# error Unknown arch
#endif
defined(VGP_x86_darwin) || \
defined(VGP_amd64_darwin) || \
defined(VGP_arm64_linux) || \
- defined(VGP_tilegx_linux) || \
defined(VGP_amd64_solaris)
# define VG_MIN_MALLOC_SZB 16
#else
UWord a3 );
extern SysRes VG_(mk_SysRes_mips64_linux)( ULong v0, ULong v1,
ULong a3 );
-extern SysRes VG_(mk_SysRes_tilegx_linux)( Long val );
extern SysRes VG_(mk_SysRes_x86_solaris) ( Bool isErr, UInt val, UInt val2 );
extern SysRes VG_(mk_SysRes_amd64_solaris) ( Bool isErr, ULong val, ULong val2 );
extern SysRes VG_(mk_SysRes_Error) ( UWord val );
extern void* VG_(arm_linux_REDIR_FOR_strcmp)( void*, void* );
#endif
-#if defined(VGP_tilegx_linux)
-extern Addr VG_(tilegx_linux_SUBST_FOR_rt_sigreturn);
-extern UInt VG_(tilegx_linux_REDIR_FOR_strlen)( void* );
-#endif
-
#if defined(VGP_arm64_linux)
extern Addr VG_(arm64_linux_SUBST_FOR_rt_sigreturn);
extern ULong VG_(arm64_linux_REDIR_FOR_strlen)( void* );
|| defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64)
# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 2) & VG_TT_FAST_MASK)
-#elif defined(VGA_tilegx)
-# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 3) & VG_TT_FAST_MASK)
-
#else
# error "VG_TT_FAST_HASH: unknown platform"
#endif
}
}
-# if defined(VGA_arm64) || defined(VGA_tilegx)
+# if defined(VGA_arm64)
/* arm64 is extra special, old glibc defined kernel user_pt_regs, but
newer glibc instead define user_regs_struct. */
# ifdef HAVE_SYS_USER_REGS
{
long res;
Bool stopped;
-# if defined(VGA_arm64) || defined(VGA_tilegx)
+# if defined(VGA_arm64)
/* arm64 is extra special, old glibc defined kernel user_pt_regs, but
newer glibc instead define user_regs_struct. */
# ifdef HAVE_SYS_USER_REGS
sp = p[29];
#elif defined(VGA_mips64)
sp = user_mod.regs[29];
-#elif defined(VGA_tilegx)
- sp = user_mod.sp;
#else
I_die_here : (sp) architecture missing in vgdb-invoker-ptrace.c
#endif
/* make stack space for args */
p[29] = sp - 32;
-#elif defined(VGA_mips64) || defined(VGA_tilegx)
+#elif defined(VGA_mips64)
assert(0); // cannot vgdb a 32 bits executable with a 64 bits exe
#else
I_die_here : architecture missing in vgdb-invoker-ptrace.c
user_mod.regs[31] = bad_return;
user_mod.regs[34] = shared64->invoke_gdbserver;
user_mod.regs[25] = shared64->invoke_gdbserver;
-#elif defined(VGA_tilegx)
- /* put check arg in register r0 */
- user_mod.regs[0] = check;
- /* put NULL return address in lr */
- user_mod.lr = bad_return;
- user_mod.pc = shared64->invoke_gdbserver;
#else
I_die_here: architecture missing in vgdb-invoker-ptrace.c
#endif
=== other/s390 =========================================================
-=== other/tilegx =======================================================
-
=== other/Android ======================================================
374814 VALGRIND INTERNAL ERROR: signal 11 (SIGSEGV) - exiting
xer n
fpscr
-
-TileGx-linux
-~~~~~~~~~~~~
-
-Reg Callee Arg
-Name Saves? Reg? Comment Vex-uses?
----------------------------------------------------------------------
-r0 n int#1
-r1 n int#2
-r2 n int#3
-r3 n int#4
-r4 n int#5
-r5 n int#6
-r6 n int#7
-r7 n int#8
-r8 n int#9
-r9 n int#10
-r10 n syscall# y
-r11 n Next Guest State
-r12 n y
-r13 n y
-r14 n y
-r15 n y
-r16 n y
-r17 n y
-r18 n y
-r19 n y
-r20 n y
-r21 n y
-r22 n y
-r23 n y
-r24 n y
-r25 n y
-r26 n y
-r27 n y
-r28 n y
-r29 n y
-r30 y y
-r31 y y
-r32 y y
-r33 y y
-r34 y y
-r35 y y
-r36 y y
-r37 y y
-r38 y y
-r39 y y
-r40 y y
-r41 y y
-r42 y y
-r43 y y
-r44 y y
-r45 y y
-r46 y y
-r47 y y
-r48 y y
-r49 y y
-r50 y Guest State
-r51 y used for memory Load/Store
-r52 y frame
-r53 y tls
-r54 y stock
-r55 y return address
-r63 n zero
|| defined(VGA_mips32)
#define BITS_PER_BITS_PER_UWORD 5
#elif defined(VGA_amd64) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \
- || defined(VGA_s390x) || defined(VGA_mips64) || defined(VGA_arm64) \
- || defined(VGA_tilegx)
+ || defined(VGA_s390x) || defined(VGA_mips64) || defined(VGA_arm64)
#define BITS_PER_BITS_PER_UWORD 6
#else
#error Unknown platform.
* DRD's handler for Valgrind client requests. The code below handles both
* DRD's public and tool-internal client requests.
*/
-#if defined(VGP_mips32_linux) || defined(VGP_mips64_linux) || \
- defined(VGP_tilegx_linux)
+#if defined(VGP_mips32_linux) || defined(VGP_mips64_linux)
/* There is a cse related issue in gcc for MIPS. Optimization level
has to be lowered, so cse related optimizations are not
included. */
#define STACK_POINTER_OFFSET OFFSET_mips32_r29
#elif defined(VGA_mips64)
#define STACK_POINTER_OFFSET OFFSET_mips64_r29
-#elif defined(VGA_tilegx)
-#define STACK_POINTER_OFFSET OFFSET_tilegx_r54
#else
#error Unknown architecture.
#endif
VG_(printf)("SGCheck doesn't work on MIPS yet, sorry.\n");
VG_(exit)(1);
#endif
-#if defined(VGA_tilegx)
- VG_(printf)("SGCheck doesn't work on TileGx yet, sorry.\n");
- VG_(exit)(1);
-#endif
// Can't change the name until we change the names in suppressions
// too.
# architectures.
case `uname -m` in
- ppc*|arm*|s390x|mips*|tilegx) exit 1;;
+ ppc*|arm*|s390x|mips*) exit 1;;
*) exit 0;;
esac
# test the memcheck block_list and search monitor commands.
prog: ../memcheck/tests/leak-tree
vgopts: --tool=memcheck --vgdb=yes --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-mcblocklistsearch -q
-prereq: test -e gdb.eval && ! ../tests/arch_test tilegx
+prereq: test -e gdb.eval
stdout_filter: filter_make_empty
stderr_filter: filter_make_empty
progB: gdb
vgopts: --tool=none --vgdb=yes --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-nlcontrolc
stderr_filter: filter_stderr
# Bug 338633 nlcontrol hangs on arm64 currently.
-prereq: test -e gdb -a -f vgdb.invoker && ! ../tests/arch_test arm64 && ! ../tests/arch_test tilegx && ! ../tests/os_test solaris
+prereq: test -e gdb -a -f vgdb.invoker && ! ../tests/arch_test arm64 && ! ../tests/os_test solaris
progB: gdb
argsB: --quiet -l 60 --nx ./sleepers
stdinB: nlcontrolc.stdinB.gdb
args: return
vgopts: --tool=none --vgdb=yes --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-nlgone-return
stderr_filter: filter_stderr
-prereq: test -e gdb && ! ../tests/arch_test tilegx
+prereq: test -e gdb
progB: gdb
argsB: --quiet -l 60 --nx ./gone
stdinB: nlgone_return.stdinB.gdb
return success;
}
-#elif defined(VGA_tilegx)
-
-/* return 1 if success, 0 if failure */
-UWord do_acasW(UWord* addr, UWord expected, UWord nyu )
-{
- /* Load the compare value into special register 0x2780 */
- __insn_mtspr(0x2780, expected);
- return __insn_cmpexch(addr, nyu);
-}
-
#endif
void atomic_incW ( UWord* w )
#undef PLAT_arm64_linux
#undef PLAT_s390x_linux
#undef PLAT_mips32_linux
-#undef PLAT_tilegx_linux
#undef PLAT_x86_solaris
#undef PLAT_amd64_solaris
# define PLAT_s390x_linux 1
#elif defined(__linux__) && defined(__mips__)
# define PLAT_mips32_linux 1
-#elif defined(__linux__) && defined(__tilegx__)
-# define PLAT_tilegx_linux 1
#elif defined(__sun__) && defined(__i386__)
# define PLAT_x86_solaris 1
#elif defined(__sun__) && defined(__x86_64__)
: /*out*/ : /*in*/ "r"(&(_lval)) \
: /*trash*/ "$8", "$9", "$10", "cc", "memory" \
)
-#elif defined(PLAT_tilegx_linux)
-# define INC(_lval,_lqual) \
- if (sizeof(_lval) == 4) \
- __insn_fetchadd(&(_lval), 1); \
- else if(sizeof(_lval) == 8) \
- __insn_fetchadd(&(_lval), 1)
#else
# error "Fix Me for this platform"
#endif
#undef PLAT_s390x_linux
#undef PLAT_mips32_linux
#undef PLAT_mips64_linux
-#undef PLAT_tilegx_linux
#undef PLAT_x86_solaris
#undef PLAT_amd64_solaris
#else
# define PLAT_mips32_linux 1
#endif
-#elif defined(__linux__) && defined(__tilegx__)
-# define PLAT_tilegx_linux 1
#elif defined(__sun__) && defined(__i386__)
# define PLAT_x86_solaris 1
#elif defined(__sun__) && defined(__x86_64__)
: /*out*/ : /*in*/ "r"(&(_lval)) \
: /*trash*/ "t0", "t1", "memory" \
)
-#elif defined(PLAT_tilegx_linux)
-# define INC(_lval,_lqual) \
- if (sizeof(_lval) == 4) \
- __insn_fetchadd(&(_lval), 1); \
- else if(sizeof(_lval) == 8) \
- __insn_fetchadd(&(_lval), 1)
#else
# error "Fix Me for this platform"
#endif
#undef PLAT_arm_linux
#undef PLAT_s390x_linux
#undef PLAT_mips32_linux
-#undef PLAT_tilegx_linux
#undef PLAT_x86_solaris
#undef PLAT_amd64_solaris
# define PLAT_s390x_linux 1
#elif defined(__linux__) && defined(__mips__)
# define PLAT_mips32_linux 1
-#elif defined(__linux__) && defined(__tilegx__)
-# define PLAT_tilegx_linux 1
#elif defined(__sun__) && defined(__i386__)
# define PLAT_x86_solaris 1
#elif defined(__sun__) && defined(__x86_64__)
# define XCHG_M_R_with_redundant_LOCK(_addr,_lval) \
XCHG_M_R(_addr,_lval)
-#elif defined(PLAT_tilegx_linux)
-# define XCHG_M_R(_addr,_lval) \
- _lval = __insn_exch4(&_addr, _lval)
-
-# define XCHG_M_R_with_redundant_LOCK(_addr,_lval) \
- XCHG_M_R(_addr, _lval)
#else
# error "Unsupported architecture"
#if defined(VGA_x86) || defined(VGA_amd64) || defined (VGA_arm) \
|| ((defined(VGA_mips32) || defined(VGA_mips64)) && defined (_MIPSEL)) \
- || defined(VGA_arm64) || defined(VGA_ppc64le) || defined(VGA_tilegx)
+ || defined(VGA_arm64) || defined(VGA_ppc64le)
# define VG_LITTLEENDIAN 1
#elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_s390x) \
|| ((defined(VGA_mips32) || defined(VGA_mips64)) && defined (_MIPSEB))
|| defined(VGA_ppc64be) || defined(VGA_ppc64le) \
|| defined(VGA_arm) || defined(VGA_s390x) \
|| defined(VGA_mips32) || defined(VGA_mips64) \
- || defined(VGA_arm64) || defined(VGA_tilegx)
+ || defined(VGA_arm64)
# define VG_REGPARM(n) /* */
#else
# error Unknown arch
#elif defined(VGA_mips64)
# include "libvex_guest_mips64.h"
typedef VexGuestMIPS64State VexGuestArchState;
-#elif defined(VGA_tilegx)
-# include "libvex_guest_tilegx.h"
- typedef VexGuestTILEGXState VexGuestArchState;
#else
# error Unknown arch
#endif
# define VG_CLREQ_SZB 20
# define VG_STACK_REDZONE_SZB 0
-#elif defined(VGP_tilegx_linux)
-# define VG_MIN_INSTR_SZB 8
-# define VG_MAX_INSTR_SZB 8
-# define VG_CLREQ_SZB 24
-# define VG_STACK_REDZONE_SZB 0
-
#else
# error Unknown platform
#endif
#elif defined(VGP_x86_darwin) || defined(VGP_amd64_darwin)
# include "vki/vki-scnums-darwin.h"
-#elif defined(VGP_tilegx_linux)
-# include "vki/vki-scnums-tilegx-linux.h"
-
#elif defined(VGP_x86_solaris) || (VGP_amd64_solaris)
# include "vki/vki-scnums-solaris.h"
#undef PLAT_s390x_linux
#undef PLAT_mips32_linux
#undef PLAT_mips64_linux
-#undef PLAT_tilegx_linux
#undef PLAT_x86_solaris
#undef PLAT_amd64_solaris
# define PLAT_mips64_linux 1
#elif defined(__linux__) && defined(__mips__) && (__mips!=64)
# define PLAT_mips32_linux 1
-#elif defined(__linux__) && defined(__tilegx__)
-# define PLAT_tilegx_linux 1
#elif defined(__sun) && defined(__i386__)
# define PLAT_x86_solaris 1
#elif defined(__sun) && defined(__x86_64__)
#endif /* PLAT_mips64_linux */
-/* ------------------------ tilegx-linux --------------- */
-#if defined(PLAT_tilegx_linux)
-
-typedef
- struct {
- unsigned long long int nraddr; /* where's the code? */
- }
- OrigFn;
-/*** special instruction sequence.
- 0:02b3c7ff91234fff { moveli zero, 4660 ; moveli zero, 22136 }
- 8:0091a7ff95678fff { moveli zero, 22136 ; moveli zero, 4660 }
-****/
-
-#define __SPECIAL_INSTRUCTION_PREAMBLE \
- ".quad 0x02b3c7ff91234fff\n" \
- ".quad 0x0091a7ff95678fff\n"
-
-#define VALGRIND_DO_CLIENT_REQUEST_EXPR( \
- _zzq_default, _zzq_request, \
- _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \
- ({ volatile unsigned long long int _zzq_args[6]; \
- volatile unsigned long long int _zzq_result; \
- _zzq_args[0] = (unsigned long long int)(_zzq_request); \
- _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \
- _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \
- _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \
- _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \
- _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \
- __asm__ volatile("move r11, %1\n\t" /*default*/ \
- "move r12, %2\n\t" /*ptr*/ \
- __SPECIAL_INSTRUCTION_PREAMBLE \
- /* r11 = client_request */ \
- "or r13, r13, r13\n\t" \
- "move %0, r11\n\t" /*result*/ \
- : "=r" (_zzq_result) \
- : "r" (_zzq_default), "r" (&_zzq_args[0]) \
- : "memory", "r11", "r12"); \
- _zzq_result; \
- })
-
-#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
- { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \
- volatile unsigned long long int __addr; \
- __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
- /* r11 = guest_NRADDR */ \
- "or r14, r14, r14\n" \
- "move %0, r11\n" \
- : "=r" (__addr) \
- : \
- : "memory", "r11" \
- ); \
- _zzq_orig->nraddr = __addr; \
- }
-
-#define VALGRIND_CALL_NOREDIR_R12 \
- __SPECIAL_INSTRUCTION_PREAMBLE \
- "or r15, r15, r15\n\t"
-
-#define VALGRIND_VEX_INJECT_IR() \
- do { \
- __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
- "or r11, r11, r11\n\t" \
- ); \
- } while (0)
-
-#endif /* PLAT_tilegx_linux */
-
/* Insert assembly code for other platforms here... */
#endif /* NVALGRIND */
#endif /* PLAT_mips64_linux */
-/* ------------------------ tilegx-linux ------------------------- */
-
-#if defined(PLAT_tilegx_linux)
-
-/* These regs are trashed by the hidden call. */
-#define __CALLER_SAVED_REGS "r0", "r1", "r2", "r3", "r4", "r5", \
- "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", \
- "r15", "r16", "r17", "r18", "r19", "r20", "r21", "r22", \
- "r23", "r24", "r25", "r26", "r27", "r28", "r29", "lr"
-
-/* These CALL_FN_ macros assume that on tilegx-linux, sizeof(unsigned
- long) == 8. */
-
-#define CALL_FN_W_v(lval, orig) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[1]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "ld r12, %1 \n\t" /* target->r11 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0 \n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_W(lval, orig, arg1) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[2]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_WW(lval, orig, arg1,arg2) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[3]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[4]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8 \n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[5]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_5W(lval, orig, arg1,arg2,arg3,arg4,arg5) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[6]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-#define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[7]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_7W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
- arg7) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[8]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- _argvec[7] = (unsigned long)(arg7); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- "ld_add r6, r29, 8 \n\t" /*arg7 -> r6 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_8W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
- arg7,arg8) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[9]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- _argvec[7] = (unsigned long)(arg7); \
- _argvec[8] = (unsigned long)(arg8); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- "ld_add r6, r29, 8 \n\t" /*arg7 -> r6 */ \
- "ld_add r7, r29, 8 \n\t" /*arg8 -> r7 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_9W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
- arg7,arg8,arg9) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[10]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- _argvec[7] = (unsigned long)(arg7); \
- _argvec[8] = (unsigned long)(arg8); \
- _argvec[9] = (unsigned long)(arg9); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- "ld_add r6, r29, 8 \n\t" /*arg7 -> r6 */ \
- "ld_add r7, r29, 8 \n\t" /*arg8 -> r7 */ \
- "ld_add r8, r29, 8 \n\t" /*arg9 -> r8 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_10W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \
- arg7,arg8,arg9,arg10) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[11]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- _argvec[7] = (unsigned long)(arg7); \
- _argvec[8] = (unsigned long)(arg8); \
- _argvec[9] = (unsigned long)(arg9); \
- _argvec[10] = (unsigned long)(arg10); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- "ld_add r6, r29, 8 \n\t" /*arg7 -> r6 */ \
- "ld_add r7, r29, 8 \n\t" /*arg8 -> r7 */ \
- "ld_add r8, r29, 8 \n\t" /*arg9 -> r8 */ \
- "ld_add r9, r29, 8 \n\t" /*arg10 -> r9 */ \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 8\n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
- arg6,arg7,arg8,arg9,arg10, \
- arg11) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[12]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- _argvec[7] = (unsigned long)(arg7); \
- _argvec[8] = (unsigned long)(arg8); \
- _argvec[9] = (unsigned long)(arg9); \
- _argvec[10] = (unsigned long)(arg10); \
- _argvec[11] = (unsigned long)(arg11); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- "ld_add r6, r29, 8 \n\t" /*arg7 -> r6 */ \
- "ld_add r7, r29, 8 \n\t" /*arg8 -> r7 */ \
- "ld_add r8, r29, 8 \n\t" /*arg9 -> r8 */ \
- "ld_add r9, r29, 8 \n\t" /*arg10 -> r9 */ \
- "ld r10, r29 \n\t" \
- "st_add sp, r10, -16 \n\t" \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 24 \n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-
-#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5, \
- arg6,arg7,arg8,arg9,arg10, \
- arg11,arg12) \
- do { \
- volatile OrigFn _orig = (orig); \
- volatile unsigned long _argvec[13]; \
- volatile unsigned long _res; \
- _argvec[0] = (unsigned long)_orig.nraddr; \
- _argvec[1] = (unsigned long)(arg1); \
- _argvec[2] = (unsigned long)(arg2); \
- _argvec[3] = (unsigned long)(arg3); \
- _argvec[4] = (unsigned long)(arg4); \
- _argvec[5] = (unsigned long)(arg5); \
- _argvec[6] = (unsigned long)(arg6); \
- _argvec[7] = (unsigned long)(arg7); \
- _argvec[8] = (unsigned long)(arg8); \
- _argvec[9] = (unsigned long)(arg9); \
- _argvec[10] = (unsigned long)(arg10); \
- _argvec[11] = (unsigned long)(arg11); \
- _argvec[12] = (unsigned long)(arg12); \
- __asm__ volatile( \
- "addi sp, sp, -8 \n\t" \
- "st_add sp, lr, -8 \n\t" \
- "move r29, %1 \n\t" \
- "ld_add r12, r29, 8 \n\t" /* target->r11 */ \
- "ld_add r0, r29, 8 \n\t" /*arg1 -> r0 */ \
- "ld_add r1, r29, 8 \n\t" /*arg2 -> r1 */ \
- "ld_add r2, r29, 8 \n\t" /*arg3 -> r2 */ \
- "ld_add r3, r29, 8 \n\t" /*arg4 -> r3 */ \
- "ld_add r4, r29, 8 \n\t" /*arg5 -> r4 */ \
- "ld_add r5, r29, 8 \n\t" /*arg6 -> r5 */ \
- "ld_add r6, r29, 8 \n\t" /*arg7 -> r6 */ \
- "ld_add r7, r29, 8 \n\t" /*arg8 -> r7 */ \
- "ld_add r8, r29, 8 \n\t" /*arg9 -> r8 */ \
- "ld_add r9, r29, 8 \n\t" /*arg10 -> r9 */ \
- "addi r28, sp, -8 \n\t" \
- "addi sp, sp, -24 \n\t" \
- "ld_add r10, r29, 8 \n\t" \
- "ld r11, r29 \n\t" \
- "st_add r28, r10, 8 \n\t" \
- "st r28, r11 \n\t" \
- VALGRIND_CALL_NOREDIR_R12 \
- "addi sp, sp, 32 \n\t" \
- "ld_add lr, sp, 8 \n\t" \
- "move %0, r0\n" \
- : /*out*/ "=r" (_res) \
- : /*in*/ "r" (&_argvec[0]) \
- : /*trash*/ "memory", __CALLER_SAVED_REGS); \
- lval = (__typeof__(lval)) _res; \
- } while (0)
-#endif /* PLAT_tilegx_linux */
-
/* ------------------------------------------------------------------ */
/* ARCHITECTURE INDEPENDENT MACROS for CLIENT REQUESTS. */
/* */
#undef PLAT_s390x_linux
#undef PLAT_mips32_linux
#undef PLAT_mips64_linux
-#undef PLAT_tilegx_linux
#undef PLAT_x86_solaris
#undef PLAT_amd64_solaris
# include "vki-posixtypes-mips32-linux.h"
#elif defined(VGA_mips64)
# include "vki-posixtypes-mips64-linux.h"
-#elif defined(VGA_tilegx)
-# include "vki-posixtypes-tilegx-linux.h"
#else
# error Unknown platform
#endif
# include "vki-mips32-linux.h"
#elif defined(VGA_mips64)
# include "vki-mips64-linux.h"
-#elif defined(VGA_tilegx)
-# include "vki-tilegx-linux.h"
#else
# error Unknown platform
#endif
+++ /dev/null
-
-/*--------------------------------------------------------------------*/
-/*--- Tilegx/Linux-specific kernel interface: posix types. ---*/
-/*--- vki-posixtypes-tilegx-linux.h ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#ifndef __VKI_POSIXTYPES_TILEGX_LINUX_H
-#define __VKI_POSIXTYPES_TILEGX_LINUX_H
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm-generic/posix_types.h
-//----------------------------------------------------------------------
-
-typedef unsigned int __vki_kernel_mode_t;
-typedef long __vki_kernel_off_t;
-typedef int __vki_kernel_pid_t;
-typedef int __vki_kernel_ipc_pid_t;
-typedef unsigned int __vki_kernel_uid_t;
-typedef unsigned int __vki_kernel_gid_t;
-typedef unsigned long __vki_kernel_size_t;
-typedef long __vki_kernel_time_t;
-typedef long __vki_kernel_suseconds_t;
-typedef long __vki_kernel_clock_t;
-typedef int __vki_kernel_timer_t;
-typedef int __vki_kernel_clockid_t;
-typedef char * __vki_kernel_caddr_t;
-typedef long long __vki_kernel_loff_t;
-
-typedef struct {
- int val[2];
-} __vki_kernel_fsid_t;
-
-typedef __vki_kernel_uid_t __vki_kernel_old_uid_t;
-typedef __vki_kernel_gid_t __vki_kernel_old_gid_t;
-typedef __vki_kernel_uid_t __vki_kernel_uid32_t;
-typedef __vki_kernel_gid_t __vki_kernel_gid32_t;
-
-#endif // __VKI_POSIXTYPES_TILEGX_LINUX_H
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
+++ /dev/null
-
-/*--------------------------------------------------------------------*/
-/*--- System call numbers for tilegx-linux. ---*/
-/*--- vki-scnums-tilegx-linux.h ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#ifndef __VKI_SCNUMS_TILEGX_LINUX_H
-#define __VKI_SCNUMS_TILEGX_LINUX_H
-
-/* From tilegx linux/include/asm-generic/unistd.h */
-
-#define __NR_io_setup 0
-#define __NR_io_destroy 1
-#define __NR_io_submit 2
-#define __NR_io_cancel 3
-#define __NR_io_getevents 4
-
-/* fs/xattr.c */
-#define __NR_setxattr 5
-#define __NR_lsetxattr 6
-#define __NR_fsetxattr 7
-#define __NR_getxattr 8
-#define __NR_lgetxattr 9
-#define __NR_fgetxattr 10
-#define __NR_listxattr 11
-#define __NR_llistxattr 12
-#define __NR_flistxattr 13
-#define __NR_removexattr 14
-#define __NR_lremovexattr 15
-#define __NR_fremovexattr 16
-
-/* fs/dcache.c */
-#define __NR_getcwd 17
-
-/* fs/cookies.c */
-#define __NR_lookup_dcookie 18
-
-/* fs/eventfd.c */
-#define __NR_eventfd2 19
-
-/* fs/eventpoll.c */
-#define __NR_epoll_create1 20
-#define __NR_epoll_ctl 21
-#define __NR_epoll_pwait 22
-
-/* fs/fcntl.c */
-#define __NR_dup 23
-#define __NR_dup2 23
-#define __NR_dup3 24
-#define __NR_fcntl 25
-
-/* fs/inotify_user.c */
-#define __NR_inotify_init1 26
-#define __NR_inotify_add_watch 27
-#define __NR_inotify_rm_watch 28
-
-/* fs/ioctl.c */
-#define __NR_ioctl 29
-
-/* fs/ioprio.c */
-#define __NR_ioprio_set 30
-#define __NR_ioprio_get 31
-
-/* fs/locks.c */
-#define __NR_flock 32
-
-/* fs/namei.c */
-#define __NR_mknodat 33
-#define __NR_mkdirat 34
-#define __NR_unlinkat 35
-#define __NR_symlinkat 36
-#define __NR_linkat 37
-#define __NR_renameat 38
-
-/* fs/namespace.c */
-#define __NR_umount2 39
-
-#define __NR_mount 40
-#define __NR_pivot_root 41
-
-/* fs/nfsctl.c */
-#define __NR_nfsservctl 42
-
-/* fs/open.c */
-#define __NR_statfs 43
-#define __NR_fstatfs 44
-#define __NR_truncate 45
-#define __NR_ftruncate 46
-#define __NR_fallocate 47
-#define __NR_faccessat 48
-#define __NR_chdir 49
-#define __NR_fchdir 50
-#define __NR_chroot 51
-#define __NR_fchmod 52
-#define __NR_fchmodat 53
-#define __NR_fchownat 54
-#define __NR_fchown 55
-#define __NR_openat 56
-#define __NR_close 57
-#define __NR_vhangup 58
-
-/* fs/pipe.c */
-#define __NR_pipe2 59
-
-/* fs/quota.c */
-#define __NR_quotactl 60
-
-/* fs/readdir.c */
-#define __NR_getdents64 61
-
-/* fs/read_write.c */
-#define __NR_lseek 62
-#define __NR_read 63
-#define __NR_write 64
-#define __NR_readv 65
-#define __NR_writev 66
-#define __NR_pread64 67
-#define __NR_pwrite64 68
-#define __NR_preadv 69
-#define __NR_pwritev 70
-
-/* fs/sendfile.c */
-#define __NR_sendfile 71
-
-/* fs/select.c */
-#define __NR_pselect6 72
-#define __NR_ppoll 73
-
-/* fs/signalfd.c */
-#define __NR_signalfd4 74
-
-/* fs/splice.c */
-#define __NR_vmsplice 75
-#define __NR_splice 76
-#define __NR_tee 77
-
-/* fs/stat.c */
-#define __NR_readlinkat 78
-#define __NR3264_fstatat 79
-#define __NR_stat -10000
-#define __NR_fstat 80
-
-/* fs/sync.c */
-#define __NR_sync 81
-#define __NR_fsync 82
-#define __NR_fdatasync 83
-#define __NR_sync_file_range2 84
-#define __NR_sync_file_range 84
-
-/* fs/timerfd.c */
-#define __NR_timerfd_create 85
-#define __NR_timerfd_settime 86
-#define __NR_timerfd_gettime 87
-
-/* fs/utimes.c */
-#define __NR_utimensat 88
-
-/* kernel/acct.c */
-#define __NR_acct 89
-
-/* kernel/capability.c */
-#define __NR_capget 90
-#define __NR_capset 91
-
-/* kernel/exec_domain.c */
-#define __NR_personality 92
-
-/* kernel/exit.c */
-#define __NR_exit 93
-
-#define __NR_exit_group 94
-#define __NR_waitid 95
-
-/* kernel/fork.c */
-#define __NR_set_tid_address 96
-#define __NR_unshare 97
-
-/* kernel/futex.c */
-#define __NR_futex 98
-#define __NR_set_robust_list 99
-#define __NR_get_robust_list 100
-
-/* kernel/hrtimer.c */
-#define __NR_nanosleep 101
-
-/* kernel/itimer.c */
-#define __NR_getitimer 102
-#define __NR_setitimer 103
-
-/* kernel/kexec.c */
-#define __NR_kexec_load 104
-
-/* kernel/module.c */
-#define __NR_init_module 105
-#define __NR_delete_module 106
-
-/* kernel/posix-timers.c */
-#define __NR_timer_create 107
-#define __NR_timer_gettime 108
-#define __NR_timer_getoverrun 109
-#define __NR_timer_settime 110
-#define __NR_timer_delete 111
-#define __NR_clock_settime 112
-#define __NR_clock_gettime 113
-#define __NR_clock_getres 114
-#define __NR_clock_nanosleep 115
-
-/* kernel/printk.c */
-#define __NR_syslog 116
-
-/* kernel/ptrace.c */
-#define __NR_ptrace 117
-
-/* kernel/sched.c */
-#define __NR_sched_setparam 118
-#define __NR_sched_setscheduler 119
-#define __NR_sched_getscheduler 120
-#define __NR_sched_getparam 121
-#define __NR_sched_setaffinity 122
-#define __NR_sched_getaffinity 123
-#define __NR_sched_yield 124
-#define __NR_sched_get_priority_max 125
-#define __NR_sched_get_priority_min 126
-#define __NR_sched_rr_get_interval 127
-
-/* kernel/signal.c */
-#define __NR_restart_syscall 128
-#define __NR_kill 129
-#define __NR_tkill 130
-#define __NR_tgkill 131
-#define __NR_sigaltstack 132
-#define __NR_rt_sigsuspend 133
-#define __NR_rt_sigaction 134
-#define __NR_rt_sigprocmask 135
-#define __NR_rt_sigpending 136
-#define __NR_rt_sigtimedwait 137
-#define __NR_rt_sigqueueinfo 138
-#define __NR_rt_sigreturn 139
-
-/* kernel/sys.c */
-#define __NR_setpriority 140
-#define __NR_getpriority 141
-#define __NR_reboot 142
-#define __NR_setregid 143
-#define __NR_setgid 144
-#define __NR_setreuid 145
-#define __NR_setuid 146
-#define __NR_setresuid 147
-#define __NR_getresuid 148
-#define __NR_setresgid 149
-#define __NR_getresgid 150
-#define __NR_setfsuid 151
-#define __NR_setfsgid 152
-#define __NR_times 153
-#define __NR_setpgid 154
-#define __NR_getpgid 155
-#define __NR_getsid 156
-#define __NR_setsid 157
-#define __NR_getgroups 158
-#define __NR_setgroups 159
-#define __NR_uname 160
-#define __NR_sethostname 161
-#define __NR_setdomainname 162
-#define __NR_getrlimit 163
-#define __NR_setrlimit 164
-#define __NR_getrusage 165
-#define __NR_umask 166
-#define __NR_prctl 167
-#define __NR_getcpu 168
-
-/* kernel/time.c */
-#define __NR_gettimeofday 169
-
-#define __NR_settimeofday 170
-#define __NR_adjtimex 171
-
-/* kernel/timer.c */
-#define __NR_getpid 172
-#define __NR_getppid 173
-#define __NR_getuid 174
-#define __NR_geteuid 175
-#define __NR_getgid 176
-#define __NR_getpgrp __NR_getgid
-#define __NR_getegid 177
-#define __NR_gettid 178
-#define __NR_sysinfo 179
-
-/* ipc/mqueue.c */
-#define __NR_mq_open 180
-#define __NR_mq_unlink 181
-#define __NR_mq_timedsend 182
-#define __NR_mq_timedreceive 183
-#define __NR_mq_notify 184
-#define __NR_mq_getsetattr 185
-
-/* ipc/msg.c */
-#define __NR_msgget 186
-#define __NR_msgctl 187
-#define __NR_msgrcv 188
-#define __NR_msgsnd 189
-
-/* ipc/sem.c */
-#define __NR_semget 190
-#define __NR_semctl 191
-#define __NR_semtimedop 192
-#define __NR_semop 193
-
-/* ipc/shm.c */
-#define __NR_shmget 194
-#define __NR_shmctl 195
-#define __NR_shmat 196
-#define __NR_shmdt 197
-
-/* net/socket.c */
-#define __NR_socket 198
-#define __NR_socketpair 199
-#define __NR_bind 200
-#define __NR_listen 201
-#define __NR_accept 202
-#define __NR_connect 203
-#define __NR_getsockname 204
-#define __NR_getpeername 205
-#define __NR_sendto 206
-#define __NR_recvfrom 207
-#define __NR_setsockopt 208
-#define __NR_getsockopt 209
-#define __NR_shutdown 210
-#define __NR_sendmsg 211
-#define __NR_recvmsg 212
-
-/* mm/filemap.c */
-#define __NR_readahead 213
-
-/* mm/nommu.c, also with MMU */
-#define __NR_brk 214
-#define __NR_munmap 215
-#define __NR_mremap 216
-
-/* security/keys/keyctl.c */
-#define __NR_add_key 217
-#define __NR_request_key 218
-#define __NR_keyctl 219
-
-/* arch/example/kernel/sys_example.c */
-#define __NR_clone 220
-#define __NR_fork __NR_clone
-#define __NR_execve 221
-#define __NR_mmap 222
-
-/* mm/fadvise.c */
-#define __NR3264_fadvise64 223
-
-/* mm/, CONFIG_MMU only */
-
-#define __NR_swapon 224
-#define __NR_swapoff 225
-#define __NR_mprotect 226
-#define __NR_msync 227
-#define __NR_mlock 228
-#define __NR_munlock 229
-#define __NR_mlockall 230
-#define __NR_munlockall 231
-#define __NR_mincore 232
-#define __NR_madvise 233
-#define __NR_remap_file_pages 234
-#define __NR_mbind 235
-#define __NR_get_mempolicy 236
-#define __NR_set_mempolicy 237
-#define __NR_migrate_pages 238
-#define __NR_move_pages 239
-#define __NR_rt_tgsigqueueinfo 240
-#define __NR_perf_event_open 241
-#define __NR_accept4 242
-#define __NR_recvmmsg 243
-
-/*
- * Architectures may provide up to 16 syscalls of their own
- * starting with this value.
- */
-#define __NR_arch_specific_syscall 244
-#define __NR_cacheflush 245
-#define __NR_set_dataplane 246
-#define __NR_wait4 260
-#define __NR_prlimit64 261
-#define __NR_fanotify_init 262
-#define __NR_fanotify_mark 263
-#define __NR_syscalls 264
-
-#endif /* __VKI_SCNUMS_TILEGX_LINUX_H */
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
+++ /dev/null
-
-/*--------------------------------------------------------------------*/
-/*--- TILEGX/Linux-specific kernel interface. vki-tilegx-linux.h ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#ifndef __VKI_TILEGX_LINUX_H
-#define __VKI_TILEGX_LINUX_H
-
-// TILEGX is little-endian.
-#define VKI_LITTLE_ENDIAN 1
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm-generic/types.h
-//----------------------------------------------------------------------
-
-typedef unsigned char __vki_u8;
-
-typedef __signed__ short __vki_s16;
-typedef unsigned short __vki_u16;
-
-typedef __signed__ int __vki_s32;
-typedef unsigned int __vki_u32;
-
-typedef __signed__ long long __vki_s64;
-typedef unsigned long long __vki_u64;
-
-typedef unsigned short vki_u16;
-
-typedef unsigned int vki_u32;
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/page.h
-//----------------------------------------------------------------------
-
-#define VKI_PAGE_SHIFT 16
-#define VKI_PAGE_SIZE (1UL << VKI_PAGE_SHIFT)
-#define VKI_MAX_PAGE_SHIFT VKI_PAGE_SHIFT
-#define VKI_MAX_PAGE_SIZE VKI_PAGE_SIZE
-
-//----------------------------------------------------------------------
-// From linux/include/asm/shmparam.h
-//----------------------------------------------------------------------
-
-#define VKI_SHMLBA VKI_PAGE_SIZE
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/signal.h
-//----------------------------------------------------------------------
-
-#define _VKI_NSIG 64
-#define _VKI_NSIG_BPW 64
-#define _VKI_NSIG_WORDS (_VKI_NSIG / _VKI_NSIG_BPW)
-
-typedef unsigned long vki_old_sigset_t;
-
-typedef struct {
- unsigned long sig[_VKI_NSIG_WORDS];
-} vki_sigset_t;
-
-#define VKI_SIGHUP 1
-#define VKI_SIGINT 2
-#define VKI_SIGQUIT 3
-#define VKI_SIGILL 4
-#define VKI_SIGTRAP 5
-#define VKI_SIGABRT 6
-#define VKI_SIGIOT 6
-#define VKI_SIGBUS 7
-#define VKI_SIGFPE 8
-#define VKI_SIGKILL 9
-#define VKI_SIGUSR1 10
-#define VKI_SIGSEGV 11
-#define VKI_SIGUSR2 12
-#define VKI_SIGPIPE 13
-#define VKI_SIGALRM 14
-#define VKI_SIGTERM 15
-#define VKI_SIGSTKFLT 16
-#define VKI_SIGCHLD 17
-#define VKI_SIGCONT 18
-#define VKI_SIGSTOP 19
-#define VKI_SIGTSTP 20
-#define VKI_SIGTTIN 21
-#define VKI_SIGTTOU 22
-#define VKI_SIGURG 23
-#define VKI_SIGXCPU 24
-#define VKI_SIGXFSZ 25
-#define VKI_SIGVTALRM 26
-#define VKI_SIGPROF 27
-#define VKI_SIGWINCH 28
-#define VKI_SIGIO 29
-#define VKI_SIGPOLL 29
-#define VKI_SIGPWR 30
-#define VKI_SIGSYS 31
-#define VKI_SIGUNUSED 31
-
-#define VKI_SIGRTMIN 32
-#define VKI_SIGRTMAX _VKI_NSIG
-
-#define VKI_SA_NOCLDSTOP 0x00000001
-#define VKI_SA_NOCLDWAIT 0x00000002
-#define VKI_SA_SIGINFO 0x00000004
-#define VKI_SA_ONSTACK 0x08000000
-#define VKI_SA_RESTART 0x10000000
-#define VKI_SA_NODEFER 0x40000000
-#define VKI_SA_RESETHAND 0x80000000
-
-#define VKI_SA_NOMASK VKI_SA_NODEFER
-#define VKI_SA_ONESHOT VKI_SA_RESETHAND
-
-#define VKI_SA_RESTORER 0x04000000
-
-#define VKI_SS_ONSTACK 1
-#define VKI_SS_DISABLE 2
-
-#define VKI_MINSIGSTKSZ 2048
-
-#define VKI_SIG_BLOCK 0 /* for blocking signals */
-#define VKI_SIG_UNBLOCK 1 /* for unblocking signals */
-#define VKI_SIG_SETMASK 2 /* for setting the signal mask */
-
-typedef void __vki_signalfn_t(int);
-typedef __vki_signalfn_t __user *__vki_sighandler_t;
-
-typedef void __vki_restorefn_t(void);
-typedef __vki_restorefn_t __user *__vki_sigrestore_t;
-
-#define VKI_SIG_DFL ((__vki_sighandler_t)0) /* default signal handling */
-#define VKI_SIG_IGN ((__vki_sighandler_t)1) /* ignore signal */
-
-struct vki_sigaction_base {
- // [[Nb: a 'k' prefix is added to "sa_handler" because
- // bits/sigaction.h (which gets dragged in somehow via signal.h)
- // #defines it as something else. Since that is done for glibc's
- // purposes, which we don't care about here, we use our own name.]]
- __vki_sighandler_t ksa_handler;
- unsigned long sa_flags;
- __vki_sigrestore_t sa_restorer;
- vki_sigset_t sa_mask; /* mask last for extensibility */
-};
-
-/* On Linux we use the same type for passing sigactions to
- and from the kernel. Hence: */
-typedef struct vki_sigaction_base vki_sigaction_toK_t;
-typedef struct vki_sigaction_base vki_sigaction_fromK_t;
-
-
-typedef struct vki_sigaltstack {
- void __user *ss_sp;
- int ss_flags;
- vki_size_t ss_size;
-} vki_stack_t;
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/sigcontext.h
-//----------------------------------------------------------------------
-
-// Tilegx has no FP registers.
-struct _vki_fpstate {
-
-};
-
-struct vki_sigcontext {
- unsigned long gregs[53];
- unsigned long tp;
- unsigned long sp;
- unsigned long lr;
- unsigned long pc;
- unsigned long ics;
- unsigned long faultnum;
- unsigned long pad[5];
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/mman.h
-//----------------------------------------------------------------------
-
-#define VKI_PROT_READ 0x1 /* page can be read */
-#define VKI_PROT_WRITE 0x2 /* page can be written */
-#define VKI_PROT_EXEC 0x4 /* page can be executed */
-#define VKI_PROT_NONE 0x0 /* page can not be accessed */
-#define VKI_PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
-#define VKI_PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
-
-#define VKI_MAP_SHARED 0x01 /* Share changes */
-#define VKI_MAP_PRIVATE 0x02 /* Changes are private */
-#define VKI_MAP_FIXED 0x10 /* Interpret addr exactly */
-#define VKI_MAP_ANONYMOUS 0x20 /* don't use a file */
-#define VKI_MAP_HUGETLB 0x4000 /* Use HUGETLB */
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/fcntl.h
-//----------------------------------------------------------------------
-
-#define VKI_O_RDONLY 00
-#define VKI_O_WRONLY 01
-#define VKI_O_RDWR 02
-#define VKI_O_ACCMODE 03
-#define VKI_O_CREAT 0100 /* not fcntl */
-#define VKI_O_EXCL 0200 /* not fcntl */
-#define VKI_O_TRUNC 01000 /* not fcntl */
-#define VKI_O_APPEND 02000
-#define VKI_O_NONBLOCK 04000
-#define VKI_O_LARGEFILE 0100000
-
-#define VKI_AT_FDCWD -100
-
-#define VKI_F_DUPFD 0 /* dup */
-#define VKI_F_GETFD 1 /* get close_on_exec */
-#define VKI_F_SETFD 2 /* set/clear close_on_exec */
-#define VKI_F_GETFL 3 /* get file->f_flags */
-#define VKI_F_SETFL 4 /* set file->f_flags */
-#define VKI_F_GETLK 5
-#define VKI_F_SETLK 6
-#define VKI_F_SETLKW 7
-
-#define VKI_F_SETOWN 8 /* for sockets. */
-#define VKI_F_GETOWN 9 /* for sockets. */
-#define VKI_F_SETSIG 10 /* for sockets. */
-#define VKI_F_GETSIG 11 /* for sockets. */
-
-#define VKI_F_SETOWN_EX 15
-#define VKI_F_GETOWN_EX 16
-#define VKI_F_GETLK64 12
-#define VKI_F_SETLK64 13
-#define VKI_F_SETLKW64 14
-
-#define VKI_F_OFD_GETLK -1
-#define VKI_F_OFD_SETLK -2
-#define VKI_F_OFD_SETLKW -3
-
-#define VKI_FD_CLOEXEC 1 /* actually anything with low bit set goes */
-
-#define VKI_F_LINUX_SPECIFIC_BASE 1024
-
-struct vki_f_owner_ex {
- int type;
- __vki_kernel_pid_t pid;
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/resource.h
-//----------------------------------------------------------------------
-
-#define VKI_RLIMIT_DATA 2 /* max data size */
-#define VKI_RLIMIT_STACK 3 /* max stack size */
-#define VKI_RLIMIT_CORE 4 /* max core file size */
-#define VKI_RLIMIT_NOFILE 7 /* max number of open files */
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/socket.h
-//----------------------------------------------------------------------
-
-#define VKI_SOL_SOCKET 1
-#define VKI_SO_TYPE 3
-#define VKI_SO_ATTACH_FILTER 26
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/sockios.h
-//----------------------------------------------------------------------
-
-#define VKI_SIOCSPGRP 0x8902
-#define VKI_SIOCGPGRP 0x8904
-#define VKI_SIOCATMARK 0x8905
-#define VKI_SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
-#define VKI_SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/stat.h
-//----------------------------------------------------------------------
-
-struct vki_stat {
- unsigned long st_dev; /* Device. */
- unsigned long st_ino; /* File serial number. */
- unsigned int st_mode; /* File mode. */
- unsigned int st_nlink; /* Link count. */
- unsigned int st_uid; /* User ID of the file's owner. */
- unsigned int st_gid; /* Group ID of the file's group. */
- unsigned long st_rdev; /* Device number, if device. */
- unsigned long __pad1;
- long st_size; /* Size of file, in bytes. */
- int st_blksize; /* Optimal block size for I/O. */
- int __pad2;
- long st_blocks; /* Number 512-byte blocks allocated. */
- long st_atime; /* Time of last access. */
- unsigned long st_atime_nsec;
- long st_mtime; /* Time of last modification. */
- unsigned long st_mtime_nsec;
- long st_ctime; /* Time of last status change. */
- unsigned long st_ctime_nsec;
- unsigned int __unused4;
- unsigned int __unused5;
-};
-
-struct vki_stat64 {
- unsigned long st_dev; /* Device. */
- unsigned long st_ino; /* File serial number. */
- unsigned int st_mode; /* File mode. */
- unsigned int st_nlink; /* Link count. */
- unsigned int st_uid; /* User ID of the file's owner. */
- unsigned int st_gid; /* Group ID of the file's group. */
- unsigned long st_rdev; /* Device number, if device. */
- unsigned long __pad1;
- long st_size; /* Size of file, in bytes. */
- int st_blksize; /* Optimal block size for I/O. */
- int __pad2;
- long st_blocks; /* Number 512-byte blocks allocated. */
- long st_atime; /* Time of last access. */
- unsigned long st_atime_nsec;
- long st_mtime; /* Time of last modification. */
- unsigned long st_mtime_nsec;
- long st_ctime; /* Time of last status change. */
- unsigned long st_ctime_nsec;
- unsigned int __unused4;
- unsigned int __unused5;
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/statfs.h
-//----------------------------------------------------------------------
-
-struct vki_statfs {
- long f_type;
- long f_bsize;
- long f_blocks;
- long f_bfree;
- long f_bavail;
- long f_files;
- long f_ffree;
- __vki_kernel_fsid_t f_fsid;
- long f_namelen;
- long f_frsize;
- long f_flags;
- long f_spare[4];
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/termios.h
-//----------------------------------------------------------------------
-
-struct vki_winsize {
- unsigned short ws_row;
- unsigned short ws_col;
- unsigned short ws_xpixel;
- unsigned short ws_ypixel;
-};
-
-#define VKI_NCC 8
-struct vki_termio {
- unsigned short c_iflag; /* input mode flags */
- unsigned short c_oflag; /* output mode flags */
- unsigned short c_cflag; /* control mode flags */
- unsigned short c_lflag; /* local mode flags */
- unsigned char c_line; /* line discipline */
- unsigned char c_cc[VKI_NCC]; /* control characters */
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/termbits.h
-//----------------------------------------------------------------------
-
-typedef unsigned char vki_cc_t;
-typedef unsigned int vki_tcflag_t;
-
-#define VKI_NCCS 19
-struct vki_termios {
- vki_tcflag_t c_iflag; /* input mode flags */
- vki_tcflag_t c_oflag; /* output mode flags */
- vki_tcflag_t c_cflag; /* control mode flags */
- vki_tcflag_t c_lflag; /* local mode flags */
- vki_cc_t c_line; /* line discipline */
- vki_cc_t c_cc[VKI_NCCS]; /* control characters */
-};
-
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/ioctl.h
-//----------------------------------------------------------------------
-
-#define _VKI_IOC_NRBITS 8
-#define _VKI_IOC_TYPEBITS 8
-#define _VKI_IOC_SIZEBITS 14
-#define _VKI_IOC_DIRBITS 2
-
-#define _VKI_IOC_SIZEMASK ((1 << _VKI_IOC_SIZEBITS)-1)
-#define _VKI_IOC_DIRMASK ((1 << _VKI_IOC_DIRBITS)-1)
-
-#define _VKI_IOC_NRSHIFT 0
-#define _VKI_IOC_TYPESHIFT (_VKI_IOC_NRSHIFT+_VKI_IOC_NRBITS)
-#define _VKI_IOC_SIZESHIFT (_VKI_IOC_TYPESHIFT+_VKI_IOC_TYPEBITS)
-#define _VKI_IOC_DIRSHIFT (_VKI_IOC_SIZESHIFT+_VKI_IOC_SIZEBITS)
-
-#define _VKI_IOC_NONE 0U
-#define _VKI_IOC_WRITE 1U
-#define _VKI_IOC_READ 2U
-
-#define _VKI_IOC(dir,type,nr,size) \
- (((dir) << _VKI_IOC_DIRSHIFT) | \
- ((type) << _VKI_IOC_TYPESHIFT) | \
- ((nr) << _VKI_IOC_NRSHIFT) | \
- ((size) << _VKI_IOC_SIZESHIFT))
-
-#define _VKI_IO(type,nr) _VKI_IOC(_VKI_IOC_NONE,(type),(nr),0)
-#define _VKI_IOR(type,nr,size) _VKI_IOC(_VKI_IOC_READ,(type),(nr),sizeof(size))
-#define _VKI_IOW(type,nr,size) _VKI_IOC(_VKI_IOC_WRITE,(type),(nr),sizeof(size))
-#define _VKI_IOWR(type,nr,size) _VKI_IOC(_VKI_IOC_READ|_VKI_IOC_WRITE,(type),(nr),sizeof(size))
-
-#define _VKI_IOC_DIR(nr) (((nr) >> _VKI_IOC_DIRSHIFT) & _VKI_IOC_DIRMASK)
-#define _VKI_IOC_SIZE(nr) (((nr) >> _VKI_IOC_SIZESHIFT) & _VKI_IOC_SIZEMASK)
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/ioctls.h
-//----------------------------------------------------------------------
-
-#define VKI_TCGETS 0x5401
-#define VKI_TCSETS 0x5402
-#define VKI_TCSETSW 0x5403
-#define VKI_TCSETSF 0x5404
-#define VKI_TCGETA 0x5405
-#define VKI_TCSETA 0x5406
-#define VKI_TCSETAW 0x5407
-#define VKI_TCSETAF 0x5408
-#define VKI_TCSBRK 0x5409
-#define VKI_TCXONC 0x540A
-#define VKI_TCFLSH 0x540B
-#define VKI_TIOCEXCL 0x540C
-#define VKI_TIOCNXCL 0x540D
-#define VKI_TIOCSCTTY 0x540E
-#define VKI_TIOCGPGRP 0x540F
-#define VKI_TIOCSPGRP 0x5410
-#define VKI_TIOCOUTQ 0x5411
-#define VKI_TIOCSTI 0x5412
-#define VKI_TIOCGWINSZ 0x5413
-#define VKI_TIOCSWINSZ 0x5414
-#define VKI_TIOCMGET 0x5415
-#define VKI_TIOCMBIS 0x5416
-#define VKI_TIOCMBIC 0x5417
-#define VKI_TIOCMSET 0x5418
-#define VKI_TIOCGSOFTCAR 0x5419
-#define VKI_TIOCSSOFTCAR 0x541A
-#define VKI_FIONREAD 0x541B
-#define VKI_TIOCINQ VKI_FIONREAD
-#define VKI_TIOCLINUX 0x541C
-#define VKI_TIOCCONS 0x541D
-#define VKI_TIOCGSERIAL 0x541E
-#define VKI_TIOCSSERIAL 0x541F
-#define VKI_TIOCPKT 0x5420
-#define VKI_FIONBIO 0x5421
-#define VKI_TIOCNOTTY 0x5422
-#define VKI_TIOCSETD 0x5423
-#define VKI_TIOCGETD 0x5424
-#define VKI_TCSBRKP 0x5425
-#define VKI_TIOCGPTN _VKI_IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
-#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty */
-
-#define VKI_FIONCLEX 0x5450
-#define VKI_FIOCLEX 0x5451
-#define VKI_FIOASYNC 0x5452
-#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
-#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
-
-// X86_64 define above, assume tilegx need no more than that. --FIXME
-
-#define VKI_TIOCGPTN _VKI_IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
-#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty */
-
-#define VKI_FIOASYNC 0x5452
-#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
-#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/poll.h
-//----------------------------------------------------------------------
-
-#define VKI_POLLIN 0x0001
-
-struct vki_pollfd {
- int fd;
- short events;
- short revents;
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/user.h
-//----------------------------------------------------------------------
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/ucontext.h
-//----------------------------------------------------------------------
-
-struct vki_ucontext {
- unsigned long uc_flags;
- struct vki_ucontext *uc_link;
- vki_stack_t uc_stack;
- struct vki_sigcontext uc_mcontext;
- vki_sigset_t uc_sigmask; /* mask last for extensibility */
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/segment.h
-//----------------------------------------------------------------------
-// NA
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm-generic/prctl.h
-//----------------------------------------------------------------------
-// NA
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/ldt.h
-//----------------------------------------------------------------------
-
-// NA
-
-//----------------------------------------------------------------------
-// From linux-2.6.11.2/include/asm-x86_64/ipcbuf.h
-//----------------------------------------------------------------------
-
-struct vki_ipc64_perm
-{
- __vki_kernel_key_t key;
- __vki_kernel_uid32_t uid;
- __vki_kernel_gid32_t gid;
- __vki_kernel_uid32_t cuid;
- __vki_kernel_gid32_t cgid;
- __vki_kernel_mode_t mode;
- unsigned char __pad1[4 - sizeof(__vki_kernel_mode_t)];
- unsigned short seq;
- unsigned short __pad2;
- unsigned long __unused1;
- unsigned long __unused2;
-};
-
-//----------------------------------------------------------------------
-// From linux-2.6.11.2/include/asm-x86_64/sembuf.h
-//----------------------------------------------------------------------
-
-struct vki_semid64_ds {
- struct vki_ipc64_perm sem_perm; /* permissions .. see ipc.h */
- __vki_kernel_time_t sem_otime; /* last semop time */
- __vki_kernel_time_t sem_ctime; /* last change time */
- unsigned long sem_nsems; /* no. of semaphores in array */
- unsigned long __unused3;
- unsigned long __unused4;
-};
-
-//----------------------------------------------------------------------
-// From linux-2.6.11.2/include/asm-x86_64/msgbuf.h
-//----------------------------------------------------------------------
-
-struct vki_msqid64_ds {
- struct vki_ipc64_perm msg_perm;
- __vki_kernel_time_t msg_stime; /* last msgsnd time */
- __vki_kernel_time_t msg_rtime; /* last msgrcv time */
- __vki_kernel_time_t msg_ctime; /* last change time */
- unsigned long msg_cbytes; /* current number of bytes on queue */
- unsigned long msg_qnum; /* number of messages in queue */
- unsigned long msg_qbytes; /* max number of bytes on queue */
- __vki_kernel_pid_t msg_lspid; /* pid of last msgsnd */
- __vki_kernel_pid_t msg_lrpid; /* last receive pid */
- unsigned long __unused4;
- unsigned long __unused5;
-};
-
-//----------------------------------------------------------------------
-// From linux-2.6.11.2/include/asm-x86_64/shmbuf.h
-//----------------------------------------------------------------------
-
-struct vki_shmid64_ds {
- struct vki_ipc64_perm shm_perm; /* operation perms */
- vki_size_t shm_segsz; /* size of segment (bytes) */
- __vki_kernel_time_t shm_atime; /* last attach time */
- __vki_kernel_time_t shm_dtime; /* last detach time */
- __vki_kernel_time_t shm_ctime; /* last change time */
- __vki_kernel_pid_t shm_cpid; /* pid of creator */
- __vki_kernel_pid_t shm_lpid; /* pid of last operator */
- unsigned long shm_nattch; /* no. of current attaches */
- unsigned long __unused4;
- unsigned long __unused5;
-};
-
-struct vki_shminfo64 {
- unsigned long shmmax;
- unsigned long shmmin;
- unsigned long shmmni;
- unsigned long shmseg;
- unsigned long shmall;
- unsigned long __unused1;
- unsigned long __unused2;
- unsigned long __unused3;
- unsigned long __unused4;
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm-tile/ptrace.h
-//----------------------------------------------------------------------
-
-struct vki_pt_regs {
-
- unsigned long regs[53];
- unsigned long tp;
- unsigned long sp;
- unsigned long lr;
- unsigned long pc;
- unsigned long ex1;
- unsigned long faultnum;
- unsigned long orig_r0;
- unsigned long flags;
- unsigned long pad[3];
-};
-
-#ifndef user_pt_regs
-#define user_pt_regs vki_pt_regs
-#endif
-
-// Tile has no fp registers. Just make gcc happy.
-struct tilegx_elf_fpregset {};
-typedef struct tilegx_elf_fpregset vki_elf_fpregset_t;
-
-#define vki_user_regs_struct vki_pt_regs
-
-#define TILEGX_r56 regs[56]
-#define TILEGX_r55 regs[55]
-#define TILEGX_r54 regs[54]
-#define TILEGX_r53 regs[53]
-#define TILEGX_r52 regs[52]
-#define TILEGX_r51 regs[51]
-#define TILEGX_r50 regs[50]
-#define TILEGX_r49 regs[49]
-#define TILEGX_r48 regs[48]
-#define TILEGX_r47 regs[47]
-#define TILEGX_r46 regs[46]
-#define TILEGX_r45 regs[45]
-#define TILEGX_r44 regs[44]
-#define TILEGX_r43 regs[43]
-#define TILEGX_r42 regs[42]
-#define TILEGX_r41 regs[41]
-#define TILEGX_r40 regs[40]
-#define TILEGX_r39 regs[39]
-#define TILEGX_r38 regs[38]
-#define TILEGX_r37 regs[37]
-#define TILEGX_r36 regs[36]
-#define TILEGX_r35 regs[35]
-#define TILEGX_r34 regs[34]
-#define TILEGX_r33 regs[33]
-#define TILEGX_r32 regs[32]
-#define TILEGX_r31 regs[31]
-#define TILEGX_r30 regs[30]
-#define TILEGX_r29 regs[29]
-#define TILEGX_r28 regs[28]
-#define TILEGX_r27 regs[27]
-#define TILEGX_r26 regs[26]
-#define TILEGX_r25 regs[25]
-#define TILEGX_r24 regs[24]
-#define TILEGX_r23 regs[23]
-#define TILEGX_r22 regs[22]
-#define TILEGX_r21 regs[21]
-#define TILEGX_r20 regs[20]
-#define TILEGX_r19 regs[19]
-#define TILEGX_r18 regs[18]
-#define TILEGX_r17 regs[17]
-#define TILEGX_r16 regs[16]
-#define TILEGX_r15 regs[15]
-#define TILEGX_r14 regs[14]
-#define TILEGX_r13 regs[13]
-#define TILEGX_r12 regs[12]
-#define TILEGX_r11 regs[11]
-#define TILEGX_r10 regs[10]
-#define TILEGX_r9 regs[9]
-#define TILEGX_r8 regs[8]
-#define TILEGX_r7 regs[7]
-#define TILEGX_r6 regs[6]
-#define TILEGX_r5 regs[5]
-#define TILEGX_r4 regs[4]
-#define TILEGX_r3 regs[3]
-#define TILEGX_r2 regs[2]
-#define TILEGX_r1 regs[1]
-#define TILEGX_r0 regs[0]
-
-#define TILEGX_lr TILEGX_r55
-#define TILEGX_sp TILEGX_r54
-#define TILEGX_tp TILEGX_r53
-#define TILEGX_pc TILEGX_r56
-
-#define VKI_PTRACE_GETREGS 12
-#define VKI_PTRACE_SETREGS 13
-#define VKI_PTRACE_GETFPREGS 14
-#define VKI_PTRACE_SETFPREGS 15
-
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm_generic/elf.h
-//----------------------------------------------------------------------
-
-typedef unsigned long vki_elf_greg_t;
-
-#define VKI_ELF_NGREG (sizeof (struct vki_user_regs_struct) / sizeof(vki_elf_greg_t))
-typedef vki_elf_greg_t vki_elf_gregset_t[VKI_ELF_NGREG];
-
-
-struct tilegx_dirent64 {
- long d_ino;
- long d_off;
- unsigned short d_reclen;
- unsigned char d_type;
- char d_name[256];
-};
-
-//----------------------------------------------------------------------
-// From tilegx linux/include/asm-generic/errno.h
-//----------------------------------------------------------------------
-
-#define VKI_ENOSYS 38 /* Function not implemented */
-#define VKI_EOVERFLOW 75 /* Value too large for defined data type */
-
-//----------------------------------------------------------------------
-// And that's it!
-//----------------------------------------------------------------------
-
-#endif // __VKI_TILEGX_LINUX_H
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
#define MC_SIZEOF_GUEST_STATE sizeof(VexGuestArchState)
__attribute__((unused))
-#if defined(VGA_tilegx)
-# include "libvex_guest_tilegx.h"
-# define MC_SIZEOF_GUEST_STATE sizeof(VexGuestTILEGXState)
-#endif
-
static inline Bool host_is_big_endian ( void ) {
UInt x = 0x11223344;
return 0x1122 == *(UShort*)(&x);
offset,szB);
tl_assert(0);
# undef GOF
-# undef SZB
-
- /* --------------------- tilegx --------------------- */
-# elif defined(VGA_tilegx)
-
-# define GOF(_fieldname) \
- (offsetof(VexGuestTILEGXState,guest_##_fieldname))
-# define SZB(_fieldname) \
- (sizeof(((VexGuestTILEGXState*)0)->guest_##_fieldname))
-
- Int o = offset;
- Int sz = szB;
- Bool is1248 = sz == 8 || sz == 4 || sz == 2 || sz == 1;
-
- tl_assert(sz > 0);
- tl_assert(host_is_little_endian());
-
- if (o >= GOF(r0) && is1248 && o <= (GOF(r63) + 8 - sz))
- return GOF(r0) + ((o-GOF(r0)) & -8) ;
-
- if (o == GOF(pc) && sz == 8) return o;
- if (o == GOF(EMNOTE) && sz == 8) return o;
- if (o == GOF(CMSTART) && sz == 8) return o;
- if (o == GOF(CMLEN) && sz == 8) return o;
- if (o == GOF(NRADDR) && sz == 8) return o;
- if (o == GOF(cmpexch) && sz == 8) return o;
- if (o == GOF(zero) && sz == 8) return o;
-
- VG_(printf)("MC_(get_otrack_shadow_offset)(tilegx)(off=%d,sz=%d)\n",
- offset,szB);
- tl_assert(0);
-# undef GOF
# undef SZB
# else
VG_(printf)("\n");
tl_assert(0);
- /* --------------------- tilegx --------------------- */
-# elif defined(VGA_tilegx)
- VG_(printf)("get_reg_array_equiv_int_type(tilegx): unhandled: ");
- ppIRRegArray(arr);
- VG_(printf)("\n");
- tl_assert(0);
-
# else
# error "FIXME: not implemented for this architecture"
# endif
origin5-bz2.stderr.exp-glibc212-s390x \
origin5-bz2.stderr.exp-glibc234-s390x \
origin5-bz2.stderr.exp-glibc218-mips32 \
- origin5-bz2.stderr.exp-glibc212-tilegx \
origin6-fp.vgtest origin6-fp.stdout.exp \
origin6-fp.stderr.exp-glibc25-amd64 \
origin6-fp.stderr.exp-glibc27-ppc64 \
- origin6-fp.stderr.exp-glibc212-tilegx \
overlap.stderr.exp overlap.stdout.exp overlap.vgtest \
partiallydefinedeq.vgtest partiallydefinedeq.stderr.exp \
partiallydefinedeq.stderr.exp4 \
);
} while (block[2] != 1);
#endif
-#elif defined(VGA_tilegx)
- int i;
- unsigned int *p4 = (unsigned int *)(((unsigned long long)p + 3) & (~3ULL));
- unsigned int mask = (0xff) << ((int)p & 3);
- unsigned int add = (n & 0xff) << ((int)p & 3);
- unsigned int x, new;
-
- while(1) {
- x = *p4;
- new = (x & (~mask)) | ((x + add) & mask);
- __insn_mtspr(0x2780, x);
- if ( __insn_cmpexch4(p4, new) == x)
- break;
- }
#else
# error "Unsupported arch"
#endif
);
} while (block[2] != 1);
#endif
-#elif defined(VGA_tilegx)
- int i;
- unsigned int *p4 = (unsigned int *)(((unsigned long long)p + 3) & (~3ULL));
- unsigned int mask = (0xffff) << ((int)p & 3);
- unsigned int add = (n & 0xffff) << ((int)p & 3);
- unsigned int x, new;
-
- while(1) {
- x = *p4;
- new = (x & (~mask)) | ((x + add) & mask);
- __insn_mtspr(0x2780, x);
- if ( __insn_cmpexch4(p4, new) == x)
- break;
- }
#else
# error "Unsupported arch"
#endif
: /*trash*/ "memory", "t0", "t1", "t2", "t3"
);
} while (block[2] != 1);
-#elif defined(VGA_tilegx)
- __insn_fetchadd4(p, n);
#else
# error "Unsupported arch"
#endif
: /*trash*/ "memory", "t0", "t1", "t2", "t3"
);
} while (block[2] != 1);
-#elif defined(VGA_tilegx)
- __insn_fetchadd(p, n);
#else
# error "Unsupported arch"
#endif
: "v0", "v1", "a0", "a1", "a2", "a3", "$8", "$9");
return out;
}
-#elif defined(VGP_tilegx_linux)
-extern UWord do_syscall_WRK (
- UWord syscall_no,
- UWord a1, UWord a2, UWord a3,
- UWord a4, UWord a5, UWord a6
- )
-{
- UWord out;
- __asm__ __volatile__ (
- "move r10, %1\n\t"
- "move r0, %2\n\t"
- "move r1, %3\n\t"
- "move r2, %4\n\t"
- "move r3, %5\n\t"
- "move r4, %6\n\t"
- "move r5, %7\n\t"
- "swint1 \n\t"
- "move %0, r0\n\t"
- : /*out*/ "=r" (out)
- : "r"(syscall_no), "r"(a1), "r"(a2), "r"(a3),
- "r"(a4), "r"(a5), "r"(a6)
- : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r10");
- return out;
-}
#elif defined(VGP_x86_solaris)
extern ULong
expecting a leak
1,000 bytes in 1 blocks are definitely lost in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: f (leak-segv-jmp.c:295)
- by 0x........: main (leak-segv-jmp.c:370)
+ by 0x........: f (leak-segv-jmp.c:271)
+ by 0x........: main (leak-segv-jmp.c:346)
LEAK SUMMARY:
definitely lost: 1,000 bytes in 1 blocks
expecting a leak again
1,000 bytes in 1 blocks are definitely lost in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: f (leak-segv-jmp.c:295)
- by 0x........: main (leak-segv-jmp.c:370)
+ by 0x........: f (leak-segv-jmp.c:271)
+ by 0x........: main (leak-segv-jmp.c:346)
LEAK SUMMARY:
definitely lost: 1,000 bytes in 1 blocks
expecting a leak again after full mprotect
1,000 bytes in 1 blocks are definitely lost in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: f (leak-segv-jmp.c:295)
- by 0x........: main (leak-segv-jmp.c:370)
+ by 0x........: f (leak-segv-jmp.c:271)
+ by 0x........: main (leak-segv-jmp.c:346)
LEAK SUMMARY:
definitely lost: 1,000 bytes in 1 blocks
expecting heuristic not to crash after full mprotect
1,000 bytes in 1 blocks are definitely lost in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: f (leak-segv-jmp.c:295)
- by 0x........: main (leak-segv-jmp.c:370)
+ by 0x........: f (leak-segv-jmp.c:271)
+ by 0x........: main (leak-segv-jmp.c:346)
200,000 bytes in 1 blocks are possibly lost in loss record ... of ...
at 0x........: calloc (vg_replace_malloc.c:...)
- by 0x........: f (leak-segv-jmp.c:342)
- by 0x........: main (leak-segv-jmp.c:370)
+ by 0x........: f (leak-segv-jmp.c:318)
+ by 0x........: main (leak-segv-jmp.c:346)
LEAK SUMMARY:
definitely lost: 1,000 bytes in 1 blocks
+++ /dev/null
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (origin5-bz2.c:6481)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
- by 0x........: handle_compress (origin5-bz2.c:4750)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
- at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
- by 0x........: handle_compress (origin5-bz2.c:4750)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
+++ /dev/null
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __float_estimateDiv128To64 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __float_estimateDiv128To64 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __float_estimateDiv128To64 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __float_estimateDiv128To64 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __divdf3 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: do3x3smooth (origin6-fp.c:47)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Conditional jump or move depends on uninitialised value(s)
- at 0x........: __float_roundAndPackFloat64 (in /u/zliu/WS1/valgrind/valgrind-latest/memcheck/tests/origin6-fp)
- by 0x........: main (origin6-fp.c:89)
- Uninitialised value was created by a client request
- at 0x........: setup_arr (origin6-fp.c:75)
- by 0x........: main (origin6-fp.c:87)
-
-Test succeeded.
That is not necessary but helpful when supporting a new architecture.
*/
static irop_t irops[] = {
- { DEFOP(Iop_Add8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Add16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Add32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Add64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
- { DEFOP(Iop_Sub8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Sub16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Sub32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Sub64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_Mul8, UNDEF_LEFT), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_Mul16, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_Mul32, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Mul64, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // ppc32, mips assert
- { DEFOP(Iop_Or8, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Or16, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Or32, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Or64, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
- { DEFOP(Iop_And8, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_And16, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_And32, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_And64, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Xor8, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Xor16, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Xor32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Xor64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Shl8, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_Shl16, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_Shl32, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Shl64, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32 asserts
- { DEFOP(Iop_Shr8, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32/64 assert
- { DEFOP(Iop_Shr16, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32/64 assert
- { DEFOP(Iop_Shr32, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Shr64, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32 asserts
- { DEFOP(Iop_Sar8, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32/64 assert
- { DEFOP(Iop_Sar16, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32/64 assert
- { DEFOP(Iop_Sar32, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Sar64, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32 asserts
- { DEFOP(Iop_CmpEQ8, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CmpEQ16, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_CmpEQ32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_CmpEQ64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_CmpNE8, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CmpNE16, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CmpNE32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_CmpNE64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_Not8, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Not16, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Not32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_Not64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 1 },
- { DEFOP(Iop_CasCmpEQ8, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CasCmpEQ16, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CasCmpEQ32, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CasCmpEQ64, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
+ { DEFOP(Iop_Add8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Add16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Add32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Add64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_Sub8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Sub16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Sub32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Sub64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_Mul8, UNDEF_LEFT), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_Mul16, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_Mul32, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Mul64, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_Or8, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Or16, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Or32, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Or64, UNDEF_OR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_And8, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_And16, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_And32, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_And64, UNDEF_AND), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Xor8, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Xor16, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Xor32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Xor64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Shl8, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_Shl16, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_Shl32, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Shl64, UNDEF_SHL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32 asserts
+ { DEFOP(Iop_Shr8, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32/64 assert
+ { DEFOP(Iop_Shr16, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32/64 assert
+ { DEFOP(Iop_Shr32, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Shr64, UNDEF_SHR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32 asserts
+ { DEFOP(Iop_Sar8, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32/64 assert
+ { DEFOP(Iop_Sar16, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32/64 assert
+ { DEFOP(Iop_Sar32, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Sar64, UNDEF_SAR), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32 asserts
+ { DEFOP(Iop_CmpEQ8, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CmpEQ16, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_CmpEQ32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_CmpEQ64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_CmpNE8, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CmpNE16, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CmpNE32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_CmpNE64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_Not8, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Not16, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Not32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_Not64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpEQ8, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpEQ16, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpEQ32, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpEQ64, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
- { DEFOP(Iop_CasCmpNE8, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CasCmpNE16, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CasCmpNE32, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CasCmpNE64, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
+ { DEFOP(Iop_CasCmpNE8, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpNE16, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpNE32, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CasCmpNE64, UNDEF_NONE), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
{ DEFOP(Iop_ExpCmpNE8, UNDEF_UNKNOWN), }, // exact (expensive) equality
{ DEFOP(Iop_ExpCmpNE16, UNDEF_UNKNOWN), }, // exact (expensive) equality
{ DEFOP(Iop_ExpCmpNE32, UNDEF_UNKNOWN), }, // exact (expensive) equality
{ DEFOP(Iop_ExpCmpNE64, UNDEF_UNKNOWN), }, // exact (expensive) equality
- { DEFOP(Iop_MullS8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MullS16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MullS32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
+ { DEFOP(Iop_MullS8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MullS16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MullS32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
// s390 has signed multiplication of 64-bit values but the result
// is 64-bit (not 128-bit). So we cannot test this op standalone.
- { DEFOP(Iop_MullS64, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1, .tilegx = 0 }, // ppc32, mips assert
- { DEFOP(Iop_MullU8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MullU16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MullU32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =0, .mips64 = 1, .tilegx = 1 }, // mips asserts
- { DEFOP(Iop_MullU64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1, .tilegx = 0 }, // ppc32, mips assert
- { DEFOP(Iop_Clz64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1, .tilegx = 1 }, // ppc32 asserts
- { DEFOP(Iop_Clz32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_Ctz64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0, .tilegx = 1 },
- { DEFOP(Iop_Ctz32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CmpLT32S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_CmpLT64S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 1, .tilegx = 1 }, // ppc, mips assert
- { DEFOP(Iop_CmpLE32S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_CmpLE64S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 1, .tilegx = 1 }, // ppc, mips assert
- { DEFOP(Iop_CmpLT32U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_CmpLT64U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1, .tilegx = 1}, // ppc32, mips assert
- { DEFOP(Iop_CmpLE32U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_CmpLE64U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 0, .tilegx = 0 }, // ppc32 asserts
+ { DEFOP(Iop_MullS64, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_MullU8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0 },
+ { DEFOP(Iop_MullU16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0 },
+ { DEFOP(Iop_MullU32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_MullU64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_Clz64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1 }, // ppc32 asserts
+ { DEFOP(Iop_Clz32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1 },
+ { DEFOP(Iop_Ctz64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0 },
+ { DEFOP(Iop_Ctz32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 0 },
+ { DEFOP(Iop_CmpLT32S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1 },
+ { DEFOP(Iop_CmpLT64S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 1 }, // ppc, mips assert
+ { DEFOP(Iop_CmpLE32S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1 },
+ { DEFOP(Iop_CmpLE64S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 =0, .mips64 = 1 }, // ppc, mips assert
+ { DEFOP(Iop_CmpLT32U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1 },
+ { DEFOP(Iop_CmpLT64U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 1}, // ppc32, mips assert
+ { DEFOP(Iop_CmpLE32U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 =1, .mips64 = 1 },
+ { DEFOP(Iop_CmpLE64U, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 =0, .mips64 = 0 }, // ppc32 asserts
{ DEFOP(Iop_CmpNEZ8, UNDEF_ALL), }, // not supported by mc_translate
{ DEFOP(Iop_CmpNEZ16, UNDEF_ALL), }, // not supported by mc_translate
{ DEFOP(Iop_CmpNEZ32, UNDEF_ALL), }, // not supported by mc_translate
{ DEFOP(Iop_CmpNEZ64, UNDEF_ALL), }, // not supported by mc_translate
- { DEFOP(Iop_CmpwNEZ32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_CmpwNEZ64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
+ { DEFOP(Iop_CmpwNEZ32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_CmpwNEZ64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
{ DEFOP(Iop_Left8, UNDEF_UNKNOWN), }, // not supported by mc_translate
{ DEFOP(Iop_Left16, UNDEF_UNKNOWN), }, // not supported by mc_translate
{ DEFOP(Iop_Left32, UNDEF_UNKNOWN), }, // not supported by mc_translate
{ DEFOP(Iop_Left64, UNDEF_UNKNOWN), }, // not supported by mc_translate
{ DEFOP(Iop_Max32U, UNDEF_UNKNOWN), }, // not supported by mc_translate
- { DEFOP(Iop_CmpORD32U, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // support added in vbit-test
- { DEFOP(Iop_CmpORD64U, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // support added in vbit-test
- { DEFOP(Iop_CmpORD32S, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // support added in vbit-test
- { DEFOP(Iop_CmpORD64S, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // support added in vbit-test
- { DEFOP(Iop_DivU32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_DivS32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_DivU64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32 asserts
- { DEFOP(Iop_DivS64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32 asserts
- { DEFOP(Iop_DivU64E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32 asserts
- { DEFOP(Iop_DivS64E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // ppc32 asserts
- { DEFOP(Iop_DivU32E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_DivS32E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
+ { DEFOP(Iop_CmpORD32U, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 }, // support added in vbit-test
+ { DEFOP(Iop_CmpORD64U, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // support added in vbit-test
+ { DEFOP(Iop_CmpORD32S, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 }, // support added in vbit-test
+ { DEFOP(Iop_CmpORD64S, UNDEF_ORD), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // support added in vbit-test
+ { DEFOP(Iop_DivU32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_DivS32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_DivU64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32 asserts
+ { DEFOP(Iop_DivS64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32 asserts
+ { DEFOP(Iop_DivU64E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32 asserts
+ { DEFOP(Iop_DivS64E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // ppc32 asserts
+ { DEFOP(Iop_DivU32E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_DivS32E, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
// On s390 the DivMod operations always appear in a certain context
// So they cannot be tested in isolation on that platform.
- { DEFOP(Iop_DivModU64to32, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_DivModS64to32, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_DivModU128to64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_DivModS128to64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_DivModS64to64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_8Uto16, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_8Uto32, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_8Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32 assert
- { DEFOP(Iop_16Uto32, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_16Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32 assert
- { DEFOP(Iop_32Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
- { DEFOP(Iop_8Sto16, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_8Sto32, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_8Sto64, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_16Sto32, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_16Sto64, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_32Sto64, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
- { DEFOP(Iop_64to8, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_32to8, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_64to16, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_16to8, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_16HIto8, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_8HLto16, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 }, // ppc isel
- { DEFOP(Iop_32to16, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_32HIto16, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_16HLto32, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 }, // ppc isel
- { DEFOP(Iop_64to32, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_64HIto32, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_32HLto64, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // mips asserts
- { DEFOP(Iop_128to64, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_128HIto64, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_64HLto128, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_Not1, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_32to1, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_64to1, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32, mips assert
- { DEFOP(Iop_1Uto8, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_1Uto32, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_1Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 1 }, // ppc32 assert
- { DEFOP(Iop_1Sto8, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
+ { DEFOP(Iop_DivModU64to32, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_DivModS64to32, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_DivModU128to64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_DivModS128to64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_DivModS64to64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // mips asserts
+ { DEFOP(Iop_8Uto16, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_8Uto32, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_8Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32 assert
+ { DEFOP(Iop_16Uto32, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_16Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32 assert
+ { DEFOP(Iop_32Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_8Sto16, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_8Sto32, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_8Sto64, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_16Sto32, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_16Sto64, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_32Sto64, UNDEF_SEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_64to8, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_32to8, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_64to16, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_16to8, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_16HIto8, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_8HLto16, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 }, // ppc isel
+ { DEFOP(Iop_32to16, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_32HIto16, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_16HLto32, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 }, // ppc isel
+ { DEFOP(Iop_64to32, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_64HIto32, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_32HLto64, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_128to64, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_128HIto64, UNDEF_UPPER), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_64HLto128, UNDEF_CONCAT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_Not1, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_32to1, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_64to1, UNDEF_TRUNC), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
+ { DEFOP(Iop_1Uto8, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_1Uto32, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_1Uto64, UNDEF_ZEXT), .s390x = 1, .amd64 = 1, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32 assert
+ { DEFOP(Iop_1Sto8, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
{ DEFOP(Iop_1Sto16, UNDEF_ALL), }, // not handled by mc_translate
- { DEFOP(Iop_1Sto32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_1Sto64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 1 },
- { DEFOP(Iop_AddF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_SubF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_MulF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_DivF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_AddF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_SubF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_MulF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_DivF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_AddF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_SubF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MulF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_DivF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_NegF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_AbsF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_NegF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_AbsF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_SqrtF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_SqrtF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_CmpF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_CmpF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_CmpF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F64toI16S, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F64toI32S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_F64toI64S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F64toI64U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F64toI32U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I32StoF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_I64StoF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_I64UtoF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_I64UtoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I32UtoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I32UtoF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F32toI32S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F32toI64S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_F32toI32U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F32toI64U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I32StoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_I64StoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_F32toF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_F64toF32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_ReinterpF64asI64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_ReinterpI64asF64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_ReinterpF32asI32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
+ { DEFOP(Iop_1Sto32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_1Sto64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_AddF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_SubF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_MulF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_DivF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_AddF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_SubF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_MulF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_DivF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_AddF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_SubF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MulF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_DivF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_NegF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_AbsF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_NegF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_AbsF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_SqrtF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_SqrtF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_CmpF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_CmpF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }, // mips asserts
+ { DEFOP(Iop_CmpF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F64toI16S, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F64toI32S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_F64toI64S, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F64toI64U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F64toI32U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I32StoF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_I64StoF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_I64UtoF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 }, // mips asserts
+ { DEFOP(Iop_I64UtoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I32UtoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I32UtoF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F32toI32S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F32toI64S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_F32toI32U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F32toI64U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I32StoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_I64StoF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_F32toF64, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_F64toF32, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_ReinterpF64asI64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_ReinterpI64asF64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_ReinterpF32asI32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
// ppc requires this op to show up in a specific context. So it cannot be
// tested standalone on that platform.
- { DEFOP(Iop_ReinterpI32asF32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_F64HLtoF128, UNDEF_CONCAT), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128HItoF64, UNDEF_UPPER), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128LOtoF64, UNDEF_TRUNC), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_AddF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_SubF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MulF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_DivF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MAddF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MSubF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_NegMAddF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_NegMSubF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_NegF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_AbsF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_SqrtF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I32StoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I64StoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I32UtoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_I64UtoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F32toF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F64toF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toI32S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toI64S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toI32U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toI64U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toI128S, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_F128toF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_RndF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_TruncF128toI32S,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_TruncF128toI32U,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_TruncF128toI64U,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_TruncF128toI64S,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_AtanF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_Yl2xF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_Yl2xp1F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_PRemF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_PRemC3210F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_PRem1F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_PRem1C3210F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_ScaleF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_SinF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_CosF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_TanF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_2xm1F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_RoundF128toInt, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_RoundF64toInt, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_RoundF32toInt, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_MAddF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_MSubF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_MAddF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_MSubF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_MAddF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_MSubF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_RSqrtEst5GoodF64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
- { DEFOP(Iop_RoundF64toF64_NEAREST, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_RoundF64toF64_NegINF, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_RoundF64toF64_PosINF, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_RoundF64toF64_ZERO, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 },
- { DEFOP(Iop_TruncF64asF32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1, .tilegx = 0 }, // mips asserts
- { DEFOP(Iop_RoundF64toF32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0, .tilegx = 0 },
+ { DEFOP(Iop_ReinterpI32asF32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_F64HLtoF128, UNDEF_CONCAT), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128HItoF64, UNDEF_UPPER), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128LOtoF64, UNDEF_TRUNC), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_AddF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_SubF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MulF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_DivF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MAddF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MSubF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_NegMAddF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_NegMSubF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_NegF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_AbsF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_SqrtF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I32StoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I64StoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I32UtoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_I64UtoF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F32toF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F64toF128, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toI32S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toI64S, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toI32U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toI64U, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toI128S, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_F128toF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_RndF128, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_TruncF128toI32S,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_TruncF128toI32U,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_TruncF128toI64U,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_TruncF128toI64S,UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_AtanF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_Yl2xF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_Yl2xp1F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_PRemF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_PRemC3210F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_PRem1F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_PRem1C3210F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_ScaleF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_SinF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_CosF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_TanF64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_2xm1F64, UNDEF_ALL), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_RoundF128toInt, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_RoundF64toInt, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_RoundF32toInt, UNDEF_ALL), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
+ { DEFOP(Iop_MAddF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_MSubF32, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_MAddF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_MSubF64, UNDEF_ALL), .s390x = 1, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_MAddF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_MSubF64r32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_RSqrtEst5GoodF64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
+ { DEFOP(Iop_RoundF64toF64_NEAREST, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_RoundF64toF64_NegINF, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_RoundF64toF64_PosINF, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_RoundF64toF64_ZERO, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 },
+ { DEFOP(Iop_TruncF64asF32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
+ { DEFOP(Iop_RoundF64toF32, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 0 },
{ DEFOP(Iop_RecpExpF64, UNDEF_UNKNOWN), },
{ DEFOP(Iop_RecpExpF32, UNDEF_UNKNOWN), },
#endif
#ifdef __i386__
return p->x86 ? p : NULL;
-#endif
-#ifdef __tilegx__
- return p->tilegx ? p : NULL;
#endif
return NULL;
}
unsigned x86 : 1;
unsigned mips32 : 1;
unsigned mips64 : 1;
- unsigned tilegx : 1;
} irop_t;
if VGCONF_ARCHS_INCLUDE_MIPS64
SUBDIRS += mips64
endif
-if VGCONF_ARCHS_INCLUDE_TILEGX
-SUBDIRS += tilegx
-endif
# OS-specific tests
if VGCONF_OS_IS_LINUX
SUBDIRS += x86-solaris
endif
-DIST_SUBDIRS = x86 amd64 ppc32 ppc64 arm arm64 s390x mips32 mips64 tilegx \
+DIST_SUBDIRS = x86 amd64 ppc32 ppc64 arm arm64 s390x mips32 mips64 \
linux darwin solaris amd64-linux x86-linux amd64-darwin \
x86-darwin amd64-solaris x86-solaris scripts .
pair s390x_unexisting_in_32bits s390x
pair arm arm64
pair mips32 mips64
-pair tilegx_unexisting_32bits tilegx
exit 0
-prereq: ! ../../tests/arch_test tilegx
prog: bug234814
*ga = VexArchMIPS32;
#elif defined(VGA_mips64)
*ga = VexArchMIPS64;
-#elif defined(VGA_tilegx)
- *ga = VexArchTILEGX;
#else
missing arch;
#endif
else
return VexEndnessBE;
}
- case VexArchTILEGX: return VexEndnessLE;
default: failure_exit();
}
}
case VexArchS390X: return VEX_HWCAPS_S390X_LDISP;
case VexArchMIPS32: return VEX_PRID_COMP_MIPS;
case VexArchMIPS64: return VEX_PRID_COMP_MIPS;
- case VexArchTILEGX: return 0;
default: failure_exit();
}
}
case VexArchS390X: return True;
case VexArchMIPS32: return False;
case VexArchMIPS64: return True;
- case VexArchTILEGX: return True;
default: failure_exit();
}
}
// explicitly via command line arguments.
if (multiarch) {
VexArch va;
- for (va = VexArchX86; va <= VexArchTILEGX; va++) {
+ for (va = VexArchX86; va <= VexArchMIPS64; va++) {
vta.arch_host = va;
vta.archinfo_host.endness = arch_endness (vta.arch_host);
vta.archinfo_host.hwcaps = arch_hwcaps (vta.arch_host);
+++ /dev/null
-
-include $(top_srcdir)/Makefile.tool-tests.am
-
-dist_noinst_SCRIPTS = \
- filter_stderr
-
-EXTRA_DIST = gen_test.sh
-
-if VGCONF_ARCHS_INCLUDE_TILEGX
-EXTRA_DIST += \
- insn_test_move_X0.stdout.exp insn_test_move_X0.stderr.exp \
- insn_test_move_X0.vgtest \
- insn_test_move_X1.stdout.exp insn_test_move_X1.stderr.exp \
- insn_test_move_X1.vgtest \
- insn_test_move_Y0.stdout.exp insn_test_move_Y0.stderr.exp \
- insn_test_move_Y0.vgtest \
- insn_test_move_Y1.stdout.exp insn_test_move_Y1.stderr.exp \
- insn_test_move_Y1.vgtest \
- insn_test_movei_X0.stdout.exp insn_test_movei_X0.stderr.exp \
- insn_test_movei_X0.vgtest \
- insn_test_movei_X1.stdout.exp insn_test_movei_X1.stderr.exp \
- insn_test_movei_X1.vgtest \
- insn_test_movei_Y0.stdout.exp insn_test_movei_Y0.stderr.exp \
- insn_test_movei_Y0.vgtest \
- insn_test_movei_Y1.stdout.exp insn_test_movei_Y1.stderr.exp \
- insn_test_movei_Y1.vgtest \
- insn_test_moveli_X0.stdout.exp insn_test_moveli_X0.stderr.exp \
- insn_test_moveli_X0.vgtest \
- insn_test_moveli_X1.stdout.exp insn_test_moveli_X1.stderr.exp \
- insn_test_moveli_X1.vgtest \
- insn_test_prefetch_X1.stdout.exp insn_test_prefetch_X1.stderr.exp \
- insn_test_prefetch_X1.vgtest \
- insn_test_prefetch_Y2.stdout.exp insn_test_prefetch_Y2.stderr.exp \
- insn_test_prefetch_Y2.vgtest \
- insn_test_prefetch_l1_X1.stdout.exp \
- insn_test_prefetch_l1_X1.stderr.exp \
- insn_test_prefetch_l1_X1.vgtest \
- insn_test_prefetch_l1_Y2.stdout.exp \
- insn_test_prefetch_l1_Y2.stderr.exp \
- insn_test_prefetch_l1_Y2.vgtest \
- insn_test_prefetch_l2_X1.stdout.exp \
- insn_test_prefetch_l2_X1.stderr.exp \
- insn_test_prefetch_l2_X1.vgtest \
- insn_test_prefetch_l2_Y2.stdout.exp \
- insn_test_prefetch_l2_Y2.stderr.exp \
- insn_test_prefetch_l2_Y2.vgtest \
- insn_test_prefetch_l3_X1.stdout.exp \
- insn_test_prefetch_l3_X1.stderr.exp \
- insn_test_prefetch_l3_X1.vgtest \
- insn_test_prefetch_l3_Y2.stdout.exp \
- insn_test_prefetch_l3_Y2.stderr.exp \
- insn_test_prefetch_l3_Y2.vgtest \
- insn_test_add_X0.stdout.exp insn_test_add_X0.stderr.exp \
- insn_test_add_X0.vgtest \
- insn_test_add_X1.stdout.exp insn_test_add_X1.stderr.exp \
- insn_test_add_X1.vgtest \
- insn_test_add_Y0.stdout.exp insn_test_add_Y0.stderr.exp \
- insn_test_add_Y0.vgtest \
- insn_test_add_Y1.stdout.exp insn_test_add_Y1.stderr.exp \
- insn_test_add_Y1.vgtest \
- insn_test_addi_X0.stdout.exp insn_test_addi_X0.stderr.exp \
- insn_test_addi_X0.vgtest \
- insn_test_addi_X1.stdout.exp insn_test_addi_X1.stderr.exp \
- insn_test_addi_X1.vgtest \
- insn_test_addi_Y0.stdout.exp insn_test_addi_Y0.stderr.exp \
- insn_test_addi_Y0.vgtest \
- insn_test_addi_Y1.stdout.exp insn_test_addi_Y1.stderr.exp \
- insn_test_addi_Y1.vgtest \
- insn_test_addli_X0.stdout.exp insn_test_addli_X0.stderr.exp \
- insn_test_addli_X0.vgtest \
- insn_test_addli_X1.stdout.exp insn_test_addli_X1.stderr.exp \
- insn_test_addli_X1.vgtest \
- insn_test_addx_X0.stdout.exp insn_test_addx_X0.stderr.exp \
- insn_test_addx_X0.vgtest \
- insn_test_addx_X1.stdout.exp insn_test_addx_X1.stderr.exp \
- insn_test_addx_X1.vgtest \
- insn_test_addx_Y0.stdout.exp insn_test_addx_Y0.stderr.exp \
- insn_test_addx_Y0.vgtest \
- insn_test_addx_Y1.stdout.exp insn_test_addx_Y1.stderr.exp \
- insn_test_addx_Y1.vgtest \
- insn_test_addxi_X0.stdout.exp insn_test_addxi_X0.stderr.exp \
- insn_test_addxi_X0.vgtest \
- insn_test_addxi_X1.stdout.exp insn_test_addxi_X1.stderr.exp \
- insn_test_addxi_X1.vgtest \
- insn_test_addxi_Y0.stdout.exp insn_test_addxi_Y0.stderr.exp \
- insn_test_addxi_Y0.vgtest \
- insn_test_addxi_Y1.stdout.exp insn_test_addxi_Y1.stderr.exp \
- insn_test_addxi_Y1.vgtest \
- insn_test_addxli_X0.stdout.exp insn_test_addxli_X0.stderr.exp \
- insn_test_addxli_X0.vgtest \
- insn_test_addxli_X1.stdout.exp insn_test_addxli_X1.stderr.exp \
- insn_test_addxli_X1.vgtest \
- insn_test_addxsc_X0.stdout.exp insn_test_addxsc_X0.stderr.exp \
- insn_test_addxsc_X0.vgtest \
- insn_test_addxsc_X1.stdout.exp insn_test_addxsc_X1.stderr.exp \
- insn_test_addxsc_X1.vgtest \
- insn_test_and_X0.stdout.exp insn_test_and_X0.stderr.exp \
- insn_test_and_X0.vgtest \
- insn_test_and_X1.stdout.exp insn_test_and_X1.stderr.exp \
- insn_test_and_X1.vgtest \
- insn_test_and_Y0.stdout.exp insn_test_and_Y0.stderr.exp \
- insn_test_and_Y0.vgtest \
- insn_test_and_Y1.stdout.exp insn_test_and_Y1.stderr.exp \
- insn_test_and_Y1.vgtest \
- insn_test_andi_X0.stdout.exp insn_test_andi_X0.stderr.exp \
- insn_test_andi_X0.vgtest \
- insn_test_andi_X1.stdout.exp insn_test_andi_X1.stderr.exp \
- insn_test_andi_X1.vgtest \
- insn_test_andi_Y0.stdout.exp insn_test_andi_Y0.stderr.exp \
- insn_test_andi_Y0.vgtest \
- insn_test_andi_Y1.stdout.exp insn_test_andi_Y1.stderr.exp \
- insn_test_andi_Y1.vgtest \
- insn_test_beqz_X1.stdout.exp insn_test_beqz_X1.stderr.exp \
- insn_test_beqz_X1.vgtest \
- insn_test_beqzt_X1.stdout.exp insn_test_beqzt_X1.stderr.exp \
- insn_test_beqzt_X1.vgtest \
- insn_test_bfexts_X0.stdout.exp insn_test_bfexts_X0.stderr.exp \
- insn_test_bfexts_X0.vgtest \
- insn_test_bfextu_X0.stdout.exp insn_test_bfextu_X0.stderr.exp \
- insn_test_bfextu_X0.vgtest \
- insn_test_bfins_X0.stdout.exp insn_test_bfins_X0.stderr.exp \
- insn_test_bfins_X0.vgtest \
- insn_test_bgez_X1.stdout.exp insn_test_bgez_X1.stderr.exp \
- insn_test_bgez_X1.vgtest \
- insn_test_bgezt_X1.stdout.exp insn_test_bgezt_X1.stderr.exp \
- insn_test_bgezt_X1.vgtest \
- insn_test_bgtz_X1.stdout.exp insn_test_bgtz_X1.stderr.exp \
- insn_test_bgtz_X1.vgtest \
- insn_test_bgtzt_X1.stdout.exp insn_test_bgtzt_X1.stderr.exp \
- insn_test_bgtzt_X1.vgtest \
- insn_test_blbc_X1.stdout.exp insn_test_blbc_X1.stderr.exp \
- insn_test_blbc_X1.vgtest \
- insn_test_blbct_X1.stdout.exp insn_test_blbct_X1.stderr.exp \
- insn_test_blbct_X1.vgtest \
- insn_test_blbs_X1.stdout.exp insn_test_blbs_X1.stderr.exp \
- insn_test_blbs_X1.vgtest \
- insn_test_blbst_X1.stdout.exp insn_test_blbst_X1.stderr.exp \
- insn_test_blbst_X1.vgtest \
- insn_test_blez_X1.stdout.exp insn_test_blez_X1.stderr.exp \
- insn_test_blez_X1.vgtest \
- insn_test_blezt_X1.stdout.exp insn_test_blezt_X1.stderr.exp \
- insn_test_blezt_X1.vgtest \
- insn_test_bltz_X1.stdout.exp insn_test_bltz_X1.stderr.exp \
- insn_test_bltz_X1.vgtest \
- insn_test_bltzt_X1.stdout.exp insn_test_bltzt_X1.stderr.exp \
- insn_test_bltzt_X1.vgtest \
- insn_test_bnez_X1.stdout.exp insn_test_bnez_X1.stderr.exp \
- insn_test_bnez_X1.vgtest \
- insn_test_bnezt_X1.stdout.exp insn_test_bnezt_X1.stderr.exp \
- insn_test_bnezt_X1.vgtest \
- insn_test_clz_X0.stdout.exp insn_test_clz_X0.stderr.exp \
- insn_test_clz_X0.vgtest \
- insn_test_clz_Y0.stdout.exp insn_test_clz_Y0.stderr.exp \
- insn_test_clz_Y0.vgtest \
- insn_test_cmoveqz_X0.stdout.exp insn_test_cmoveqz_X0.stderr.exp \
- insn_test_cmoveqz_X0.vgtest \
- insn_test_cmoveqz_Y0.stdout.exp insn_test_cmoveqz_Y0.stderr.exp \
- insn_test_cmoveqz_Y0.vgtest \
- insn_test_cmovnez_X0.stdout.exp insn_test_cmovnez_X0.stderr.exp \
- insn_test_cmovnez_X0.vgtest \
- insn_test_cmovnez_Y0.stdout.exp insn_test_cmovnez_Y0.stderr.exp \
- insn_test_cmovnez_Y0.vgtest \
- insn_test_cmpeq_X0.stdout.exp insn_test_cmpeq_X0.stderr.exp \
- insn_test_cmpeq_X0.vgtest \
- insn_test_cmpeq_X1.stdout.exp insn_test_cmpeq_X1.stderr.exp \
- insn_test_cmpeq_X1.vgtest \
- insn_test_cmpeq_Y0.stdout.exp insn_test_cmpeq_Y0.stderr.exp \
- insn_test_cmpeq_Y0.vgtest \
- insn_test_cmpeq_Y1.stdout.exp insn_test_cmpeq_Y1.stderr.exp \
- insn_test_cmpeq_Y1.vgtest \
- insn_test_cmpeqi_X0.stdout.exp insn_test_cmpeqi_X0.stderr.exp \
- insn_test_cmpeqi_X0.vgtest \
- insn_test_cmpeqi_X1.stdout.exp insn_test_cmpeqi_X1.stderr.exp \
- insn_test_cmpeqi_X1.vgtest \
- insn_test_cmpeqi_Y0.stdout.exp insn_test_cmpeqi_Y0.stderr.exp \
- insn_test_cmpeqi_Y0.vgtest \
- insn_test_cmpeqi_Y1.stdout.exp insn_test_cmpeqi_Y1.stderr.exp \
- insn_test_cmpeqi_Y1.vgtest \
- insn_test_cmples_X0.stdout.exp insn_test_cmples_X0.stderr.exp \
- insn_test_cmples_X0.vgtest \
- insn_test_cmples_X1.stdout.exp insn_test_cmples_X1.stderr.exp \
- insn_test_cmples_X1.vgtest \
- insn_test_cmples_Y0.stdout.exp insn_test_cmples_Y0.stderr.exp \
- insn_test_cmples_Y0.vgtest \
- insn_test_cmples_Y1.stdout.exp insn_test_cmples_Y1.stderr.exp \
- insn_test_cmples_Y1.vgtest \
- insn_test_cmpleu_X0.stdout.exp insn_test_cmpleu_X0.stderr.exp \
- insn_test_cmpleu_X0.vgtest \
- insn_test_cmpleu_X1.stdout.exp insn_test_cmpleu_X1.stderr.exp \
- insn_test_cmpleu_X1.vgtest \
- insn_test_cmpleu_Y0.stdout.exp insn_test_cmpleu_Y0.stderr.exp \
- insn_test_cmpleu_Y0.vgtest \
- insn_test_cmpleu_Y1.stdout.exp insn_test_cmpleu_Y1.stderr.exp \
- insn_test_cmpleu_Y1.vgtest \
- insn_test_cmplts_X0.stdout.exp insn_test_cmplts_X0.stderr.exp \
- insn_test_cmplts_X0.vgtest \
- insn_test_cmplts_X1.stdout.exp insn_test_cmplts_X1.stderr.exp \
- insn_test_cmplts_X1.vgtest \
- insn_test_cmplts_Y0.stdout.exp insn_test_cmplts_Y0.stderr.exp \
- insn_test_cmplts_Y0.vgtest \
- insn_test_cmplts_Y1.stdout.exp insn_test_cmplts_Y1.stderr.exp \
- insn_test_cmplts_Y1.vgtest \
- insn_test_cmpltsi_X0.stdout.exp insn_test_cmpltsi_X0.stderr.exp \
- insn_test_cmpltsi_X0.vgtest \
- insn_test_cmpltsi_X1.stdout.exp insn_test_cmpltsi_X1.stderr.exp \
- insn_test_cmpltsi_X1.vgtest \
- insn_test_cmpltsi_Y0.stdout.exp insn_test_cmpltsi_Y0.stderr.exp \
- insn_test_cmpltsi_Y0.vgtest \
- insn_test_cmpltsi_Y1.stdout.exp insn_test_cmpltsi_Y1.stderr.exp \
- insn_test_cmpltsi_Y1.vgtest \
- insn_test_cmpltu_X0.stdout.exp insn_test_cmpltu_X0.stderr.exp \
- insn_test_cmpltu_X0.vgtest \
- insn_test_cmpltu_X1.stdout.exp insn_test_cmpltu_X1.stderr.exp \
- insn_test_cmpltu_X1.vgtest \
- insn_test_cmpltu_Y0.stdout.exp insn_test_cmpltu_Y0.stderr.exp \
- insn_test_cmpltu_Y0.vgtest \
- insn_test_cmpltu_Y1.stdout.exp insn_test_cmpltu_Y1.stderr.exp \
- insn_test_cmpltu_Y1.vgtest \
- insn_test_cmpltui_X0.stdout.exp insn_test_cmpltui_X0.stderr.exp \
- insn_test_cmpltui_X0.vgtest \
- insn_test_cmpltui_X1.stdout.exp insn_test_cmpltui_X1.stderr.exp \
- insn_test_cmpltui_X1.vgtest \
- insn_test_cmpne_X0.stdout.exp insn_test_cmpne_X0.stderr.exp \
- insn_test_cmpne_X0.vgtest \
- insn_test_cmpne_X1.stdout.exp insn_test_cmpne_X1.stderr.exp \
- insn_test_cmpne_X1.vgtest \
- insn_test_cmpne_Y0.stdout.exp insn_test_cmpne_Y0.stderr.exp \
- insn_test_cmpne_Y0.vgtest \
- insn_test_cmpne_Y1.stdout.exp insn_test_cmpne_Y1.stderr.exp \
- insn_test_cmpne_Y1.vgtest \
- insn_test_cmul_X0.stdout.exp insn_test_cmul_X0.stderr.exp \
- insn_test_cmul_X0.vgtest \
- insn_test_cmula_X0.stdout.exp insn_test_cmula_X0.stderr.exp \
- insn_test_cmula_X0.vgtest \
- insn_test_cmulaf_X0.stdout.exp insn_test_cmulaf_X0.stderr.exp \
- insn_test_cmulaf_X0.vgtest \
- insn_test_cmulf_X0.stdout.exp insn_test_cmulf_X0.stderr.exp \
- insn_test_cmulf_X0.vgtest \
- insn_test_cmulfr_X0.stdout.exp insn_test_cmulfr_X0.stderr.exp \
- insn_test_cmulfr_X0.vgtest \
- insn_test_cmulh_X0.stdout.exp insn_test_cmulh_X0.stderr.exp \
- insn_test_cmulh_X0.vgtest \
- insn_test_cmulhr_X0.stdout.exp insn_test_cmulhr_X0.stderr.exp \
- insn_test_cmulhr_X0.vgtest \
- insn_test_crc32_32_X0.stdout.exp insn_test_crc32_32_X0.stderr.exp \
- insn_test_crc32_32_X0.vgtest \
- insn_test_crc32_8_X0.stdout.exp insn_test_crc32_8_X0.stderr.exp \
- insn_test_crc32_8_X0.vgtest \
- insn_test_ctz_X0.stdout.exp insn_test_ctz_X0.stderr.exp \
- insn_test_ctz_X0.vgtest \
- insn_test_ctz_Y0.stdout.exp insn_test_ctz_Y0.stderr.exp \
- insn_test_ctz_Y0.vgtest \
- insn_test_dblalign_X0.stdout.exp insn_test_dblalign_X0.stderr.exp \
- insn_test_dblalign_X0.vgtest \
- insn_test_dblalign2_X0.stdout.exp insn_test_dblalign2_X0.stderr.exp \
- insn_test_dblalign2_X0.vgtest \
- insn_test_dblalign2_X1.stdout.exp insn_test_dblalign2_X1.stderr.exp \
- insn_test_dblalign2_X1.vgtest \
- insn_test_dblalign4_X0.stdout.exp insn_test_dblalign4_X0.stderr.exp \
- insn_test_dblalign4_X0.vgtest \
- insn_test_dblalign4_X1.stdout.exp insn_test_dblalign4_X1.stderr.exp \
- insn_test_dblalign4_X1.vgtest \
- insn_test_dblalign6_X0.stdout.exp insn_test_dblalign6_X0.stderr.exp \
- insn_test_dblalign6_X0.vgtest \
- insn_test_dblalign6_X1.stdout.exp insn_test_dblalign6_X1.stderr.exp \
- insn_test_dblalign6_X1.vgtest \
- insn_test_dtlbpr_X1.stdout.exp insn_test_dtlbpr_X1.stderr.exp \
- insn_test_dtlbpr_X1.vgtest \
- insn_test_fdouble_add_flags_X0.stdout.exp \
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- insn_test_fdouble_add_flags_X0.vgtest \
- insn_test_fdouble_addsub_X0.stdout.exp \
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- insn_test_fdouble_addsub_X0.vgtest \
- insn_test_fdouble_mul_flags_X0.stdout.exp \
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- insn_test_fdouble_mul_flags_X0.vgtest \
- insn_test_fdouble_pack1_X0.stdout.exp \
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- insn_test_fdouble_pack1_X0.vgtest \
- insn_test_fdouble_pack2_X0.stdout.exp \
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- insn_test_fdouble_sub_flags_X0.stdout.exp \
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- insn_test_fdouble_sub_flags_X0.vgtest \
- insn_test_fdouble_unpack_max_X0.stdout.exp \
- insn_test_fdouble_unpack_max_X0.stderr.exp \
- insn_test_fdouble_unpack_max_X0.vgtest \
- insn_test_fdouble_unpack_min_X0.stdout.exp \
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- insn_test_fdouble_unpack_min_X0.vgtest \
- insn_test_flushwb_X1.stdout.exp insn_test_flushwb_X1.stderr.exp \
- insn_test_flushwb_X1.vgtest \
- insn_test_fnop_X0.stdout.exp insn_test_fnop_X0.stderr.exp \
- insn_test_fnop_X0.vgtest \
- insn_test_fnop_X1.stdout.exp insn_test_fnop_X1.stderr.exp \
- insn_test_fnop_X1.vgtest \
- insn_test_fnop_Y0.stdout.exp insn_test_fnop_Y0.stderr.exp \
- insn_test_fnop_Y0.vgtest \
- insn_test_fnop_Y1.stdout.exp insn_test_fnop_Y1.stderr.exp \
- insn_test_fnop_Y1.vgtest \
- insn_test_fsingle_add1_X0.stdout.exp \
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- insn_test_fsingle_add1_X0.vgtest \
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- insn_test_fsingle_addsub2_X0.vgtest \
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- insn_test_fsingle_mul1_X0.vgtest \
- insn_test_fsingle_mul2_X0.stdout.exp \
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- insn_test_fsingle_mul2_X0.vgtest \
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- insn_test_fsingle_pack2_X0.vgtest \
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- insn_test_jalr_X1.stdout.exp insn_test_jalr_X1.stderr.exp \
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- insn_test_jalr_Y1.stdout.exp insn_test_jalr_Y1.stderr.exp \
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- insn_test_jalrp_X1.stdout.exp insn_test_jalrp_X1.stderr.exp \
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- insn_test_jalrp_Y1.stdout.exp insn_test_jalrp_Y1.stderr.exp \
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- insn_test_jr_X1.stdout.exp insn_test_jr_X1.stderr.exp \
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- insn_test_jrp_X1.stdout.exp insn_test_jrp_X1.stderr.exp \
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- insn_test_jrp_Y1.stdout.exp insn_test_jrp_Y1.stderr.exp \
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- insn_test_ld_X1.stdout.exp insn_test_ld_X1.stderr.exp \
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- insn_test_ld_Y2.stdout.exp insn_test_ld_Y2.stderr.exp \
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- insn_test_ld1s_X1.stdout.exp insn_test_ld1s_X1.stderr.exp \
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- insn_test_ld1s_Y2.stdout.exp insn_test_ld1s_Y2.stderr.exp \
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- insn_test_ld1s_add_X1.stdout.exp insn_test_ld1s_add_X1.stderr.exp \
- insn_test_ld1s_add_X1.vgtest \
- insn_test_ld1u_X1.stdout.exp insn_test_ld1u_X1.stderr.exp \
- insn_test_ld1u_X1.vgtest \
- insn_test_ld1u_Y2.stdout.exp insn_test_ld1u_Y2.stderr.exp \
- insn_test_ld1u_Y2.vgtest \
- insn_test_ld1u_add_X1.stdout.exp insn_test_ld1u_add_X1.stderr.exp \
- insn_test_ld1u_add_X1.vgtest \
- insn_test_ld2s_X1.stdout.exp insn_test_ld2s_X1.stderr.exp \
- insn_test_ld2s_X1.vgtest \
- insn_test_ld2s_Y2.stdout.exp insn_test_ld2s_Y2.stderr.exp \
- insn_test_ld2s_Y2.vgtest \
- insn_test_ld2u_X1.stdout.exp insn_test_ld2u_X1.stderr.exp \
- insn_test_ld2u_X1.vgtest \
- insn_test_ld2u_Y2.stdout.exp insn_test_ld2u_Y2.stderr.exp \
- insn_test_ld2u_Y2.vgtest \
- insn_test_ld4s_X1.stdout.exp insn_test_ld4s_X1.stderr.exp \
- insn_test_ld4s_X1.vgtest \
- insn_test_ld4s_add_X1.stdout.exp insn_test_ld4s_add_X1.stderr.exp \
- insn_test_ld4s_add_X1.vgtest \
- insn_test_ld4u_X1.stdout.exp insn_test_ld4u_X1.stderr.exp \
- insn_test_ld4u_X1.vgtest \
- insn_test_ld4u_Y2.stdout.exp insn_test_ld4u_Y2.stderr.exp \
- insn_test_ld4u_Y2.vgtest \
- insn_test_ld4u_add_X1.stdout.exp insn_test_ld4u_add_X1.stderr.exp \
- insn_test_ld4u_add_X1.vgtest \
- insn_test_ld_add_X1.stdout.exp insn_test_ld_add_X1.stderr.exp \
- insn_test_ld_add_X1.vgtest \
- insn_test_ldna_X1.stdout.exp insn_test_ldna_X1.stderr.exp \
- insn_test_ldna_X1.vgtest \
- insn_test_ldna_add_X1.stdout.exp insn_test_ldna_add_X1.stderr.exp \
- insn_test_ldna_add_X1.vgtest \
- insn_test_ldnt_X1.stdout.exp insn_test_ldnt_X1.stderr.exp \
- insn_test_ldnt_X1.vgtest \
- insn_test_ldnt1s_X1.stdout.exp insn_test_ldnt1s_X1.stderr.exp \
- insn_test_ldnt1s_X1.vgtest \
- insn_test_ldnt1s_add_X1.stdout.exp insn_test_ldnt1s_add_X1.stderr.exp \
- insn_test_ldnt1s_add_X1.vgtest \
- insn_test_ldnt1u_X1.stdout.exp insn_test_ldnt1u_X1.stderr.exp \
- insn_test_ldnt1u_X1.vgtest \
- insn_test_ldnt1u_add_X1.stdout.exp insn_test_ldnt1u_add_X1.stderr.exp \
- insn_test_ldnt1u_add_X1.vgtest \
- insn_test_ldnt2s_X1.stdout.exp insn_test_ldnt2s_X1.stderr.exp \
- insn_test_ldnt2s_X1.vgtest \
- insn_test_ldnt2s_add_X1.stdout.exp insn_test_ldnt2s_add_X1.stderr.exp \
- insn_test_ldnt2s_add_X1.vgtest \
- insn_test_ldnt2u_add_X1.stdout.exp insn_test_ldnt2u_add_X1.stderr.exp \
- insn_test_ldnt2u_add_X1.vgtest \
- insn_test_ldnt4s_X1.stdout.exp insn_test_ldnt4s_X1.stderr.exp \
- insn_test_ldnt4s_X1.vgtest \
- insn_test_ldnt4s_add_X1.stdout.exp insn_test_ldnt4s_add_X1.stderr.exp \
- insn_test_ldnt4s_add_X1.vgtest \
- insn_test_ldnt4u_X1.stdout.exp insn_test_ldnt4u_X1.stderr.exp \
- insn_test_ldnt4u_X1.vgtest \
- insn_test_ldnt4u_add_X1.stdout.exp insn_test_ldnt4u_add_X1.stderr.exp \
- insn_test_ldnt4u_add_X1.vgtest \
- insn_test_ldnt_add_X1.stdout.exp insn_test_ldnt_add_X1.stderr.exp \
- insn_test_ldnt_add_X1.vgtest \
- insn_test_lnk_X1.stdout.exp insn_test_lnk_X1.stderr.exp \
- insn_test_lnk_X1.vgtest \
- insn_test_lnk_Y1.stdout.exp insn_test_lnk_Y1.stderr.exp \
- insn_test_lnk_Y1.vgtest \
- insn_test_mf_X1.stdout.exp insn_test_mf_X1.stderr.exp \
- insn_test_mf_X1.vgtest \
- insn_test_mm_X0.stdout.exp insn_test_mm_X0.stderr.exp \
- insn_test_mm_X0.vgtest \
- insn_test_mnz_X0.stdout.exp insn_test_mnz_X0.stderr.exp \
- insn_test_mnz_X0.vgtest \
- insn_test_mnz_X1.stdout.exp insn_test_mnz_X1.stderr.exp \
- insn_test_mnz_X1.vgtest \
- insn_test_mnz_Y0.stdout.exp insn_test_mnz_Y0.stderr.exp \
- insn_test_mnz_Y0.vgtest \
- insn_test_mnz_Y1.stdout.exp insn_test_mnz_Y1.stderr.exp \
- insn_test_mnz_Y1.vgtest \
- insn_test_mul_hs_hs_X0.stdout.exp insn_test_mul_hs_hs_X0.stderr.exp \
- insn_test_mul_hs_hs_X0.vgtest \
- insn_test_mul_hs_hs_Y0.stdout.exp insn_test_mul_hs_hs_Y0.stderr.exp \
- insn_test_mul_hs_hs_Y0.vgtest \
- insn_test_mul_hs_hu_X0.stdout.exp insn_test_mul_hs_hu_X0.stderr.exp \
- insn_test_mul_hs_hu_X0.vgtest \
- insn_test_mul_hs_ls_X0.stdout.exp insn_test_mul_hs_ls_X0.stderr.exp \
- insn_test_mul_hs_ls_X0.vgtest \
- insn_test_mul_hs_lu_X0.stdout.exp insn_test_mul_hs_lu_X0.stderr.exp \
- insn_test_mul_hs_lu_X0.vgtest \
- insn_test_mul_hu_hu_X0.stdout.exp insn_test_mul_hu_hu_X0.stderr.exp \
- insn_test_mul_hu_hu_X0.vgtest \
- insn_test_mul_hu_hu_Y0.stdout.exp insn_test_mul_hu_hu_Y0.stderr.exp \
- insn_test_mul_hu_hu_Y0.vgtest \
- insn_test_mul_hu_lu_X0.stdout.exp insn_test_mul_hu_lu_X0.stderr.exp \
- insn_test_mul_hu_lu_X0.vgtest \
- insn_test_mul_ls_ls_X0.stdout.exp insn_test_mul_ls_ls_X0.stderr.exp \
- insn_test_mul_ls_ls_X0.vgtest \
- insn_test_mul_ls_ls_Y0.stdout.exp insn_test_mul_ls_ls_Y0.stderr.exp \
- insn_test_mul_ls_ls_Y0.vgtest \
- insn_test_mul_ls_lu_X0.stdout.exp insn_test_mul_ls_lu_X0.stderr.exp \
- insn_test_mul_ls_lu_X0.vgtest \
- insn_test_mul_lu_lu_X0.stdout.exp insn_test_mul_lu_lu_X0.stderr.exp \
- insn_test_mul_lu_lu_X0.vgtest \
- insn_test_mul_lu_lu_Y0.stdout.exp insn_test_mul_lu_lu_Y0.stderr.exp \
- insn_test_mul_lu_lu_Y0.vgtest \
- insn_test_mula_hs_hs_X0.stdout.exp insn_test_mula_hs_hs_X0.stderr.exp \
- insn_test_mula_hs_hs_X0.vgtest \
- insn_test_mula_hs_hs_Y0.stdout.exp insn_test_mula_hs_hs_Y0.stderr.exp \
- insn_test_mula_hs_hs_Y0.vgtest \
- insn_test_mula_hs_hu_X0.stdout.exp insn_test_mula_hs_hu_X0.stderr.exp \
- insn_test_mula_hs_hu_X0.vgtest \
- insn_test_mula_hs_ls_X0.stdout.exp insn_test_mula_hs_ls_X0.stderr.exp \
- insn_test_mula_hs_ls_X0.vgtest \
- insn_test_mula_hs_lu_X0.stdout.exp insn_test_mula_hs_lu_X0.stderr.exp \
- insn_test_mula_hs_lu_X0.vgtest \
- insn_test_mula_hu_hu_X0.stdout.exp insn_test_mula_hu_hu_X0.stderr.exp \
- insn_test_mula_hu_hu_X0.vgtest \
- insn_test_mula_hu_hu_Y0.stdout.exp insn_test_mula_hu_hu_Y0.stderr.exp \
- insn_test_mula_hu_hu_Y0.vgtest \
- insn_test_mula_hu_ls_X0.stdout.exp insn_test_mula_hu_ls_X0.stderr.exp \
- insn_test_mula_hu_ls_X0.vgtest \
- insn_test_mula_hu_lu_X0.stdout.exp insn_test_mula_hu_lu_X0.stderr.exp \
- insn_test_mula_hu_lu_X0.vgtest \
- insn_test_mula_ls_ls_X0.stdout.exp insn_test_mula_ls_ls_X0.stderr.exp \
- insn_test_mula_ls_ls_X0.vgtest \
- insn_test_mula_ls_ls_Y0.stdout.exp insn_test_mula_ls_ls_Y0.stderr.exp \
- insn_test_mula_ls_ls_Y0.vgtest \
- insn_test_mula_ls_lu_X0.stdout.exp insn_test_mula_ls_lu_X0.stderr.exp \
- insn_test_mula_ls_lu_X0.vgtest \
- insn_test_mula_lu_lu_X0.stdout.exp insn_test_mula_lu_lu_X0.stderr.exp \
- insn_test_mula_lu_lu_X0.vgtest \
- insn_test_mula_lu_lu_Y0.stdout.exp insn_test_mula_lu_lu_Y0.stderr.exp \
- insn_test_mula_lu_lu_Y0.vgtest \
- insn_test_mulax_X0.stdout.exp insn_test_mulax_X0.stderr.exp \
- insn_test_mulax_X0.vgtest \
- insn_test_mulax_Y0.stdout.exp insn_test_mulax_Y0.stderr.exp \
- insn_test_mulax_Y0.vgtest \
- insn_test_mulx_X0.stdout.exp insn_test_mulx_X0.stderr.exp \
- insn_test_mulx_X0.vgtest \
- insn_test_mulx_Y0.stdout.exp insn_test_mulx_Y0.stderr.exp \
- insn_test_mulx_Y0.vgtest \
- insn_test_mz_X0.stdout.exp insn_test_mz_X0.stderr.exp \
- insn_test_mz_X0.vgtest \
- insn_test_mz_X1.stdout.exp insn_test_mz_X1.stderr.exp \
- insn_test_mz_X1.vgtest \
- insn_test_mz_Y0.stdout.exp insn_test_mz_Y0.stderr.exp \
- insn_test_mz_Y0.vgtest \
- insn_test_mz_Y1.stdout.exp insn_test_mz_Y1.stderr.exp \
- insn_test_mz_Y1.vgtest \
- insn_test_nop_X0.stdout.exp insn_test_nop_X0.stderr.exp \
- insn_test_nop_X0.vgtest \
- insn_test_nop_X1.stdout.exp insn_test_nop_X1.stderr.exp \
- insn_test_nop_X1.vgtest \
- insn_test_nop_Y0.stdout.exp insn_test_nop_Y0.stderr.exp \
- insn_test_nop_Y0.vgtest \
- insn_test_nop_Y1.stdout.exp insn_test_nop_Y1.stderr.exp \
- insn_test_nop_Y1.vgtest \
- insn_test_nor_X0.stdout.exp insn_test_nor_X0.stderr.exp \
- insn_test_nor_X0.vgtest \
- insn_test_nor_X1.stdout.exp insn_test_nor_X1.stderr.exp \
- insn_test_nor_X1.vgtest \
- insn_test_nor_Y0.stdout.exp insn_test_nor_Y0.stderr.exp \
- insn_test_nor_Y0.vgtest \
- insn_test_nor_Y1.stdout.exp insn_test_nor_Y1.stderr.exp \
- insn_test_nor_Y1.vgtest \
- insn_test_or_X0.stdout.exp insn_test_or_X0.stderr.exp \
- insn_test_or_X0.vgtest \
- insn_test_or_X1.stdout.exp insn_test_or_X1.stderr.exp \
- insn_test_or_X1.vgtest \
- insn_test_or_Y0.stdout.exp insn_test_or_Y0.stderr.exp \
- insn_test_or_Y0.vgtest \
- insn_test_or_Y1.stdout.exp insn_test_or_Y1.stderr.exp \
- insn_test_or_Y1.vgtest \
- insn_test_ori_X0.stdout.exp insn_test_ori_X0.stderr.exp \
- insn_test_ori_X0.vgtest \
- insn_test_ori_X1.stdout.exp insn_test_ori_X1.stderr.exp \
- insn_test_ori_X1.vgtest \
- insn_test_pcnt_X0.stdout.exp insn_test_pcnt_X0.stderr.exp \
- insn_test_pcnt_X0.vgtest \
- insn_test_pcnt_Y0.stdout.exp insn_test_pcnt_Y0.stderr.exp \
- insn_test_pcnt_Y0.vgtest \
- insn_test_revbits_X0.stdout.exp insn_test_revbits_X0.stderr.exp \
- insn_test_revbits_X0.vgtest \
- insn_test_revbits_Y0.stdout.exp insn_test_revbits_Y0.stderr.exp \
- insn_test_revbits_Y0.vgtest \
- insn_test_revbytes_X0.stdout.exp insn_test_revbytes_X0.stderr.exp \
- insn_test_revbytes_X0.vgtest \
- insn_test_revbytes_Y0.stdout.exp insn_test_revbytes_Y0.stderr.exp \
- insn_test_revbytes_Y0.vgtest \
- insn_test_rotl_X0.stdout.exp insn_test_rotl_X0.stderr.exp \
- insn_test_rotl_X0.vgtest \
- insn_test_rotl_X1.stdout.exp insn_test_rotl_X1.stderr.exp \
- insn_test_rotl_X1.vgtest \
- insn_test_rotl_Y0.stdout.exp insn_test_rotl_Y0.stderr.exp \
- insn_test_rotl_Y0.vgtest \
- insn_test_rotl_Y1.stdout.exp insn_test_rotl_Y1.stderr.exp \
- insn_test_rotl_Y1.vgtest \
- insn_test_rotli_X0.stdout.exp insn_test_rotli_X0.stderr.exp \
- insn_test_rotli_X0.vgtest \
- insn_test_rotli_X1.stdout.exp insn_test_rotli_X1.stderr.exp \
- insn_test_rotli_X1.vgtest \
- insn_test_rotli_Y0.stdout.exp insn_test_rotli_Y0.stderr.exp \
- insn_test_rotli_Y0.vgtest \
- insn_test_rotli_Y1.stdout.exp insn_test_rotli_Y1.stderr.exp \
- insn_test_rotli_Y1.vgtest \
- insn_test_shl_X0.stdout.exp insn_test_shl_X0.stderr.exp \
- insn_test_shl_X0.vgtest \
- insn_test_shl_X1.stdout.exp insn_test_shl_X1.stderr.exp \
- insn_test_shl_X1.vgtest \
- insn_test_shl_Y0.stdout.exp insn_test_shl_Y0.stderr.exp \
- insn_test_shl_Y0.vgtest \
- insn_test_shl_Y1.stdout.exp insn_test_shl_Y1.stderr.exp \
- insn_test_shl_Y1.vgtest \
- insn_test_shl16insli_X0.stdout.exp insn_test_shl16insli_X0.stderr.exp \
- insn_test_shl16insli_X0.vgtest \
- insn_test_shl16insli_X1.stdout.exp insn_test_shl16insli_X1.stderr.exp \
- insn_test_shl16insli_X1.vgtest \
- insn_test_shl1add_X0.stdout.exp insn_test_shl1add_X0.stderr.exp \
- insn_test_shl1add_X0.vgtest \
- insn_test_shl1add_X1.stdout.exp insn_test_shl1add_X1.stderr.exp \
- insn_test_shl1add_X1.vgtest \
- insn_test_shl1add_Y0.stdout.exp insn_test_shl1add_Y0.stderr.exp \
- insn_test_shl1add_Y0.vgtest \
- insn_test_shl1add_Y1.stdout.exp insn_test_shl1add_Y1.stderr.exp \
- insn_test_shl1add_Y1.vgtest \
- insn_test_shl1addx_X0.stdout.exp insn_test_shl1addx_X0.stderr.exp \
- insn_test_shl1addx_X0.vgtest \
- insn_test_shl1addx_X1.stdout.exp insn_test_shl1addx_X1.stderr.exp \
- insn_test_shl1addx_X1.vgtest \
- insn_test_shl1addx_Y0.stdout.exp insn_test_shl1addx_Y0.stderr.exp \
- insn_test_shl1addx_Y0.vgtest \
- insn_test_shl1addx_Y1.stdout.exp insn_test_shl1addx_Y1.stderr.exp \
- insn_test_shl1addx_Y1.vgtest \
- insn_test_shl2add_X0.stdout.exp insn_test_shl2add_X0.stderr.exp \
- insn_test_shl2add_X0.vgtest \
- insn_test_shl2add_X1.stdout.exp insn_test_shl2add_X1.stderr.exp \
- insn_test_shl2add_X1.vgtest \
- insn_test_shl2add_Y0.stdout.exp insn_test_shl2add_Y0.stderr.exp \
- insn_test_shl2add_Y0.vgtest \
- insn_test_shl2add_Y1.stdout.exp insn_test_shl2add_Y1.stderr.exp \
- insn_test_shl2add_Y1.vgtest \
- insn_test_shl2addx_X0.stdout.exp insn_test_shl2addx_X0.stderr.exp \
- insn_test_shl2addx_X0.vgtest \
- insn_test_shl2addx_X1.stdout.exp insn_test_shl2addx_X1.stderr.exp \
- insn_test_shl2addx_X1.vgtest \
- insn_test_shl2addx_Y0.stdout.exp insn_test_shl2addx_Y0.stderr.exp \
- insn_test_shl2addx_Y0.vgtest \
- insn_test_shl2addx_Y1.stdout.exp insn_test_shl2addx_Y1.stderr.exp \
- insn_test_shl2addx_Y1.vgtest \
- insn_test_shl3add_X0.stdout.exp insn_test_shl3add_X0.stderr.exp \
- insn_test_shl3add_X0.vgtest \
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- insn_test_shl3add_X1.vgtest \
- insn_test_shl3add_Y0.stdout.exp insn_test_shl3add_Y0.stderr.exp \
- insn_test_shl3add_Y0.vgtest \
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- insn_test_shl3add_Y1.vgtest \
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- insn_test_shl3addx_X0.vgtest \
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- insn_test_shl3addx_X1.vgtest \
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- insn_test_shl3addx_Y0.vgtest \
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- insn_test_shl3addx_Y1.vgtest \
- insn_test_shli_X0.stdout.exp insn_test_shli_X0.stderr.exp \
- insn_test_shli_X0.vgtest \
- insn_test_shli_X1.stdout.exp insn_test_shli_X1.stderr.exp \
- insn_test_shli_X1.vgtest \
- insn_test_shli_Y0.stdout.exp insn_test_shli_Y0.stderr.exp \
- insn_test_shli_Y0.vgtest \
- insn_test_shli_Y1.stdout.exp insn_test_shli_Y1.stderr.exp \
- insn_test_shli_Y1.vgtest \
- insn_test_shlx_X0.stdout.exp insn_test_shlx_X0.stderr.exp \
- insn_test_shlx_X0.vgtest \
- insn_test_shlx_X1.stdout.exp insn_test_shlx_X1.stderr.exp \
- insn_test_shlx_X1.vgtest \
- insn_test_shlxi_X0.stdout.exp insn_test_shlxi_X0.stderr.exp \
- insn_test_shlxi_X0.vgtest \
- insn_test_shlxi_X1.stdout.exp insn_test_shlxi_X1.stderr.exp \
- insn_test_shlxi_X1.vgtest \
- insn_test_shrs_X0.stdout.exp insn_test_shrs_X0.stderr.exp \
- insn_test_shrs_X0.vgtest \
- insn_test_shrs_X1.stdout.exp insn_test_shrs_X1.stderr.exp \
- insn_test_shrs_X1.vgtest \
- insn_test_shrs_Y0.stdout.exp insn_test_shrs_Y0.stderr.exp \
- insn_test_shrs_Y0.vgtest \
- insn_test_shrs_Y1.stdout.exp insn_test_shrs_Y1.stderr.exp \
- insn_test_shrs_Y1.vgtest \
- insn_test_shrsi_X0.stdout.exp insn_test_shrsi_X0.stderr.exp \
- insn_test_shrsi_X0.vgtest \
- insn_test_shrsi_X1.stdout.exp insn_test_shrsi_X1.stderr.exp \
- insn_test_shrsi_X1.vgtest \
- insn_test_shrsi_Y0.stdout.exp insn_test_shrsi_Y0.stderr.exp \
- insn_test_shrsi_Y0.vgtest \
- insn_test_shrsi_Y1.stdout.exp insn_test_shrsi_Y1.stderr.exp \
- insn_test_shrsi_Y1.vgtest \
- insn_test_shru_X0.stdout.exp insn_test_shru_X0.stderr.exp \
- insn_test_shru_X0.vgtest \
- insn_test_shru_X1.stdout.exp insn_test_shru_X1.stderr.exp \
- insn_test_shru_X1.vgtest \
- insn_test_shru_Y0.stdout.exp insn_test_shru_Y0.stderr.exp \
- insn_test_shru_Y0.vgtest \
- insn_test_shru_Y1.stdout.exp insn_test_shru_Y1.stderr.exp \
- insn_test_shru_Y1.vgtest \
- insn_test_shrui_X0.stdout.exp insn_test_shrui_X0.stderr.exp \
- insn_test_shrui_X0.vgtest \
- insn_test_shrui_X1.stdout.exp insn_test_shrui_X1.stderr.exp \
- insn_test_shrui_X1.vgtest \
- insn_test_shrui_Y0.stdout.exp insn_test_shrui_Y0.stderr.exp \
- insn_test_shrui_Y0.vgtest \
- insn_test_shrui_Y1.stdout.exp insn_test_shrui_Y1.stderr.exp \
- insn_test_shrui_Y1.vgtest \
- insn_test_shrux_X0.stdout.exp insn_test_shrux_X0.stderr.exp \
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- insn_test_v2sadas_X0.stdout.exp insn_test_v2sadas_X0.stderr.exp \
- insn_test_v2sadas_X0.vgtest \
- insn_test_v2sadau_X0.stdout.exp insn_test_v2sadau_X0.stderr.exp \
- insn_test_v2sadau_X0.vgtest \
- insn_test_v2sads_X0.stdout.exp insn_test_v2sads_X0.stderr.exp \
- insn_test_v2sads_X0.vgtest \
- insn_test_v2sadu_X0.stdout.exp insn_test_v2sadu_X0.stderr.exp \
- insn_test_v2sadu_X0.vgtest \
- insn_test_v2shl_X0.stdout.exp insn_test_v2shl_X0.stderr.exp \
- insn_test_v2shl_X0.vgtest \
- insn_test_v2shl_X1.stdout.exp insn_test_v2shl_X1.stderr.exp \
- insn_test_v2shl_X1.vgtest \
- insn_test_v2shli_X0.stdout.exp insn_test_v2shli_X0.stderr.exp \
- insn_test_v2shli_X0.vgtest \
- insn_test_v2shli_X1.stdout.exp insn_test_v2shli_X1.stderr.exp \
- insn_test_v2shli_X1.vgtest \
- insn_test_v2shlsc_X0.stdout.exp insn_test_v2shlsc_X0.stderr.exp \
- insn_test_v2shlsc_X0.vgtest \
- insn_test_v2shlsc_X1.stdout.exp insn_test_v2shlsc_X1.stderr.exp \
- insn_test_v2shlsc_X1.vgtest \
- insn_test_v2shrs_X0.stdout.exp insn_test_v2shrs_X0.stderr.exp \
- insn_test_v2shrs_X0.vgtest \
- insn_test_v2shrs_X1.stdout.exp insn_test_v2shrs_X1.stderr.exp \
- insn_test_v2shrs_X1.vgtest \
- insn_test_v2shrsi_X0.stdout.exp insn_test_v2shrsi_X0.stderr.exp \
- insn_test_v2shrsi_X0.vgtest \
- insn_test_v2shrsi_X1.stdout.exp insn_test_v2shrsi_X1.stderr.exp \
- insn_test_v2shrsi_X1.vgtest \
- insn_test_v2shru_X0.stdout.exp insn_test_v2shru_X0.stderr.exp \
- insn_test_v2shru_X0.vgtest \
- insn_test_v2shru_X1.stdout.exp insn_test_v2shru_X1.stderr.exp \
- insn_test_v2shru_X1.vgtest \
- insn_test_v2shrui_X0.stdout.exp insn_test_v2shrui_X0.stderr.exp \
- insn_test_v2shrui_X0.vgtest \
- insn_test_v2shrui_X1.stdout.exp insn_test_v2shrui_X1.stderr.exp \
- insn_test_v2shrui_X1.vgtest \
- insn_test_v2sub_X0.stdout.exp insn_test_v2sub_X0.stderr.exp \
- insn_test_v2sub_X0.vgtest \
- insn_test_v2sub_X1.stdout.exp insn_test_v2sub_X1.stderr.exp \
- insn_test_v2sub_X1.vgtest \
- insn_test_v2subsc_X0.stdout.exp insn_test_v2subsc_X0.stderr.exp \
- insn_test_v2subsc_X0.vgtest \
- insn_test_v2subsc_X1.stdout.exp insn_test_v2subsc_X1.stderr.exp \
- insn_test_v2subsc_X1.vgtest \
- insn_test_v4add_X0.stdout.exp insn_test_v4add_X0.stderr.exp \
- insn_test_v4add_X0.vgtest \
- insn_test_v4add_X1.stdout.exp insn_test_v4add_X1.stderr.exp \
- insn_test_v4add_X1.vgtest \
- insn_test_v4addsc_X0.stdout.exp insn_test_v4addsc_X0.stderr.exp \
- insn_test_v4addsc_X0.vgtest \
- insn_test_v4addsc_X1.stdout.exp insn_test_v4addsc_X1.stderr.exp \
- insn_test_v4addsc_X1.vgtest \
- insn_test_v4int_h_X0.stdout.exp insn_test_v4int_h_X0.stderr.exp \
- insn_test_v4int_h_X0.vgtest \
- insn_test_v4int_h_X1.stdout.exp insn_test_v4int_h_X1.stderr.exp \
- insn_test_v4int_h_X1.vgtest \
- insn_test_v4int_l_X0.stdout.exp insn_test_v4int_l_X0.stderr.exp \
- insn_test_v4int_l_X0.vgtest \
- insn_test_v4int_l_X1.stdout.exp insn_test_v4int_l_X1.stderr.exp \
- insn_test_v4int_l_X1.vgtest \
- insn_test_v4packsc_X0.stdout.exp insn_test_v4packsc_X0.stderr.exp \
- insn_test_v4packsc_X0.vgtest \
- insn_test_v4packsc_X1.stdout.exp insn_test_v4packsc_X1.stderr.exp \
- insn_test_v4packsc_X1.vgtest \
- insn_test_v4shl_X0.stdout.exp insn_test_v4shl_X0.stderr.exp \
- insn_test_v4shl_X0.vgtest \
- insn_test_v4shl_X1.stdout.exp insn_test_v4shl_X1.stderr.exp \
- insn_test_v4shl_X1.vgtest \
- insn_test_v4shlsc_X0.stdout.exp insn_test_v4shlsc_X0.stderr.exp \
- insn_test_v4shlsc_X0.vgtest \
- insn_test_v4shlsc_X1.stdout.exp insn_test_v4shlsc_X1.stderr.exp \
- insn_test_v4shlsc_X1.vgtest \
- insn_test_v4shrs_X0.stdout.exp insn_test_v4shrs_X0.stderr.exp \
- insn_test_v4shrs_X0.vgtest \
- insn_test_v4shrs_X1.stdout.exp insn_test_v4shrs_X1.stderr.exp \
- insn_test_v4shrs_X1.vgtest \
- insn_test_v4shru_X0.stdout.exp insn_test_v4shru_X0.stderr.exp \
- insn_test_v4shru_X0.vgtest \
- insn_test_v4shru_X1.stdout.exp insn_test_v4shru_X1.stderr.exp \
- insn_test_v4shru_X1.vgtest \
- insn_test_v4sub_X0.stdout.exp insn_test_v4sub_X0.stderr.exp \
- insn_test_v4sub_X0.vgtest \
- insn_test_v4sub_X1.stdout.exp insn_test_v4sub_X1.stderr.exp \
- insn_test_v4sub_X1.vgtest \
- insn_test_v4subsc_X0.stdout.exp insn_test_v4subsc_X0.stderr.exp \
- insn_test_v4subsc_X0.vgtest \
- insn_test_v4subsc_X1.stdout.exp insn_test_v4subsc_X1.stderr.exp \
- insn_test_v4subsc_X1.vgtest \
- insn_test_wh64_X1.stdout.exp insn_test_wh64_X1.stderr.exp \
- insn_test_wh64_X1.vgtest \
- insn_test_xor_X0.stdout.exp insn_test_xor_X0.stderr.exp \
- insn_test_xor_X0.vgtest \
- insn_test_xor_X1.stdout.exp insn_test_xor_X1.stderr.exp \
- insn_test_xor_X1.vgtest \
- insn_test_xor_Y0.stdout.exp insn_test_xor_Y0.stderr.exp \
- insn_test_xor_Y0.vgtest \
- insn_test_xor_Y1.stdout.exp insn_test_xor_Y1.stderr.exp \
- insn_test_xor_Y1.vgtest \
- insn_test_xori_X0.stdout.exp insn_test_xori_X0.stderr.exp \
- insn_test_xori_X0.vgtest \
- insn_test_xori_X1.stdout.exp insn_test_xori_X1.stderr.exp \
- insn_test_xori_X1.vgtest
-endif
-
-bin_PROGRAMS = gen_insn_test
-
-insn_tests =
-
-insn_tests += \
- insn_test_move_X0 \
- insn_test_move_X1 \
- insn_test_move_Y0 \
- insn_test_move_Y1 \
- insn_test_movei_X0 \
- insn_test_movei_X1 \
- insn_test_movei_Y0 \
- insn_test_movei_Y1 \
- insn_test_moveli_X0 \
- insn_test_moveli_X1 \
- insn_test_prefetch_X1 \
- insn_test_prefetch_Y2 \
- insn_test_prefetch_l1_X1 \
- insn_test_prefetch_l1_Y2 \
- insn_test_prefetch_l2_X1 \
- insn_test_prefetch_l2_Y2 \
- insn_test_prefetch_l3_X1 \
- insn_test_prefetch_l3_Y2 \
- insn_test_add_X0 \
- insn_test_add_X1 \
- insn_test_add_Y0 \
- insn_test_add_Y1 \
- insn_test_addi_X0 \
- insn_test_addi_X1 \
- insn_test_addi_Y0 \
- insn_test_addi_Y1 \
- insn_test_addli_X0 \
- insn_test_addli_X1 \
- insn_test_addx_X0 \
- insn_test_addx_X1 \
- insn_test_addx_Y0 \
- insn_test_addx_Y1 \
- insn_test_addxi_X0 \
- insn_test_addxi_X1 \
- insn_test_addxi_Y0 \
- insn_test_addxi_Y1 \
- insn_test_addxli_X0 \
- insn_test_addxli_X1 \
- insn_test_addxsc_X0 \
- insn_test_addxsc_X1 \
- insn_test_and_X0 \
- insn_test_and_X1 \
- insn_test_and_Y0 \
- insn_test_and_Y1 \
- insn_test_andi_X0 \
- insn_test_andi_X1 \
- insn_test_andi_Y0 \
- insn_test_andi_Y1 \
- insn_test_beqz_X1 \
- insn_test_beqzt_X1 \
- insn_test_bfexts_X0 \
- insn_test_bfextu_X0 \
- insn_test_bfins_X0 \
- insn_test_bgez_X1 \
- insn_test_bgezt_X1 \
- insn_test_bgtz_X1 \
- insn_test_bgtzt_X1 \
- insn_test_blbc_X1 \
- insn_test_blbct_X1 \
- insn_test_blbs_X1 \
- insn_test_blbst_X1 \
- insn_test_blez_X1 \
- insn_test_blezt_X1 \
- insn_test_bltz_X1 \
- insn_test_bltzt_X1 \
- insn_test_bnez_X1 \
- insn_test_bnezt_X1 \
- insn_test_clz_X0 \
- insn_test_clz_Y0 \
- insn_test_cmoveqz_X0 \
- insn_test_cmoveqz_Y0 \
- insn_test_cmovnez_X0 \
- insn_test_cmovnez_Y0 \
- insn_test_cmpeq_X0 \
- insn_test_cmpeq_X1 \
- insn_test_cmpeq_Y0 \
- insn_test_cmpeq_Y1 \
- insn_test_cmpeqi_X0 \
- insn_test_cmpeqi_X1 \
- insn_test_cmpeqi_Y0 \
- insn_test_cmpeqi_Y1 \
- insn_test_cmples_X0 \
- insn_test_cmples_X1 \
- insn_test_cmples_Y0 \
- insn_test_cmples_Y1 \
- insn_test_cmpleu_X0 \
- insn_test_cmpleu_X1 \
- insn_test_cmpleu_Y0 \
- insn_test_cmpleu_Y1 \
- insn_test_cmplts_X0 \
- insn_test_cmplts_X1 \
- insn_test_cmplts_Y0 \
- insn_test_cmplts_Y1 \
- insn_test_cmpltsi_X0 \
- insn_test_cmpltsi_X1 \
- insn_test_cmpltsi_Y0 \
- insn_test_cmpltsi_Y1 \
- insn_test_cmpltu_X0 \
- insn_test_cmpltu_X1 \
- insn_test_cmpltu_Y0 \
- insn_test_cmpltu_Y1 \
- insn_test_cmpltui_X0 \
- insn_test_cmpltui_X1 \
- insn_test_cmpne_X0 \
- insn_test_cmpne_X1 \
- insn_test_cmpne_Y0 \
- insn_test_cmpne_Y1 \
- insn_test_cmul_X0 \
- insn_test_cmula_X0 \
- insn_test_cmulaf_X0 \
- insn_test_cmulf_X0 \
- insn_test_cmulfr_X0 \
- insn_test_cmulh_X0 \
- insn_test_cmulhr_X0 \
- insn_test_crc32_32_X0 \
- insn_test_crc32_8_X0 \
- insn_test_ctz_X0 \
- insn_test_ctz_Y0 \
- insn_test_dblalign_X0 \
- insn_test_dblalign2_X0 \
- insn_test_dblalign2_X1 \
- insn_test_dblalign4_X0 \
- insn_test_dblalign4_X1 \
- insn_test_dblalign6_X0 \
- insn_test_dblalign6_X1 \
- insn_test_dtlbpr_X1 \
- insn_test_fdouble_add_flags_X0 \
- insn_test_fdouble_addsub_X0 \
- insn_test_fdouble_mul_flags_X0 \
- insn_test_fdouble_pack1_X0 \
- insn_test_fdouble_pack2_X0 \
- insn_test_fdouble_sub_flags_X0 \
- insn_test_fdouble_unpack_max_X0 \
- insn_test_fdouble_unpack_min_X0 \
- insn_test_flushwb_X1 \
- insn_test_fnop_X0 \
- insn_test_fnop_X1 \
- insn_test_fnop_Y0 \
- insn_test_fnop_Y1 \
- insn_test_fsingle_add1_X0 \
- insn_test_fsingle_addsub2_X0 \
- insn_test_fsingle_mul1_X0 \
- insn_test_fsingle_mul2_X0 \
- insn_test_fsingle_pack1_X0 \
- insn_test_fsingle_pack1_Y0 \
- insn_test_fsingle_pack2_X0 \
- insn_test_fsingle_sub1_X0 \
- insn_test_icoh_X1 \
- insn_test_j_X1 \
- insn_test_jal_X1 \
- insn_test_jalr_X1 \
- insn_test_jalr_Y1 \
- insn_test_jalrp_X1 \
- insn_test_jalrp_Y1 \
- insn_test_jr_X1 \
- insn_test_jr_Y1 \
- insn_test_jrp_X1 \
- insn_test_jrp_Y1 \
- insn_test_ld_X1 \
- insn_test_ld_Y2 \
- insn_test_ld1s_X1 \
- insn_test_ld1s_Y2 \
- insn_test_ld1s_add_X1 \
- insn_test_ld1u_X1 \
- insn_test_ld1u_Y2 \
- insn_test_ld1u_add_X1 \
- insn_test_ld2s_X1 \
- insn_test_ld2s_Y2 \
- insn_test_ld2u_X1 \
- insn_test_ld2u_Y2 \
- insn_test_ld4s_X1 \
- insn_test_ld4s_add_X1 \
- insn_test_ld4u_X1 \
- insn_test_ld4u_Y2 \
- insn_test_ld4u_add_X1 \
- insn_test_ld_add_X1 \
- insn_test_ldna_X1 \
- insn_test_ldna_add_X1 \
- insn_test_ldnt_X1 \
- insn_test_ldnt1s_X1 \
- insn_test_ldnt1s_add_X1 \
- insn_test_ldnt1u_X1 \
- insn_test_ldnt1u_add_X1 \
- insn_test_ldnt2s_X1 \
- insn_test_ldnt2s_add_X1 \
- insn_test_ldnt2u_add_X1 \
- insn_test_ldnt4s_X1 \
- insn_test_ldnt4s_add_X1 \
- insn_test_ldnt4u_X1 \
- insn_test_ldnt4u_add_X1 \
- insn_test_ldnt_add_X1 \
- insn_test_lnk_X1 \
- insn_test_lnk_Y1 \
- insn_test_mf_X1 \
- insn_test_mm_X0 \
- insn_test_mnz_X0 \
- insn_test_mnz_X1 \
- insn_test_mnz_Y0 \
- insn_test_mnz_Y1 \
- insn_test_mul_hs_hs_X0 \
- insn_test_mul_hs_hs_Y0 \
- insn_test_mul_hs_hu_X0 \
- insn_test_mul_hs_ls_X0 \
- insn_test_mul_hs_lu_X0 \
- insn_test_mul_hu_hu_X0 \
- insn_test_mul_hu_hu_Y0 \
- insn_test_mul_hu_lu_X0 \
- insn_test_mul_ls_ls_X0 \
- insn_test_mul_ls_ls_Y0 \
- insn_test_mul_ls_lu_X0 \
- insn_test_mul_lu_lu_X0 \
- insn_test_mul_lu_lu_Y0 \
- insn_test_mula_hs_hs_X0 \
- insn_test_mula_hs_hs_Y0 \
- insn_test_mula_hs_hu_X0 \
- insn_test_mula_hs_ls_X0 \
- insn_test_mula_hs_lu_X0 \
- insn_test_mula_hu_hu_X0 \
- insn_test_mula_hu_hu_Y0 \
- insn_test_mula_hu_ls_X0 \
- insn_test_mula_hu_lu_X0 \
- insn_test_mula_ls_ls_X0 \
- insn_test_mula_ls_ls_Y0 \
- insn_test_mula_ls_lu_X0 \
- insn_test_mula_lu_lu_X0 \
- insn_test_mula_lu_lu_Y0 \
- insn_test_mulax_X0 \
- insn_test_mulax_Y0 \
- insn_test_mulx_X0 \
- insn_test_mulx_Y0 \
- insn_test_mz_X0 \
- insn_test_mz_X1 \
- insn_test_mz_Y0 \
- insn_test_mz_Y1 \
- insn_test_nop_X0 \
- insn_test_nop_X1 \
- insn_test_nop_Y0 \
- insn_test_nop_Y1 \
- insn_test_nor_X0 \
- insn_test_nor_X1 \
- insn_test_nor_Y0 \
- insn_test_nor_Y1 \
- insn_test_or_X0 \
- insn_test_or_X1 \
- insn_test_or_Y0 \
- insn_test_or_Y1 \
- insn_test_ori_X0 \
- insn_test_ori_X1 \
- insn_test_pcnt_X0 \
- insn_test_pcnt_Y0 \
- insn_test_revbits_X0 \
- insn_test_revbits_Y0 \
- insn_test_revbytes_X0 \
- insn_test_revbytes_Y0 \
- insn_test_rotl_X0 \
- insn_test_rotl_X1 \
- insn_test_rotl_Y0 \
- insn_test_rotl_Y1 \
- insn_test_rotli_X0 \
- insn_test_rotli_X1 \
- insn_test_rotli_Y0 \
- insn_test_rotli_Y1 \
- insn_test_shl_X0 \
- insn_test_shl_X1 \
- insn_test_shl_Y0 \
- insn_test_shl_Y1 \
- insn_test_shl16insli_X0 \
- insn_test_shl16insli_X1 \
- insn_test_shl1add_X0 \
- insn_test_shl1add_X1 \
- insn_test_shl1add_Y0 \
- insn_test_shl1add_Y1 \
- insn_test_shl1addx_X0 \
- insn_test_shl1addx_X1 \
- insn_test_shl1addx_Y0 \
- insn_test_shl1addx_Y1 \
- insn_test_shl2add_X0 \
- insn_test_shl2add_X1 \
- insn_test_shl2add_Y0 \
- insn_test_shl2add_Y1 \
- insn_test_shl2addx_X0 \
- insn_test_shl2addx_X1 \
- insn_test_shl2addx_Y0 \
- insn_test_shl2addx_Y1 \
- insn_test_shl3add_X0 \
- insn_test_shl3add_X1 \
- insn_test_shl3add_Y0 \
- insn_test_shl3add_Y1 \
- insn_test_shl3addx_X0 \
- insn_test_shl3addx_X1 \
- insn_test_shl3addx_Y0 \
- insn_test_shl3addx_Y1 \
- insn_test_shli_X0 \
- insn_test_shli_X1 \
- insn_test_shli_Y0 \
- insn_test_shli_Y1 \
- insn_test_shlx_X0 \
- insn_test_shlx_X1 \
- insn_test_shlxi_X0 \
- insn_test_shlxi_X1 \
- insn_test_shrs_X0 \
- insn_test_shrs_X1 \
- insn_test_shrs_Y0 \
- insn_test_shrs_Y1 \
- insn_test_shrsi_X0 \
- insn_test_shrsi_X1 \
- insn_test_shrsi_Y0 \
- insn_test_shrsi_Y1 \
- insn_test_shru_X0 \
- insn_test_shru_X1 \
- insn_test_shru_Y0 \
- insn_test_shru_Y1 \
- insn_test_shrui_X0 \
- insn_test_shrui_X1 \
- insn_test_shrui_Y0 \
- insn_test_shrui_Y1 \
- insn_test_shrux_X0 \
- insn_test_shrux_X1 \
- insn_test_shufflebytes_X0 \
- insn_test_st_X1 \
- insn_test_st_Y2 \
- insn_test_st1_X1 \
- insn_test_st1_Y2 \
- insn_test_st1_add_X1 \
- insn_test_st2_X1 \
- insn_test_st2_Y2 \
- insn_test_st2_add_X1 \
- insn_test_st4_X1 \
- insn_test_st4_Y2 \
- insn_test_st4_add_X1 \
- insn_test_st_add_X1 \
- insn_test_stnt_X1 \
- insn_test_stnt1_X1 \
- insn_test_stnt2_X1 \
- insn_test_stnt2_add_X1 \
- insn_test_stnt4_X1 \
- insn_test_stnt4_add_X1 \
- insn_test_stnt_add_X1 \
- insn_test_sub_X0 \
- insn_test_sub_X1 \
- insn_test_sub_Y0 \
- insn_test_sub_Y1 \
- insn_test_subx_X0 \
- insn_test_subx_X1 \
- insn_test_subx_Y0 \
- insn_test_subx_Y1 \
- insn_test_tblidxb0_X0 \
- insn_test_tblidxb0_Y0 \
- insn_test_tblidxb1_X0 \
- insn_test_tblidxb1_Y0 \
- insn_test_tblidxb2_X0 \
- insn_test_tblidxb2_Y0 \
- insn_test_tblidxb3_X0 \
- insn_test_tblidxb3_Y0 \
- insn_test_v1add_X0 \
- insn_test_v1add_X1 \
- insn_test_v1adduc_X0 \
- insn_test_v1adduc_X1 \
- insn_test_v1adiffu_X0 \
- insn_test_v1avgu_X0 \
- insn_test_v1cmpeq_X0 \
- insn_test_v1cmpeq_X1 \
- insn_test_v1cmpeqi_X0 \
- insn_test_v1cmpeqi_X1 \
- insn_test_v1cmples_X0 \
- insn_test_v1cmples_X1 \
- insn_test_v1cmpleu_X0 \
- insn_test_v1cmpleu_X1 \
- insn_test_v1cmplts_X0 \
- insn_test_v1cmplts_X1 \
- insn_test_v1cmpltu_X0 \
- insn_test_v1cmpltu_X1 \
- insn_test_v1cmpne_X0 \
- insn_test_v1cmpne_X1 \
- insn_test_v1ddotpu_X0 \
- insn_test_v1ddotpua_X0 \
- insn_test_v1ddotpus_X0 \
- insn_test_v1ddotpusa_X0 \
- insn_test_v1dotp_X0 \
- insn_test_v1dotpa_X0 \
- insn_test_v1dotpu_X0 \
- insn_test_v1dotpua_X0 \
- insn_test_v1dotpus_X0 \
- insn_test_v1dotpusa_X0 \
- insn_test_v1int_h_X0 \
- insn_test_v1int_h_X1 \
- insn_test_v1int_l_X0 \
- insn_test_v1int_l_X1 \
- insn_test_v1maxu_X0 \
- insn_test_v1maxu_X1 \
- insn_test_v1minu_X0 \
- insn_test_v1minu_X1 \
- insn_test_v1mnz_X0 \
- insn_test_v1mnz_X1 \
- insn_test_v1multu_X0 \
- insn_test_v1mulu_X0 \
- insn_test_v1mulus_X0 \
- insn_test_v1mz_X0 \
- insn_test_v1mz_X1 \
- insn_test_v1sadau_X0 \
- insn_test_v1sadu_X0 \
- insn_test_v1shl_X0 \
- insn_test_v1shl_X1 \
- insn_test_v1shli_X0 \
- insn_test_v1shli_X1 \
- insn_test_v1shrs_X0 \
- insn_test_v1shrs_X1 \
- insn_test_v1shrsi_X0 \
- insn_test_v1shrsi_X1 \
- insn_test_v1shru_X0 \
- insn_test_v1shru_X1 \
- insn_test_v1shrui_X0 \
- insn_test_v1shrui_X1 \
- insn_test_v1sub_X0 \
- insn_test_v1sub_X1 \
- insn_test_v1subuc_X0 \
- insn_test_v1subuc_X1 \
- insn_test_v2add_X0 \
- insn_test_v2add_X1 \
- insn_test_v2addsc_X0 \
- insn_test_v2addsc_X1 \
- insn_test_v2adiffs_X0 \
- insn_test_v2avgs_X0 \
- insn_test_v2cmpeq_X0 \
- insn_test_v2cmpeq_X1 \
- insn_test_v2cmpeqi_X0 \
- insn_test_v2cmpeqi_X1 \
- insn_test_v2cmples_X0 \
- insn_test_v2cmples_X1 \
- insn_test_v2cmpleu_X0 \
- insn_test_v2cmpleu_X1 \
- insn_test_v2cmplts_X0 \
- insn_test_v2cmplts_X1 \
- insn_test_v2cmpltsi_X0 \
- insn_test_v2cmpltsi_X1 \
- insn_test_v2cmpltu_X0 \
- insn_test_v2cmpltu_X1 \
- insn_test_v2cmpltui_X0 \
- insn_test_v2cmpltui_X1 \
- insn_test_v2cmpne_X0 \
- insn_test_v2cmpne_X1 \
- insn_test_v2dotp_X0 \
- insn_test_v2dotpa_X0 \
- insn_test_v2int_h_X0 \
- insn_test_v2int_h_X1 \
- insn_test_v2int_l_X0 \
- insn_test_v2int_l_X1 \
- insn_test_v2maxs_X0 \
- insn_test_v2maxs_X1 \
- insn_test_v2mins_X0 \
- insn_test_v2mins_X1 \
- insn_test_v2mnz_X0 \
- insn_test_v2mnz_X1 \
- insn_test_v2mulfsc_X0 \
- insn_test_v2muls_X0 \
- insn_test_v2mults_X0 \
- insn_test_v2mz_X0 \
- insn_test_v2mz_X1 \
- insn_test_v2packh_X0 \
- insn_test_v2packh_X1 \
- insn_test_v2packl_X0 \
- insn_test_v2packl_X1 \
- insn_test_v2packuc_X0 \
- insn_test_v2packuc_X1 \
- insn_test_v2sadas_X0 \
- insn_test_v2sadau_X0 \
- insn_test_v2sads_X0 \
- insn_test_v2sadu_X0 \
- insn_test_v2shl_X0 \
- insn_test_v2shl_X1 \
- insn_test_v2shli_X0 \
- insn_test_v2shli_X1 \
- insn_test_v2shlsc_X0 \
- insn_test_v2shlsc_X1 \
- insn_test_v2shrs_X0 \
- insn_test_v2shrs_X1 \
- insn_test_v2shrsi_X0 \
- insn_test_v2shrsi_X1 \
- insn_test_v2shru_X0 \
- insn_test_v2shru_X1 \
- insn_test_v2shrui_X0 \
- insn_test_v2shrui_X1 \
- insn_test_v2sub_X0 \
- insn_test_v2sub_X1 \
- insn_test_v2subsc_X0 \
- insn_test_v2subsc_X1 \
- insn_test_v4add_X0 \
- insn_test_v4add_X1 \
- insn_test_v4addsc_X0 \
- insn_test_v4addsc_X1 \
- insn_test_v4int_h_X0 \
- insn_test_v4int_h_X1 \
- insn_test_v4int_l_X0 \
- insn_test_v4int_l_X1 \
- insn_test_v4packsc_X0 \
- insn_test_v4packsc_X1 \
- insn_test_v4shl_X0 \
- insn_test_v4shl_X1 \
- insn_test_v4shlsc_X0 \
- insn_test_v4shlsc_X1 \
- insn_test_v4shrs_X0 \
- insn_test_v4shrs_X1 \
- insn_test_v4shru_X0 \
- insn_test_v4shru_X1 \
- insn_test_v4sub_X0 \
- insn_test_v4sub_X1 \
- insn_test_v4subsc_X0 \
- insn_test_v4subsc_X1 \
- insn_test_wh64_X1 \
- insn_test_xor_X0 \
- insn_test_xor_X1 \
- insn_test_xor_Y0 \
- insn_test_xor_Y1 \
- insn_test_xori_X0 \
- insn_test_xori_X1
-
-check_PROGRAMS = \
- allexec \
- $(insn_tests)
-
-AM_CFLAGS += @FLAG_M64@ -w
-AM_CXXFLAGS += @FLAG_M64@
-AM_CCASFLAGS += @FLAG_M64@
-
-allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
-gen_insn_test_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@ -I$(top_srcdir)/VEX/priv
-gen_insn_test_LDADD = ../../../VEX/priv/tilegx_disasm.o
-
-$(addsuffix .c, $(insn_tests)) : gen_insn_test
- @$(srcdir)/gen_test.sh $@
-
-$(addsuffix .stdout.exp, $(insn_tests)) : $(insn_tests)
- ./$(basename $(basename $@)) > $@
-
-$(addsuffix .stderr.exp, $(insn_tests)) :
- touch $@
-
-$(addsuffix .vgtest, $(insn_tests)) :
- echo -e "prog: $(basename $@)\nvgopts: -q" > $@
-
-check-am : $(addsuffix .stdout.exp, $(insn_tests)) $(addsuffix .stderr.exp, $(insn_tests)) $(addsuffix .vgtest, $(insn_tests))
-
-clean-am :
- @rm -f *.stderr.exp *.stdout.exp *.vgtest $(addsuffix .c, $(insn_tests)) $(addsuffix .o, $(insn_tests)) $(insn_tests)
- @rm -f *.o $(bin_PROGRAMS)
-
-distclean-am : clean-am
+++ /dev/null
-../allexec.c
\ No newline at end of file
+++ /dev/null
-#! /bin/sh
-
-../filter_stderr
-
+++ /dev/null
-//gcc a.c ../../../VEX/priv/tilegx_disasm.c -I ../../../ -I ../../../VEX/priv/ -I ../../../VEX/pub/
-
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include "tilegx_disasm.h"
-
-#undef DGB
-
-static unsigned char op_abnorm[TILEGX_OPC_NONE] = {
- /* Black list */
- [ TILEGX_OPC_BPT ] = 1,
- [ TILEGX_OPC_INFO ] = 1,
- [ TILEGX_OPC_INFOL ] = 1,
- [ TILEGX_OPC_DRAIN ] = 1,
- [ TILEGX_OPC_IRET ] = 1,
- [ TILEGX_OPC_SWINT0 ] = 1,
- [ TILEGX_OPC_SWINT1 ] = 1,
- [ TILEGX_OPC_SWINT2 ] = 1,
- [ TILEGX_OPC_SWINT3 ] = 1,
- [ TILEGX_OPC_LD4S_TLS ] = 1,
- [ TILEGX_OPC_LD_TLS ] = 1,
- [ TILEGX_OPC_MFSPR ] = 1,
- [ TILEGX_OPC_MTSPR ] = 1,
- [ TILEGX_OPC_ILL ] = 1,
- [ TILEGX_OPC_NAP ] = 1,
-
- /* mem load */
- [ TILEGX_OPC_LD ] = 2,
- [ TILEGX_OPC_LD_ADD ] = 2,
- [ TILEGX_OPC_LD1S ] = 2,
- [ TILEGX_OPC_LD1S_ADD ] = 2,
- [ TILEGX_OPC_LD1U ] = 2,
- [ TILEGX_OPC_LD1U_ADD ] = 2,
- [ TILEGX_OPC_LD2S ] = 2,
- [ TILEGX_OPC_LD2S_ADD ] = 2,
- [ TILEGX_OPC_LD2U ] = 2,
- [ TILEGX_OPC_LD2U_ADD ] = 2,
- [ TILEGX_OPC_LD4S ] = 2,
- [ TILEGX_OPC_LD4S_ADD ] = 2,
- [ TILEGX_OPC_LD4U ] = 2,
- [ TILEGX_OPC_LD4U_ADD ] = 2,
- [ TILEGX_OPC_LDNA ] = 2,
- [ TILEGX_OPC_LDNA_ADD ] = 2,
- [ TILEGX_OPC_LDNT ] = 2,
- [ TILEGX_OPC_LDNT1S ] = 2,
- [ TILEGX_OPC_LDNT1S_ADD ] = 2,
- [ TILEGX_OPC_LDNT1U ] = 2,
- [ TILEGX_OPC_LDNT1U_ADD ] = 2,
- [ TILEGX_OPC_LDNT2S ] = 2,
- [ TILEGX_OPC_LDNT2S_ADD ] = 2,
- [ TILEGX_OPC_LDNT2U ] = 2,
- [ TILEGX_OPC_LDNT2U_ADD ] = 2,
- [ TILEGX_OPC_LDNT4S ] = 2,
- [ TILEGX_OPC_LDNT4S_ADD ] = 2,
- [ TILEGX_OPC_LDNT4U ] = 2,
- [ TILEGX_OPC_LDNT4U_ADD ] = 2,
- [ TILEGX_OPC_LDNT_ADD ] = 2,
-
- /* mem store */
- [ TILEGX_OPC_ST ] = 4,
- [ TILEGX_OPC_ST1 ] = 4,
- [ TILEGX_OPC_ST1_ADD ] = 4,
- [ TILEGX_OPC_ST2 ] = 4,
- [ TILEGX_OPC_ST2_ADD ] = 4,
- [ TILEGX_OPC_ST4 ] = 4,
- [ TILEGX_OPC_ST4_ADD ] = 4,
- [ TILEGX_OPC_ST_ADD ] = 4,
- [ TILEGX_OPC_STNT ] = 4,
- [ TILEGX_OPC_STNT1 ] = 4,
- [ TILEGX_OPC_STNT1_ADD ] = 4,
- [ TILEGX_OPC_STNT2 ] = 4,
- [ TILEGX_OPC_STNT2_ADD ] = 4,
- [ TILEGX_OPC_STNT4 ] = 4,
- [ TILEGX_OPC_STNT4_ADD ] = 4,
- [ TILEGX_OPC_STNT_ADD ] = 4,
-
- /* conditional branch */
- [ TILEGX_OPC_BEQZ ] = 8,
- [ TILEGX_OPC_BEQZT ] = 8,
- [ TILEGX_OPC_BGEZ ] = 8,
- [ TILEGX_OPC_BGEZT ] = 8,
- [ TILEGX_OPC_BGTZ ] = 8,
- [ TILEGX_OPC_BGTZT ] = 8,
- [ TILEGX_OPC_BLBC ] = 8,
- [ TILEGX_OPC_BLBCT ] = 8,
- [ TILEGX_OPC_BLBS ] = 8,
- [ TILEGX_OPC_BLBST ] = 8,
- [ TILEGX_OPC_BLEZ ] = 8,
- [ TILEGX_OPC_BLEZT ] = 8,
- [ TILEGX_OPC_BLTZ ] = 8,
- [ TILEGX_OPC_BLTZT ] = 8,
- [ TILEGX_OPC_BNEZ ] = 8,
- [ TILEGX_OPC_BNEZT ] = 8,
-};
-
-
-static tilegx_bundle_bits
-encode_insn_tilegx_X (int p, struct tilegx_decoded_instruction decoded);
-
-static tilegx_bundle_bits
-encode_insn_tilegx_Y (int p, struct tilegx_decoded_instruction decoded);
-
-static int decode( tilegx_bundle_bits *p, int count, ULong pc );
-
-static uint64_t
-RAND(int round) {
- static volatile uint64_t rand_seed = 0;
- while (round-- > 0)
- rand_seed = (rand_seed >> 8) * 201520052007 + 1971;
-#ifdef DBG
- printf("RAND: %d\n", (int)rand_seed);
-#endif
- return rand_seed;
-}
-
-
-int main(int argc, char* argv[])
-{
- int i, start, end, pipe;
- struct tilegx_decoded_instruction decoded;
- if (argc == 1) {
- pipe = 0x1F;
- start = 0;
- end = TILEGX_OPC_NONE;
- } else if (argc == 3) {
- start = atoi(argv[1]);
-
- if (start >= TILEGX_OPC_NONE)
- return -1;
-
- end = start + 1;
- /* pipes: X: bit 0,1; Y: bit 2-4 */
- pipe = atoi(argv[2]);
- } else {
- return -1;
- }
-
- for (i = start; i < end; i++) {
- memset(&decoded, 0, sizeof(decoded));
- const struct tilegx_opcode *opcode = &tilegx_opcodes[i];
- decoded.opcode = opcode;
-#ifdef DBG
- const char *op_name = decoded.opcode->name;
- printf("\n\n%d) %s\n", i, op_name);
-#endif
-
- if (op_abnorm[i] & 1)
- continue;
-
- /* X0 pipeline */
- if (tilegx_opcodes[i].pipes & 1 & pipe)
- encode_insn_tilegx_X(0, decoded);
-
- /* X1 pipeline */
- if (tilegx_opcodes[i].pipes & 2 & pipe)
- encode_insn_tilegx_X(1, decoded);
-
- /* Y0 pipleline */
- if (tilegx_opcodes[i].pipes & 4 & pipe)
- encode_insn_tilegx_Y(0, decoded);
-
- /* Y1 pipleline */
- if (tilegx_opcodes[i].pipes & 8 & pipe)
- encode_insn_tilegx_Y(1, decoded);
-
- /* Y2 pipleline */
- if (tilegx_opcodes[i].pipes & 16 & pipe)
- encode_insn_tilegx_Y(2, decoded);
- }
-
- return 0;
-}
-
-static tilegx_bundle_bits
-encode_insn_tilegx_X(int p, struct tilegx_decoded_instruction decoded)
-{
- const struct tilegx_opcode *opc =
- decoded.opcode;
- int op_idx = decoded.opcode->mnemonic;
-
- tilegx_bundle_bits insn = 0;
- //int pipeX01 = (opc->pipes & 0x01) ? 0 : 1;
- int op_num = opc->num_operands;
-
- /* Assume either X0 or X1. */
- if ((opc->pipes & 3) == 0)
- return -1;
-
- /* Insert fnop in other pipe. */
- insn = tilegx_opcodes[TILEGX_OPC_FNOP].
- fixed_bit_values[p ? 0 : 1];
-#ifdef DBG
- printf(" X%d, ", p);
-#endif
-
- insn |= opc->fixed_bit_values[p];
-
- printf("//file: _insn_test_%s_X%d.c\n", decoded.opcode->name, p);
- printf("//op=%d\n", op_idx);
- printf("#include <stdio.h>\n");
- printf("#include <stdlib.h>\n");
-
- printf("\n"
- "void func_exit(void) {\n"
- " printf(\"%cs\\n\", __func__);\n"
- " exit(0);\n"
- "}\n"
- "\n"
- "void func_call(void) {\n"
- " printf(\"%cs\\n\", __func__);\n"
- " exit(0);\n"
- "}\n"
- "\n"
- "unsigned long mem[2] = { 0x%lx, 0x%lx };\n"
- "\n", '%', '%', RAND(op_idx), RAND(op_idx));
-
- printf("int main(void) {\n");
- printf(" unsigned long a[4] = { 0, 0 };\n");
-
- printf(" asm __volatile__ (\n");
-
- int i, n = 0;
-
- if (op_abnorm[op_idx] & 6)
- {
- /* loop for each operand. */
- for (i = 0 ; i < op_num; i++)
- {
- const struct tilegx_operand *opd =
- &tilegx_operands[opc->operands[p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand, pick register 0-50 randomly. */
- decoded.operand_values[i] = RAND(op_idx) % 51;
- int r = decoded.operand_values[i];
- int64_t d = RAND(op_idx);
-#ifdef DBG
- printf(" %d) r%-2d %016lx\n", i, (int)r, (unsigned long)d);
-#endif
- int k = 0;
- for (k = 3; k >= 0 ; k--) {
- if (d >> (16 * k) || k == 0) {
- printf(" \"moveli r%d, %d\\n\"\n", r, (int)(d >> (16 * k)));
- for (k--; k >= 0; k--)
- printf(" \"shl16insli r%d, r%d, %d\\n\"\n", r, r, (int)(int16_t)(d >> (16 * k)));
- break;
- }
- }
- } else {
- /* An immediate operand, pick a random value. */
- decoded.operand_values[i] = RAND(op_idx);
-#ifdef DBG
- printf(" %d) %016lx\n", (int)i, (unsigned long)decoded.operand_values[i]);
-#endif
- }
-
- Long op = decoded.operand_values[i];
- decoded.operands[i] = opd;
- ULong x = opd->insert(op);
- insn |= x;
- }
- printf(" \"");
- if (op_abnorm[op_idx] & 2)
- printf("move r%d, %c2\\n\"\n", (int)decoded.operand_values[1], '%');
- else
- printf("move r%d, %c2\\n\"\n", (int)decoded.operand_values[0], '%');
-
- printf(" \"");
- decode(&insn, 2, 0);
- printf("\\n\"\n");
-
- /* loop for each operand. */
- n = 0;
- for (i = 0 ; i < op_num; i++)
- {
- const struct tilegx_operand *opd =
- &tilegx_operands[opc->operands[p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand */
- printf(" \"move %c%d, r%d\\n\"\n", '%', n, (int)decoded.operand_values[i]);
- n++;
- }
- }
-
- printf(" ");
- if (n)
- printf(":");
- for (i = 0; i < n; i++)
- {
- printf("\"=r\"(a[%d])", i);
- if (i != n - 1)
- printf(",");
- }
- printf(" : \"r\"(mem)");
-
- printf(");\n");
-
- printf(" printf(\"%c016lx %c016lx\\n\", mem[0], mem[1]);\n", '%', '%');
-
- }
- else if (op_idx == TILEGX_OPC_J)
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"i\"(func_exit));\n");
- }
- else if (op_idx == TILEGX_OPC_JAL)
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"i\"(func_call));\n");
- }
- else if (op_idx == TILEGX_OPC_JR || op_idx == TILEGX_OPC_JRP)
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"r\"(func_exit));\n");
- }
- else if (op_idx == TILEGX_OPC_JALR || op_idx == TILEGX_OPC_JALRP )
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"r\"(func_call));\n");
- }
- else if (op_abnorm[op_idx] & 8)
- {
- // OPC_BXXX conditional branch
- int r = RAND(op_idx) % 51;
- int d = RAND(op_idx) & 1;
- printf(" \"movei r%d, %d\\n\"\n", r, d);
- printf(" \"%s r%d, %c0\\n\"\n", decoded.opcode->name, r, '%');
- printf(" \"jal %c1\\n\"\n", '%');
- printf(" :: \"i\"(func_exit), \"i\"(func_call));\n");
- }
- else
- {
- /* loop for each operand. */
- for (i = 0 ; i < op_num; i++)
- {
- const struct tilegx_operand *opd =
- &tilegx_operands[opc->operands[p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand, pick register 0-50 randomly. */
- decoded.operand_values[i] = RAND(op_idx) % 51;
- int r = decoded.operand_values[i];
- int64_t d = RAND(op_idx);
-
-#ifdef DBG
- printf(" %d) r%-2d %016lx\n", i, (int)r, (unsigned long)d);
-#endif
- int k = 0;
- for (k = 3; k >= 0 ; k--) {
- if (d >> (16 * k) || k == 0) {
- printf(" \"moveli r%d, %d\\n\"\n", r, (int)(d >> (16 * k)));
- for (k--; k >= 0; k--)
- printf(" \"shl16insli r%d, r%d, %d\\n\"\n", r, r, (int)(int16_t)(d >> (16 * k)));
- break;
- }
- }
- } else {
- /* An immediate operand, pick a random value. */
- decoded.operand_values[i] = RAND(op_idx);
-#ifdef DBG
- printf(" %d) %016lx\n", (int)i, (unsigned long)decoded.operand_values[i]);
-#endif
- }
-
- Long op = decoded.operand_values[i];
- decoded.operands[i] = opd;
- ULong x = opd->insert(op);
- insn |= x;
- }
- printf(" \"");
- decode(&insn, 2, 0);
- printf("\\n\"\n");
-
- /* loop for each operand. */
- n = 0;
- for (i = 0 ; i < op_num; i++)
- {
- const struct tilegx_operand *opd =
- &tilegx_operands[opc->operands[p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand */
- printf(" \"move %c%d, r%d\\n\"\n", '%', n, (int)decoded.operand_values[i]);
- n++;
- }
- }
-
- printf(" ");
- if (n)
- printf(":");
- for (i = 0; i < n; i++)
- {
- printf("\"=r\"(a[%d])", i);
- if (i != n - 1)
- printf(",");
- }
-
- printf(");\n");
- }
-
- for (i = 0; i < n; i++)
- {
- printf(" printf(\"%c016lx\\n\", a[%d]);\n", '%', i);
- }
- printf(" return 0;\n");
- printf("}\n");
- return insn;
-}
-
-static tilegx_bundle_bits
-encode_insn_tilegx_Y (int p, struct tilegx_decoded_instruction decoded )
-{
- int i;
- const struct tilegx_opcode *opc =
- decoded.opcode;
- int op_idx = decoded.opcode->mnemonic;
-
- const struct tilegx_operand *opd;
-
- tilegx_bundle_bits insn = 0;
- Int op_num = opc->num_operands;
-
- /* Insert fnop in Y0 and Y1 pipeline. */
- if (p != 0)
- insn |= tilegx_opcodes[TILEGX_OPC_FNOP].
- fixed_bit_values[2];
-
- if (p != 1)
- insn |= tilegx_opcodes[TILEGX_OPC_FNOP].
- fixed_bit_values[3];
-
- /* Fill-in Y2 as dumy load "ld zero, sp" */
- if (p != 2) {
- insn |= tilegx_opcodes[TILEGX_OPC_LD].
- fixed_bit_values[4];
- opd = &tilegx_operands[tilegx_opcodes[TILEGX_OPC_LD].operands[4][0]];
- insn |= opd->insert(63);
- opd = &tilegx_operands[tilegx_opcodes[TILEGX_OPC_LD].operands[4][1]];
- insn |= opd->insert(54);
- }
-#ifdef DBG
- printf(" Y%d, ", p);
-#endif
-
- insn |= opc->fixed_bit_values[2 + p];
-
- printf("//file: _insn_test_%s_Y%d.c\n", decoded.opcode->name, p);
- printf("//op=%d\n", op_idx);
- printf("#include <stdio.h>\n");
- printf("#include <stdlib.h>\n");
-
- printf("\n"
- "void func_exit(void) {\n"
- " printf(\"%cs\\n\", __func__);\n"
- " exit(0);\n"
- "}\n"
- "\n"
- "void func_call(void) {\n"
- " printf(\"%cs\\n\", __func__);\n"
- " exit(0);\n"
- "}\n"
- "\n"
- "unsigned long mem[2] = { 0x%lx, 0x%lx };\n"
- "\n", '%', '%', RAND(op_idx), RAND(op_idx));
-
- printf("int main(void) {\n");
- printf(" unsigned long a[4] = { 0, 0 };\n");
-
- printf(" asm __volatile__ (\n");
-
- int n = 0;
-
- if (op_abnorm[op_idx] & 6)
- {
- /* loop for each operand. */
- for (i = 0 ; i < op_num; i++)
- {
- opd = &tilegx_operands[opc->operands[2 + p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand, pick register 0-53 randomly. */
- decoded.operand_values[i] = RAND(op_idx) % 53;
- int r = decoded.operand_values[i];
- int64_t d = RAND(op_idx);
-#ifdef DBG
- printf(" %d) r%-2d %016lx\n", i, (int)r, (unsigned long)d);
-#endif
- int k = 0;
- for (k = 3; k >= 0 ; k--) {
- if (d >> (16 * k) || k == 0) {
- printf(" \"moveli r%d, %d\\n\"\n", r, (int)(d >> (16 * k)));
- for (k--; k >= 0; k--)
- printf(" \"shl16insli r%d, r%d, %d\\n\"\n", r, r, (int)(int16_t)(d >> (16 * k)));
- break;
- }
- }
- } else {
- /* An immediate operand, pick a random value. */
- decoded.operand_values[i] = RAND(op_idx);
-#ifdef DBG
- printf(" %d) %016lx\n", (int)i, (unsigned long)decoded.operand_values[i]);
-#endif
- }
-
- Long op = decoded.operand_values[i];
- decoded.operands[i] = opd;
- ULong x = opd->insert(op);
- insn |= x;
- }
- printf(" \"");
- if (op_abnorm[op_idx] & 2)
- printf("move r%d, %c2\\n\"\n", (int)decoded.operand_values[1], '%');
- else
- printf("move r%d, %c2\\n\"\n", (int)decoded.operand_values[0], '%');
-
- printf(" \"");
- decode(&insn, 3, 0);
- printf("\\n\"\n");
-
- /* loop for each operand. */
- n = 0;
- for (i = 0 ; i < op_num; i++)
- {
- opd = &tilegx_operands[opc->operands[2 + p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand */
- printf(" \"move %c%d, r%d\\n\"\n", '%', n, (int)decoded.operand_values[i]);
- n++;
- }
- }
-
- printf(" ");
- if (n)
- printf(":");
- for (i = 0; i < n; i++)
- {
- printf("\"=r\"(a[%d])", i);
- if (i != n - 1)
- printf(",");
- }
- printf(" : \"r\"(mem)");
-
- printf(");\n");
-
- printf(" printf(\"%c016lx %c016lx\\n\", mem[0], mem[1]);\n", '%', '%');
-
- }
- else if (op_idx == TILEGX_OPC_J)
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"i\"(func_exit));\n");
- }
- else if (op_idx == TILEGX_OPC_JAL)
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"i\"(func_call));\n");
- }
- else if (op_idx == TILEGX_OPC_JR || op_idx == TILEGX_OPC_JRP)
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"r\"(func_exit));\n");
- }
- else if (op_idx == TILEGX_OPC_JALR || op_idx == TILEGX_OPC_JALRP )
- {
- printf(" \"%s %c0\\n\"\n", decoded.opcode->name, '%');
- printf(" :: \"r\"(func_call));\n");
- }
- else if (op_abnorm[op_idx] & 8)
- {
- // OPC_BXXX conditional branch
- int r = RAND(op_idx) % 51;
- int d = RAND(op_idx) & 1;
- printf(" \"movei r%d, %d\\n\"\n", r, d);
- printf(" \"%s r%d, %c0\\n\"\n", decoded.opcode->name, r, '%');
- printf(" \"jal %c1\\n\"\n", '%');
- printf(" :: \"i\"(func_exit), \"i\"(func_call));\n");
- }
- else
- {
- /* loop for each operand. */
- for (i = 0 ; i < op_num; i++)
- {
- opd = &tilegx_operands[opc->operands[2 + p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand, pick register 0-50 randomly. */
- decoded.operand_values[i] = RAND(op_idx) % 51;
- int r = decoded.operand_values[i];
- int64_t d = RAND(op_idx);
-
-#ifdef DBG
- printf(" %d) r%-2d %016lx\n", i, (int)r, (unsigned long)d);
-#endif
- int k = 0;
- for (k = 3; k >= 0 ; k--) {
- if (d >> (16 * k) || k == 0) {
- printf(" \"moveli r%d, %d\\n\"\n", r, (int)(d >> (16 * k)));
- for (k--; k >= 0; k--)
- printf(" \"shl16insli r%d, r%d, %d\\n\"\n", r, r, (int)(int16_t)(d >> (16 * k)));
- break;
- }
- }
- } else {
- /* An immediate operand, pick a random value. */
- decoded.operand_values[i] = RAND(op_idx);
-#ifdef DBG
- printf(" %d) %016lx\n", (int)i, (unsigned long)decoded.operand_values[i]);
-#endif
- }
-
- Long op = decoded.operand_values[i];
- decoded.operands[i] = opd;
- ULong x = opd->insert(op);
- insn |= x;
- }
- printf(" \"");
- decode(&insn, 3, 0);
- printf("\\n\"\n");
-
- /* loop for each operand. */
- n = 0;
- for (i = 0 ; i < op_num; i++)
- {
- opd = &tilegx_operands[opc->operands[2 + p][i]];
-
- if (opd->type == TILEGX_OP_TYPE_REGISTER) {
- /* A register operand */
- printf(" \"move %c%d, r%d\\n\"\n", '%', n, (int)decoded.operand_values[i]);
- n++;
- }
- }
-
- printf(" ");
- if (n)
- printf(":");
- for (i = 0; i < n; i++)
- {
- printf("\"=r\"(a[%d])", i);
- if (i != n - 1)
- printf(",");
- }
-
- printf(");\n");
- }
-
- for (i = 0; i < n; i++)
- {
- printf(" printf(\"%c016lx\\n\", a[%d]);\n", '%', i);
- }
- printf(" return 0;\n");
- printf("}\n");
- return insn;
-}
-
-static int display_insn ( struct tilegx_decoded_instruction
- decoded[1] )
-{
- int i;
- for (i = 0;
- decoded[i].opcode && (i < 1);
- i++) {
- int n;
- printf("%s ", decoded[i].opcode->name);
-
- for (n = 0; n < decoded[i].opcode->num_operands; n++) {
- const struct tilegx_operand *op = decoded[i].operands[n];
-
- if (op->type == TILEGX_OP_TYPE_REGISTER)
- printf("r%d", (int) decoded[i].operand_values[n]);
- else
- printf("%ld", (unsigned long)decoded[i].operand_values[n]);
-
- if (n != (decoded[i].opcode->num_operands - 1))
- printf(", ");
- }
- printf(" ");
- }
- return i;
-}
-
-int decode( tilegx_bundle_bits *p, int count, ULong pc )
-{
- struct tilegx_decoded_instruction
- decode[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
-
- if (pc) {
- printf("%012llx %016llx ", pc, (ULong)p[0]);
- pc += 8;
- }
- parse_insn_tilegx(p[0], 0, decode);
-
- int k;
-
- printf("{ ");
-
- for(k = 0; decode[k].opcode && (k <TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE);
- k++) {
-
- display_insn(&decode[k]);
- if (--count > 0)
- printf("; ");
- }
-
- printf(" }");
-
- return count;
-}
+++ /dev/null
-#!/bin/bash
-
-FILES=( "5 1 insn_test_move_X0.c"
- "5 2 insn_test_move_X1.c"
- "5 4 insn_test_move_Y0.c"
- "5 8 insn_test_move_Y1.c"
- "6 1 insn_test_movei_X0.c"
- "6 2 insn_test_movei_X1.c"
- "6 4 insn_test_movei_Y0.c"
- "6 8 insn_test_movei_Y1.c"
- "7 1 insn_test_moveli_X0.c"
- "7 2 insn_test_moveli_X1.c"
- "8 2 insn_test_prefetch_X1.c"
- "8 16 insn_test_prefetch_Y2.c"
- "9 2 insn_test_prefetch_add_l1_X1.c"
- "10 2 insn_test_prefetch_add_l1_fault_X1.c"
- "11 2 insn_test_prefetch_add_l2_X1.c"
- "12 2 insn_test_prefetch_add_l2_fault_X1.c"
- "13 2 insn_test_prefetch_add_l3_X1.c"
- "14 2 insn_test_prefetch_add_l3_fault_X1.c"
- "15 2 insn_test_prefetch_l1_X1.c"
- "15 16 insn_test_prefetch_l1_Y2.c"
- "16 2 insn_test_prefetch_l1_fault_X1.c"
- "16 16 insn_test_prefetch_l1_fault_Y2.c"
- "17 2 insn_test_prefetch_l2_X1.c"
- "17 16 insn_test_prefetch_l2_Y2.c"
- "18 2 insn_test_prefetch_l2_fault_X1.c"
- "18 16 insn_test_prefetch_l2_fault_Y2.c"
- "19 2 insn_test_prefetch_l3_X1.c"
- "19 16 insn_test_prefetch_l3_Y2.c"
- "20 2 insn_test_prefetch_l3_fault_X1.c"
- "20 16 insn_test_prefetch_l3_fault_Y2.c"
- "21 2 insn_test_raise_X1.c"
- "22 1 insn_test_add_X0.c"
- "22 2 insn_test_add_X1.c"
- "22 4 insn_test_add_Y0.c"
- "22 8 insn_test_add_Y1.c"
- "23 1 insn_test_addi_X0.c"
- "23 2 insn_test_addi_X1.c"
- "23 4 insn_test_addi_Y0.c"
- "23 8 insn_test_addi_Y1.c"
- "24 1 insn_test_addli_X0.c"
- "24 2 insn_test_addli_X1.c"
- "25 1 insn_test_addx_X0.c"
- "25 2 insn_test_addx_X1.c"
- "25 4 insn_test_addx_Y0.c"
- "25 8 insn_test_addx_Y1.c"
- "26 1 insn_test_addxi_X0.c"
- "26 2 insn_test_addxi_X1.c"
- "26 4 insn_test_addxi_Y0.c"
- "26 8 insn_test_addxi_Y1.c"
- "27 1 insn_test_addxli_X0.c"
- "27 2 insn_test_addxli_X1.c"
- "28 1 insn_test_addxsc_X0.c"
- "28 2 insn_test_addxsc_X1.c"
- "29 1 insn_test_and_X0.c"
- "29 2 insn_test_and_X1.c"
- "29 4 insn_test_and_Y0.c"
- "29 8 insn_test_and_Y1.c"
- "30 1 insn_test_andi_X0.c"
- "30 2 insn_test_andi_X1.c"
- "30 4 insn_test_andi_Y0.c"
- "30 8 insn_test_andi_Y1.c"
- "31 2 insn_test_beqz_X1.c"
- "32 2 insn_test_beqzt_X1.c"
- "33 1 insn_test_bfexts_X0.c"
- "34 1 insn_test_bfextu_X0.c"
- "35 1 insn_test_bfins_X0.c"
- "36 2 insn_test_bgez_X1.c"
- "37 2 insn_test_bgezt_X1.c"
- "38 2 insn_test_bgtz_X1.c"
- "39 2 insn_test_bgtzt_X1.c"
- "40 2 insn_test_blbc_X1.c"
- "41 2 insn_test_blbct_X1.c"
- "42 2 insn_test_blbs_X1.c"
- "43 2 insn_test_blbst_X1.c"
- "44 2 insn_test_blez_X1.c"
- "45 2 insn_test_blezt_X1.c"
- "46 2 insn_test_bltz_X1.c"
- "47 2 insn_test_bltzt_X1.c"
- "48 2 insn_test_bnez_X1.c"
- "49 2 insn_test_bnezt_X1.c"
- "50 1 insn_test_clz_X0.c"
- "50 4 insn_test_clz_Y0.c"
- "51 1 insn_test_cmoveqz_X0.c"
- "51 4 insn_test_cmoveqz_Y0.c"
- "52 1 insn_test_cmovnez_X0.c"
- "52 4 insn_test_cmovnez_Y0.c"
- "53 1 insn_test_cmpeq_X0.c"
- "53 2 insn_test_cmpeq_X1.c"
- "53 4 insn_test_cmpeq_Y0.c"
- "53 8 insn_test_cmpeq_Y1.c"
- "54 1 insn_test_cmpeqi_X0.c"
- "54 2 insn_test_cmpeqi_X1.c"
- "54 4 insn_test_cmpeqi_Y0.c"
- "54 8 insn_test_cmpeqi_Y1.c"
- "55 2 insn_test_cmpexch_X1.c"
- "56 2 insn_test_cmpexch4_X1.c"
- "57 1 insn_test_cmples_X0.c"
- "57 2 insn_test_cmples_X1.c"
- "57 4 insn_test_cmples_Y0.c"
- "57 8 insn_test_cmples_Y1.c"
- "58 1 insn_test_cmpleu_X0.c"
- "58 2 insn_test_cmpleu_X1.c"
- "58 4 insn_test_cmpleu_Y0.c"
- "58 8 insn_test_cmpleu_Y1.c"
- "59 1 insn_test_cmplts_X0.c"
- "59 2 insn_test_cmplts_X1.c"
- "59 4 insn_test_cmplts_Y0.c"
- "59 8 insn_test_cmplts_Y1.c"
- "60 1 insn_test_cmpltsi_X0.c"
- "60 2 insn_test_cmpltsi_X1.c"
- "60 4 insn_test_cmpltsi_Y0.c"
- "60 8 insn_test_cmpltsi_Y1.c"
- "61 1 insn_test_cmpltu_X0.c"
- "61 2 insn_test_cmpltu_X1.c"
- "61 4 insn_test_cmpltu_Y0.c"
- "61 8 insn_test_cmpltu_Y1.c"
- "62 1 insn_test_cmpltui_X0.c"
- "62 2 insn_test_cmpltui_X1.c"
- "63 1 insn_test_cmpne_X0.c"
- "63 2 insn_test_cmpne_X1.c"
- "63 4 insn_test_cmpne_Y0.c"
- "63 8 insn_test_cmpne_Y1.c"
- "64 1 insn_test_cmul_X0.c"
- "65 1 insn_test_cmula_X0.c"
- "66 1 insn_test_cmulaf_X0.c"
- "67 1 insn_test_cmulf_X0.c"
- "68 1 insn_test_cmulfr_X0.c"
- "69 1 insn_test_cmulh_X0.c"
- "70 1 insn_test_cmulhr_X0.c"
- "71 1 insn_test_crc32_32_X0.c"
- "72 1 insn_test_crc32_8_X0.c"
- "73 1 insn_test_ctz_X0.c"
- "73 4 insn_test_ctz_Y0.c"
- "74 1 insn_test_dblalign_X0.c"
- "75 1 insn_test_dblalign2_X0.c"
- "75 2 insn_test_dblalign2_X1.c"
- "76 1 insn_test_dblalign4_X0.c"
- "76 2 insn_test_dblalign4_X1.c"
- "77 1 insn_test_dblalign6_X0.c"
- "77 2 insn_test_dblalign6_X1.c"
- "79 2 insn_test_dtlbpr_X1.c"
- "80 2 insn_test_exch_X1.c"
- "81 2 insn_test_exch4_X1.c"
- "82 1 insn_test_fdouble_add_flags_X0.c"
- "83 1 insn_test_fdouble_addsub_X0.c"
- "84 1 insn_test_fdouble_mul_flags_X0.c"
- "85 1 insn_test_fdouble_pack1_X0.c"
- "86 1 insn_test_fdouble_pack2_X0.c"
- "87 1 insn_test_fdouble_sub_flags_X0.c"
- "88 1 insn_test_fdouble_unpack_max_X0.c"
- "89 1 insn_test_fdouble_unpack_min_X0.c"
- "90 2 insn_test_fetchadd_X1.c"
- "91 2 insn_test_fetchadd4_X1.c"
- "92 2 insn_test_fetchaddgez_X1.c"
- "93 2 insn_test_fetchaddgez4_X1.c"
- "94 2 insn_test_fetchand_X1.c"
- "95 2 insn_test_fetchand4_X1.c"
- "96 2 insn_test_fetchor_X1.c"
- "97 2 insn_test_fetchor4_X1.c"
- "98 2 insn_test_finv_X1.c"
- "99 2 insn_test_flush_X1.c"
- "100 2 insn_test_flushwb_X1.c"
- "101 1 insn_test_fnop_X0.c"
- "101 2 insn_test_fnop_X1.c"
- "101 4 insn_test_fnop_Y0.c"
- "101 8 insn_test_fnop_Y1.c"
- "102 1 insn_test_fsingle_add1_X0.c"
- "103 1 insn_test_fsingle_addsub2_X0.c"
- "104 1 insn_test_fsingle_mul1_X0.c"
- "105 1 insn_test_fsingle_mul2_X0.c"
- "106 1 insn_test_fsingle_pack1_X0.c"
- "106 4 insn_test_fsingle_pack1_Y0.c"
- "107 1 insn_test_fsingle_pack2_X0.c"
- "108 1 insn_test_fsingle_sub1_X0.c"
- "109 2 insn_test_icoh_X1.c"
- "111 2 insn_test_inv_X1.c"
- "113 2 insn_test_j_X1.c"
- "114 2 insn_test_jal_X1.c"
- "115 2 insn_test_jalr_X1.c"
- "115 8 insn_test_jalr_Y1.c"
- "116 2 insn_test_jalrp_X1.c"
- "116 8 insn_test_jalrp_Y1.c"
- "117 2 insn_test_jr_X1.c"
- "117 8 insn_test_jr_Y1.c"
- "118 2 insn_test_jrp_X1.c"
- "118 8 insn_test_jrp_Y1.c"
- "119 2 insn_test_ld_X1.c"
- "119 16 insn_test_ld_Y2.c"
- "120 2 insn_test_ld1s_X1.c"
- "120 16 insn_test_ld1s_Y2.c"
- "121 2 insn_test_ld1s_add_X1.c"
- "122 2 insn_test_ld1u_X1.c"
- "122 16 insn_test_ld1u_Y2.c"
- "123 2 insn_test_ld1u_add_X1.c"
- "124 2 insn_test_ld2s_X1.c"
- "124 16 insn_test_ld2s_Y2.c"
- "125 2 insn_test_ld2s_add_X1.c"
- "126 2 insn_test_ld2u_X1.c"
- "126 16 insn_test_ld2u_Y2.c"
- "127 2 insn_test_ld2u_add_X1.c"
- "128 2 insn_test_ld4s_X1.c"
- "128 16 insn_test_ld4s_Y2.c"
- "129 2 insn_test_ld4s_add_X1.c"
- "130 2 insn_test_ld4u_X1.c"
- "130 16 insn_test_ld4u_Y2.c"
- "131 2 insn_test_ld4u_add_X1.c"
- "132 2 insn_test_ld_add_X1.c"
- "133 2 insn_test_ldna_X1.c"
- "134 2 insn_test_ldna_add_X1.c"
- "135 2 insn_test_ldnt_X1.c"
- "136 2 insn_test_ldnt1s_X1.c"
- "137 2 insn_test_ldnt1s_add_X1.c"
- "138 2 insn_test_ldnt1u_X1.c"
- "139 2 insn_test_ldnt1u_add_X1.c"
- "140 2 insn_test_ldnt2s_X1.c"
- "141 2 insn_test_ldnt2s_add_X1.c"
- "142 2 insn_test_ldnt2u_X1.c"
- "143 2 insn_test_ldnt2u_add_X1.c"
- "144 2 insn_test_ldnt4s_X1.c"
- "145 2 insn_test_ldnt4s_add_X1.c"
- "146 2 insn_test_ldnt4u_X1.c"
- "147 2 insn_test_ldnt4u_add_X1.c"
- "148 2 insn_test_ldnt_add_X1.c"
- "149 2 insn_test_lnk_X1.c"
- "149 8 insn_test_lnk_Y1.c"
- "150 2 insn_test_mf_X1.c"
- "152 1 insn_test_mm_X0.c"
- "153 1 insn_test_mnz_X0.c"
- "153 2 insn_test_mnz_X1.c"
- "153 4 insn_test_mnz_Y0.c"
- "153 8 insn_test_mnz_Y1.c"
- "155 1 insn_test_mul_hs_hs_X0.c"
- "155 4 insn_test_mul_hs_hs_Y0.c"
- "156 1 insn_test_mul_hs_hu_X0.c"
- "157 1 insn_test_mul_hs_ls_X0.c"
- "158 1 insn_test_mul_hs_lu_X0.c"
- "159 1 insn_test_mul_hu_hu_X0.c"
- "159 4 insn_test_mul_hu_hu_Y0.c"
- "160 1 insn_test_mul_hu_ls_X0.c"
- "161 1 insn_test_mul_hu_lu_X0.c"
- "162 1 insn_test_mul_ls_ls_X0.c"
- "162 4 insn_test_mul_ls_ls_Y0.c"
- "163 1 insn_test_mul_ls_lu_X0.c"
- "164 1 insn_test_mul_lu_lu_X0.c"
- "164 4 insn_test_mul_lu_lu_Y0.c"
- "165 1 insn_test_mula_hs_hs_X0.c"
- "165 4 insn_test_mula_hs_hs_Y0.c"
- "166 1 insn_test_mula_hs_hu_X0.c"
- "167 1 insn_test_mula_hs_ls_X0.c"
- "168 1 insn_test_mula_hs_lu_X0.c"
- "169 1 insn_test_mula_hu_hu_X0.c"
- "169 4 insn_test_mula_hu_hu_Y0.c"
- "170 1 insn_test_mula_hu_ls_X0.c"
- "171 1 insn_test_mula_hu_lu_X0.c"
- "172 1 insn_test_mula_ls_ls_X0.c"
- "172 4 insn_test_mula_ls_ls_Y0.c"
- "173 1 insn_test_mula_ls_lu_X0.c"
- "174 1 insn_test_mula_lu_lu_X0.c"
- "174 4 insn_test_mula_lu_lu_Y0.c"
- "175 1 insn_test_mulax_X0.c"
- "175 4 insn_test_mulax_Y0.c"
- "176 1 insn_test_mulx_X0.c"
- "176 4 insn_test_mulx_Y0.c"
- "177 1 insn_test_mz_X0.c"
- "177 2 insn_test_mz_X1.c"
- "177 4 insn_test_mz_Y0.c"
- "177 8 insn_test_mz_Y1.c"
- "179 1 insn_test_nop_X0.c"
- "179 2 insn_test_nop_X1.c"
- "179 4 insn_test_nop_Y0.c"
- "179 8 insn_test_nop_Y1.c"
- "180 1 insn_test_nor_X0.c"
- "180 2 insn_test_nor_X1.c"
- "180 4 insn_test_nor_Y0.c"
- "180 8 insn_test_nor_Y1.c"
- "181 1 insn_test_or_X0.c"
- "181 2 insn_test_or_X1.c"
- "181 4 insn_test_or_Y0.c"
- "181 8 insn_test_or_Y1.c"
- "182 1 insn_test_ori_X0.c"
- "182 2 insn_test_ori_X1.c"
- "183 1 insn_test_pcnt_X0.c"
- "183 4 insn_test_pcnt_Y0.c"
- "184 1 insn_test_revbits_X0.c"
- "184 4 insn_test_revbits_Y0.c"
- "185 1 insn_test_revbytes_X0.c"
- "185 4 insn_test_revbytes_Y0.c"
- "186 1 insn_test_rotl_X0.c"
- "186 2 insn_test_rotl_X1.c"
- "186 4 insn_test_rotl_Y0.c"
- "186 8 insn_test_rotl_Y1.c"
- "187 1 insn_test_rotli_X0.c"
- "187 2 insn_test_rotli_X1.c"
- "187 4 insn_test_rotli_Y0.c"
- "187 8 insn_test_rotli_Y1.c"
- "188 1 insn_test_shl_X0.c"
- "188 2 insn_test_shl_X1.c"
- "188 4 insn_test_shl_Y0.c"
- "188 8 insn_test_shl_Y1.c"
- "189 1 insn_test_shl16insli_X0.c"
- "189 2 insn_test_shl16insli_X1.c"
- "190 1 insn_test_shl1add_X0.c"
- "190 2 insn_test_shl1add_X1.c"
- "190 4 insn_test_shl1add_Y0.c"
- "190 8 insn_test_shl1add_Y1.c"
- "191 1 insn_test_shl1addx_X0.c"
- "191 2 insn_test_shl1addx_X1.c"
- "191 4 insn_test_shl1addx_Y0.c"
- "191 8 insn_test_shl1addx_Y1.c"
- "192 1 insn_test_shl2add_X0.c"
- "192 2 insn_test_shl2add_X1.c"
- "192 4 insn_test_shl2add_Y0.c"
- "192 8 insn_test_shl2add_Y1.c"
- "193 1 insn_test_shl2addx_X0.c"
- "193 2 insn_test_shl2addx_X1.c"
- "193 4 insn_test_shl2addx_Y0.c"
- "193 8 insn_test_shl2addx_Y1.c"
- "194 1 insn_test_shl3add_X0.c"
- "194 2 insn_test_shl3add_X1.c"
- "194 4 insn_test_shl3add_Y0.c"
- "194 8 insn_test_shl3add_Y1.c"
- "195 1 insn_test_shl3addx_X0.c"
- "195 2 insn_test_shl3addx_X1.c"
- "195 4 insn_test_shl3addx_Y0.c"
- "195 8 insn_test_shl3addx_Y1.c"
- "196 1 insn_test_shli_X0.c"
- "196 2 insn_test_shli_X1.c"
- "196 4 insn_test_shli_Y0.c"
- "196 8 insn_test_shli_Y1.c"
- "197 1 insn_test_shlx_X0.c"
- "197 2 insn_test_shlx_X1.c"
- "198 1 insn_test_shlxi_X0.c"
- "198 2 insn_test_shlxi_X1.c"
- "199 1 insn_test_shrs_X0.c"
- "199 2 insn_test_shrs_X1.c"
- "199 4 insn_test_shrs_Y0.c"
- "199 8 insn_test_shrs_Y1.c"
- "200 1 insn_test_shrsi_X0.c"
- "200 2 insn_test_shrsi_X1.c"
- "200 4 insn_test_shrsi_Y0.c"
- "200 8 insn_test_shrsi_Y1.c"
- "201 1 insn_test_shru_X0.c"
- "201 2 insn_test_shru_X1.c"
- "201 4 insn_test_shru_Y0.c"
- "201 8 insn_test_shru_Y1.c"
- "202 1 insn_test_shrui_X0.c"
- "202 2 insn_test_shrui_X1.c"
- "202 4 insn_test_shrui_Y0.c"
- "202 8 insn_test_shrui_Y1.c"
- "203 1 insn_test_shrux_X0.c"
- "203 2 insn_test_shrux_X1.c"
- "204 1 insn_test_shruxi_X0.c"
- "204 2 insn_test_shruxi_X1.c"
- "205 1 insn_test_shufflebytes_X0.c"
- "206 2 insn_test_st_X1.c"
- "206 16 insn_test_st_Y2.c"
- "207 2 insn_test_st1_X1.c"
- "207 16 insn_test_st1_Y2.c"
- "208 2 insn_test_st1_add_X1.c"
- "209 2 insn_test_st2_X1.c"
- "209 16 insn_test_st2_Y2.c"
- "210 2 insn_test_st2_add_X1.c"
- "211 2 insn_test_st4_X1.c"
- "211 16 insn_test_st4_Y2.c"
- "212 2 insn_test_st4_add_X1.c"
- "213 2 insn_test_st_add_X1.c"
- "214 2 insn_test_stnt_X1.c"
- "215 2 insn_test_stnt1_X1.c"
- "216 2 insn_test_stnt1_add_X1.c"
- "217 2 insn_test_stnt2_X1.c"
- "218 2 insn_test_stnt2_add_X1.c"
- "219 2 insn_test_stnt4_X1.c"
- "220 2 insn_test_stnt4_add_X1.c"
- "221 2 insn_test_stnt_add_X1.c"
- "222 1 insn_test_sub_X0.c"
- "222 2 insn_test_sub_X1.c"
- "222 4 insn_test_sub_Y0.c"
- "222 8 insn_test_sub_Y1.c"
- "223 1 insn_test_subx_X0.c"
- "223 2 insn_test_subx_X1.c"
- "223 4 insn_test_subx_Y0.c"
- "223 8 insn_test_subx_Y1.c"
- "224 1 insn_test_subxsc_X0.c"
- "224 2 insn_test_subxsc_X1.c"
- "229 1 insn_test_tblidxb0_X0.c"
- "229 4 insn_test_tblidxb0_Y0.c"
- "230 1 insn_test_tblidxb1_X0.c"
- "230 4 insn_test_tblidxb1_Y0.c"
- "231 1 insn_test_tblidxb2_X0.c"
- "231 4 insn_test_tblidxb2_Y0.c"
- "232 1 insn_test_tblidxb3_X0.c"
- "232 4 insn_test_tblidxb3_Y0.c"
- "233 1 insn_test_v1add_X0.c"
- "233 2 insn_test_v1add_X1.c"
- "234 1 insn_test_v1addi_X0.c"
- "234 2 insn_test_v1addi_X1.c"
- "235 1 insn_test_v1adduc_X0.c"
- "235 2 insn_test_v1adduc_X1.c"
- "236 1 insn_test_v1adiffu_X0.c"
- "237 1 insn_test_v1avgu_X0.c"
- "238 1 insn_test_v1cmpeq_X0.c"
- "238 2 insn_test_v1cmpeq_X1.c"
- "239 1 insn_test_v1cmpeqi_X0.c"
- "239 2 insn_test_v1cmpeqi_X1.c"
- "240 1 insn_test_v1cmples_X0.c"
- "240 2 insn_test_v1cmples_X1.c"
- "241 1 insn_test_v1cmpleu_X0.c"
- "241 2 insn_test_v1cmpleu_X1.c"
- "242 1 insn_test_v1cmplts_X0.c"
- "242 2 insn_test_v1cmplts_X1.c"
- "243 1 insn_test_v1cmpltsi_X0.c"
- "243 2 insn_test_v1cmpltsi_X1.c"
- "244 1 insn_test_v1cmpltu_X0.c"
- "244 2 insn_test_v1cmpltu_X1.c"
- "245 1 insn_test_v1cmpltui_X0.c"
- "245 2 insn_test_v1cmpltui_X1.c"
- "246 1 insn_test_v1cmpne_X0.c"
- "246 2 insn_test_v1cmpne_X1.c"
- "247 1 insn_test_v1ddotpu_X0.c"
- "248 1 insn_test_v1ddotpua_X0.c"
- "249 1 insn_test_v1ddotpus_X0.c"
- "250 1 insn_test_v1ddotpusa_X0.c"
- "251 1 insn_test_v1dotp_X0.c"
- "252 1 insn_test_v1dotpa_X0.c"
- "253 1 insn_test_v1dotpu_X0.c"
- "254 1 insn_test_v1dotpua_X0.c"
- "255 1 insn_test_v1dotpus_X0.c"
- "256 1 insn_test_v1dotpusa_X0.c"
- "257 1 insn_test_v1int_h_X0.c"
- "257 2 insn_test_v1int_h_X1.c"
- "258 1 insn_test_v1int_l_X0.c"
- "258 2 insn_test_v1int_l_X1.c"
- "259 1 insn_test_v1maxu_X0.c"
- "259 2 insn_test_v1maxu_X1.c"
- "260 1 insn_test_v1maxui_X0.c"
- "260 2 insn_test_v1maxui_X1.c"
- "261 1 insn_test_v1minu_X0.c"
- "261 2 insn_test_v1minu_X1.c"
- "262 1 insn_test_v1minui_X0.c"
- "262 2 insn_test_v1minui_X1.c"
- "263 1 insn_test_v1mnz_X0.c"
- "263 2 insn_test_v1mnz_X1.c"
- "264 1 insn_test_v1multu_X0.c"
- "265 1 insn_test_v1mulu_X0.c"
- "266 1 insn_test_v1mulus_X0.c"
- "267 1 insn_test_v1mz_X0.c"
- "267 2 insn_test_v1mz_X1.c"
- "268 1 insn_test_v1sadau_X0.c"
- "269 1 insn_test_v1sadu_X0.c"
- "270 1 insn_test_v1shl_X0.c"
- "270 2 insn_test_v1shl_X1.c"
- "271 1 insn_test_v1shli_X0.c"
- "271 2 insn_test_v1shli_X1.c"
- "272 1 insn_test_v1shrs_X0.c"
- "272 2 insn_test_v1shrs_X1.c"
- "273 1 insn_test_v1shrsi_X0.c"
- "273 2 insn_test_v1shrsi_X1.c"
- "274 1 insn_test_v1shru_X0.c"
- "274 2 insn_test_v1shru_X1.c"
- "275 1 insn_test_v1shrui_X0.c"
- "275 2 insn_test_v1shrui_X1.c"
- "276 1 insn_test_v1sub_X0.c"
- "276 2 insn_test_v1sub_X1.c"
- "277 1 insn_test_v1subuc_X0.c"
- "277 2 insn_test_v1subuc_X1.c"
- "278 1 insn_test_v2add_X0.c"
- "278 2 insn_test_v2add_X1.c"
- "279 1 insn_test_v2addi_X0.c"
- "279 2 insn_test_v2addi_X1.c"
- "280 1 insn_test_v2addsc_X0.c"
- "280 2 insn_test_v2addsc_X1.c"
- "281 1 insn_test_v2adiffs_X0.c"
- "282 1 insn_test_v2avgs_X0.c"
- "283 1 insn_test_v2cmpeq_X0.c"
- "283 2 insn_test_v2cmpeq_X1.c"
- "284 1 insn_test_v2cmpeqi_X0.c"
- "284 2 insn_test_v2cmpeqi_X1.c"
- "285 1 insn_test_v2cmples_X0.c"
- "285 2 insn_test_v2cmples_X1.c"
- "286 1 insn_test_v2cmpleu_X0.c"
- "286 2 insn_test_v2cmpleu_X1.c"
- "287 1 insn_test_v2cmplts_X0.c"
- "287 2 insn_test_v2cmplts_X1.c"
- "288 1 insn_test_v2cmpltsi_X0.c"
- "288 2 insn_test_v2cmpltsi_X1.c"
- "289 1 insn_test_v2cmpltu_X0.c"
- "289 2 insn_test_v2cmpltu_X1.c"
- "290 1 insn_test_v2cmpltui_X0.c"
- "290 2 insn_test_v2cmpltui_X1.c"
- "291 1 insn_test_v2cmpne_X0.c"
- "291 2 insn_test_v2cmpne_X1.c"
- "292 1 insn_test_v2dotp_X0.c"
- "293 1 insn_test_v2dotpa_X0.c"
- "294 1 insn_test_v2int_h_X0.c"
- "294 2 insn_test_v2int_h_X1.c"
- "295 1 insn_test_v2int_l_X0.c"
- "295 2 insn_test_v2int_l_X1.c"
- "296 1 insn_test_v2maxs_X0.c"
- "296 2 insn_test_v2maxs_X1.c"
- "297 1 insn_test_v2maxsi_X0.c"
- "297 2 insn_test_v2maxsi_X1.c"
- "298 1 insn_test_v2mins_X0.c"
- "298 2 insn_test_v2mins_X1.c"
- "299 1 insn_test_v2minsi_X0.c"
- "299 2 insn_test_v2minsi_X1.c"
- "300 1 insn_test_v2mnz_X0.c"
- "300 2 insn_test_v2mnz_X1.c"
- "301 1 insn_test_v2mulfsc_X0.c"
- "302 1 insn_test_v2muls_X0.c"
- "303 1 insn_test_v2mults_X0.c"
- "304 1 insn_test_v2mz_X0.c"
- "304 2 insn_test_v2mz_X1.c"
- "305 1 insn_test_v2packh_X0.c"
- "305 2 insn_test_v2packh_X1.c"
- "306 1 insn_test_v2packl_X0.c"
- "306 2 insn_test_v2packl_X1.c"
- "307 1 insn_test_v2packuc_X0.c"
- "307 2 insn_test_v2packuc_X1.c"
- "308 1 insn_test_v2sadas_X0.c"
- "309 1 insn_test_v2sadau_X0.c"
- "310 1 insn_test_v2sads_X0.c"
- "311 1 insn_test_v2sadu_X0.c"
- "312 1 insn_test_v2shl_X0.c"
- "312 2 insn_test_v2shl_X1.c"
- "313 1 insn_test_v2shli_X0.c"
- "313 2 insn_test_v2shli_X1.c"
- "314 1 insn_test_v2shlsc_X0.c"
- "314 2 insn_test_v2shlsc_X1.c"
- "315 1 insn_test_v2shrs_X0.c"
- "315 2 insn_test_v2shrs_X1.c"
- "316 1 insn_test_v2shrsi_X0.c"
- "316 2 insn_test_v2shrsi_X1.c"
- "317 1 insn_test_v2shru_X0.c"
- "317 2 insn_test_v2shru_X1.c"
- "318 1 insn_test_v2shrui_X0.c"
- "318 2 insn_test_v2shrui_X1.c"
- "319 1 insn_test_v2sub_X0.c"
- "319 2 insn_test_v2sub_X1.c"
- "320 1 insn_test_v2subsc_X0.c"
- "320 2 insn_test_v2subsc_X1.c"
- "321 1 insn_test_v4add_X0.c"
- "321 2 insn_test_v4add_X1.c"
- "322 1 insn_test_v4addsc_X0.c"
- "322 2 insn_test_v4addsc_X1.c"
- "323 1 insn_test_v4int_h_X0.c"
- "323 2 insn_test_v4int_h_X1.c"
- "324 1 insn_test_v4int_l_X0.c"
- "324 2 insn_test_v4int_l_X1.c"
- "325 1 insn_test_v4packsc_X0.c"
- "325 2 insn_test_v4packsc_X1.c"
- "326 1 insn_test_v4shl_X0.c"
- "326 2 insn_test_v4shl_X1.c"
- "327 1 insn_test_v4shlsc_X0.c"
- "327 2 insn_test_v4shlsc_X1.c"
- "328 1 insn_test_v4shrs_X0.c"
- "328 2 insn_test_v4shrs_X1.c"
- "329 1 insn_test_v4shru_X0.c"
- "329 2 insn_test_v4shru_X1.c"
- "330 1 insn_test_v4sub_X0.c"
- "330 2 insn_test_v4sub_X1.c"
- "331 1 insn_test_v4subsc_X0.c"
- "331 2 insn_test_v4subsc_X1.c"
- "332 2 insn_test_wh64_X1.c"
- "333 1 insn_test_xor_X0.c"
- "333 2 insn_test_xor_X1.c"
- "333 4 insn_test_xor_Y0.c"
- "333 8 insn_test_xor_Y1.c"
- "334 1 insn_test_xori_X0.c"
- "334 2 insn_test_xori_X1.c"
-)
-
-if [ $# -gt 0 ]; then
-#fname = "$1"
-
-for f in "${FILES[@]}"
-do
- array=(${f// / })
- if [ ${array[2]} = $1 ]; then
- ./gen_insn_test ${array[0]} ${array[1]} > ${array[2]}
- exit 0
- fi
-done
-
-exit -1
-
-else
-
-for f in "${FILES[@]}"
-do
- echo $i $f
- array=(${f// / })
- ./gen_insn_test ${array[0]} ${array[1]} > ${array[2]}
-done
-
-fi
-
-
-
#if defined(__mips__)
#include <asm/cachectl.h>
#include <sys/syscall.h>
-#elif defined(__tilegx__)
-#include <asm/cachectl.h>
#endif
#include "tests/sys_mman.h"
#if defined(__mips__)
syscall(__NR_cacheflush, a, FN_SIZE * n_fns, ICACHE);
-#elif defined(__tilegx__)
- cacheflush(a, FN_SIZE * n_fns, ICACHE);
#endif
for (h = 0; h < n_reps; h += 1) {
"s390x",
"mips32",
"mips64",
- "tilegx",
NULL
};
#elif defined(VGP_mips64_linux)
if ( 0 == strcmp( arch, "mips64" ) ) return True;
-#elif defined(VGP_tilegx_linux)
- if ( 0 == strcmp( arch, "tilegx" ) ) return True;
-
#else
# error Unknown platform
#endif // VGP_*
projects / thirdparty / valgrind.git / commitdiff
