]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
iommu/vt-d: Update the virtual command related registers
authorLu Baolu <baolu.lu@linux.intel.com>
Wed, 18 Aug 2021 13:48:44 +0000 (21:48 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 18 Sep 2021 11:40:14 +0000 (13:40 +0200)
[ Upstream commit 4d99efb229e63928c6b03a756a2e38cd4777fbe8 ]

The VT-d spec Revision 3.3 updated the virtual command registers, virtual
command opcode B register, virtual command response register and virtual
command capability register (Section 10.4.43, 10.4.44, 10.4.45, 10.4.46).
This updates the virtual command interface implementation in the Intel
IOMMU driver accordingly.

Fixes: 24f27d32ab6b7 ("iommu/vt-d: Enlightened PASID allocation")
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Sanjay Kumar <sanjay.k.kumar@intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20210713042649.3547403-1-baolu.lu@linux.intel.com
Link: https://lore.kernel.org/r/20210818134852.1847070-2-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/iommu/intel/pasid.h
include/linux/intel-iommu.h

index 30cb30046b15e2aa9807a613ab20ebb2e10355c4..35963e6bf9fabb1088d5dfac29b60639e8956388 100644 (file)
 #define VCMD_CMD_ALLOC                 0x1
 #define VCMD_CMD_FREE                  0x2
 #define VCMD_VRSP_IP                   0x1
-#define VCMD_VRSP_SC(e)                        (((e) >> 1) & 0x3)
+#define VCMD_VRSP_SC(e)                        (((e) & 0xff) >> 1)
 #define VCMD_VRSP_SC_SUCCESS           0
-#define VCMD_VRSP_SC_NO_PASID_AVAIL    2
-#define VCMD_VRSP_SC_INVALID_PASID     2
-#define VCMD_VRSP_RESULT_PASID(e)      (((e) >> 8) & 0xfffff)
-#define VCMD_CMD_OPERAND(e)            ((e) << 8)
+#define VCMD_VRSP_SC_NO_PASID_AVAIL    16
+#define VCMD_VRSP_SC_INVALID_PASID     16
+#define VCMD_VRSP_RESULT_PASID(e)      (((e) >> 16) & 0xfffff)
+#define VCMD_CMD_OPERAND(e)            ((e) << 16)
 /*
  * Domain ID reserved for pasid entries programmed for first-level
  * only and pass-through transfer modes.
index c00ee3458a919370045b4665b28c1ad72e7aa343..142ec79cda84fa7162c00e6aeb70823788471de2 100644 (file)
 #define DMAR_MTRR_PHYSMASK8_REG 0x208
 #define DMAR_MTRR_PHYSBASE9_REG 0x210
 #define DMAR_MTRR_PHYSMASK9_REG 0x218
-#define DMAR_VCCAP_REG         0xe00 /* Virtual command capability register */
-#define DMAR_VCMD_REG          0xe10 /* Virtual command register */
-#define DMAR_VCRSP_REG         0xe20 /* Virtual command response register */
+#define DMAR_VCCAP_REG         0xe30 /* Virtual command capability register */
+#define DMAR_VCMD_REG          0xe00 /* Virtual command register */
+#define DMAR_VCRSP_REG         0xe10 /* Virtual command response register */
 
 #define OFFSET_STRIDE          (9)