aarch64: Add support for __pldir intrinsic

This patch adds support for the __pldir intrinsic.
This is a new prefetch intrinsic which declares an
intent to read from an address.
This intrinsic is part of FEAT_PCDPHINT.

gcc/ChangeLog:

	* config/aarch64/aarch64-builtins.cc
	(enum aarch64_builtins): New builtin flag.
	(aarch64_init_pcdphint_builtins): New builtin function.
	(aarch64_expand_pldir_builtin): Expander for new intrinsic.
	(aarch64_general_expand_builtin): Call new expander.
	* config/aarch64/aarch64.md
	(aarch64_pldir): New pattern for instrinsic.
	* config/aarch64/arm_acle.h
	(__attribute__): New call to builtin.
	(__pldir): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pldir.c: New test.

diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index 8ad2c6ec95b726bf3faa500343331e21ebd41f40..a14b44b16e0bf9116a874d398eed7d86e2bf3473 100644 (file)
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -908,6 +908,7 @@ enum aarch64_builtins
   AARCH64_BUILTIN_STSHH_DI,
   AARCH64_BUILTIN_STSHH_SF,
   AARCH64_BUILTIN_STSHH_DF,
+  AARCH64_BUILTIN_PLDIR,
   AARCH64_BUILTIN_MAX
 };
 
@@ -2527,6 +2528,15 @@ aarch64_init_pcdphint_builtins (void)
   aarch64_builtin_decls[AARCH64_BUILTIN_STSHH_DF]
     = aarch64_general_add_builtin ("__builtin_aarch64_stshh_df", ftype,
                                   AARCH64_BUILTIN_STSHH_DF);
+
+  tree cv_argtype = build_qualified_type (void_type_node, TYPE_QUAL_CONST
+                                         | TYPE_QUAL_VOLATILE);
+  cv_argtype = build_pointer_type (cv_argtype);
+
+  ftype = build_function_type_list (void_type_node, cv_argtype, NULL_TREE);
+  aarch64_builtin_decls[AARCH64_BUILTIN_PLDIR]
+    = aarch64_general_add_builtin ("__builtin_aarch64_pldir", ftype,
+                                  AARCH64_BUILTIN_PLDIR);
 }
 
 /* Initialize all builtins in the AARCH64_BUILTIN_GENERAL group.  */
@@ -4082,6 +4092,15 @@ aarch64_expand_stshh_builtin (tree exp, int fcode)
   expand_insn (icode, 4, ops);
 }
 
+void
+aarch64_expand_pldir_builtin (tree exp)
+{
+  expand_operand ops[1];
+  rtx addr = expand_normal (CALL_EXPR_ARG (exp, 0));
+  create_input_operand (&ops[0], addr, Pmode);
+  expand_insn (CODE_FOR_aarch64_pldir, 1, ops);
+}
+
 /* Expand CALL_EXPR EXP, given that it is a call to the function described
    by BUILTIN_DATA, and return the function's return value.  Put the result
    in TARGET if convenient.  */
@@ -4581,6 +4600,12 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target,
     case AARCH64_BUILTIN_STSHH_DF:
       aarch64_expand_stshh_builtin (exp, fcode);
       return target;
+
+    case AARCH64_BUILTIN_PLDIR:
+      {
+       aarch64_expand_pldir_builtin (exp);
+       return target;
+      }
     }
 
   if (fcode >= AARCH64_SIMD_BUILTIN_BASE && fcode <= AARCH64_SIMD_BUILTIN_MAX)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 4bd3d463be1d86be174d2f87769aef9825c3aef4..71458bf78f5cc4d926d7c5e0467daec9a5d75a03 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -371,6 +371,7 @@
     UNSPEC_SYSREG_WDI
     UNSPEC_SYSREG_WTI
     UNSPEC_PLDX
+    UNSPEC_PLDIR
     ;; Represents an SVE-style lane index, in which the indexing applies
     ;; within the containing 128-bit block.
     UNSPEC_SVE_LANE_SELECT
@@ -1337,6 +1338,17 @@
   [(set_attr "type" "load_4")]
 )
 
+(define_insn "aarch64_pldir"
+  [(unspec [(match_operand:DI 0 "aarch64_prefetch_operand" "Dp")]
+            UNSPEC_PLDIR)]
+  ""
+  {
+    operands[0] = gen_rtx_MEM (DImode, operands[0]);
+    return "prfm\\tir, %0";
+  }
+  [(set_attr "type" "load_4")]
+)
+
 (define_insn "aarch64_pldx"
   [(unspec [(match_operand 0 "" "")
            (match_operand:DI 1 "aarch64_prefetch_operand" "Dp")] UNSPEC_PLDX)]

diff --git a/gcc/config/aarch64/arm_acle.h b/gcc/config/aarch64/arm_acle.h
index e01c057b8cb075f5fb21aa419fed12eb05bdaa67..651f4cb8b60d7cb2fe084b12b71bb33230f92078 100644 (file)
--- a/gcc/config/aarch64/arm_acle.h
+++ b/gcc/config/aarch64/arm_acle.h
@@ -108,6 +108,13 @@ __pldx (unsigned int __access, unsigned int __cache, unsigned int __rettn,
   return __builtin_aarch64_pldx (__access, __cache, __rettn, __addr);
 }
 
+__extension__ extern __inline void
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+__pldir (void const volatile *__addr)
+{
+  return __builtin_aarch64_pldir (__addr);
+}
+
 __extension__ extern __inline unsigned long
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __revl (unsigned long __value)

diff --git a/gcc/testsuite/gcc.target/aarch64/pldir.c b/gcc/testsuite/gcc.target/aarch64/pldir.c
new file mode 100644 (file)
index 0000000..341c950
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pldir.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a -O2" } */
+
+#include <arm_acle.h>
+
+void
+prefetch_intent_to_read (void *addr)
+{
+  __pldir (addr);
+}
+
+/* { dg-final { scan-assembler "prfm\tir, \[x\[0-9\]+\]" } } */
\ No newline at end of file