]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
pmdomain: imx: Fix i.MX8MP VC8000E power up sequence
authorPeng Fan <peng.fan@nxp.com>
Wed, 10 Jun 2026 14:39:11 +0000 (22:39 +0800)
committerUlf Hansson <ulfh@kernel.org>
Wed, 8 Jul 2026 15:11:50 +0000 (17:11 +0200)
Per errata[1]:
ERR050531: VPU_NOC power down handshake may hang during VC8000E/VPUMIX
power up/down cycling.
Description: VC8000E reset de-assertion edge and AXI clock may have a
timing issue.
Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
de-asserted by HW)

Add a bool variable is_errata_err050531 in
'struct imx8m_blk_ctrl_domain_data' to represent whether the workaround
is needed. If is_errata_err050531 is true, first clear the clk before
powering up gpc, then enable the clk after powering up gpc.

[1] https://www.nxp.com/webapp/Download?colCode=IMX8MP_1P33A

Fixes: a1a5f15f7f6cb ("soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl")
Cc: stable@vger.kernel.org
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
drivers/pmdomain/imx/imx8m-blk-ctrl.c

index e13a47eeed75d7189aa15370a7bee4cceb05a1d6..99d100e1d923f51122e47775c0ea443ff30105cb 100644 (file)
@@ -54,6 +54,15 @@ struct imx8m_blk_ctrl_domain_data {
         * register.
         */
        u32 mipi_phy_rst_mask;
+
+       /*
+        * VC8000E reset de-assertion edge and AXI clock may have a timing issue.
+        * Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
+        * both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
+        * VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
+        * de-asserted by HW)
+        */
+       bool is_errata_err050531;
 };
 
 #define DOMAIN_MAX_CLKS 4
@@ -108,7 +117,11 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd)
                dev_err(bc->dev, "failed to enable clocks\n");
                goto bus_put;
        }
-       regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+
+       if (data->is_errata_err050531)
+               regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+       else
+               regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
 
        /* power up upstream GPC domain */
        ret = pm_runtime_get_sync(domain->power_dev);
@@ -117,6 +130,9 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd)
                goto clk_disable;
        }
 
+       if (data->is_errata_err050531)
+               regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+
        /* wait for reset to propagate */
        udelay(5);
 
@@ -511,6 +527,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mp_vpu_blk_ctl_domain_data[]
                .clk_mask = BIT(2),
                .path_names = (const char *[]){"vc8000e"},
                .num_paths = 1,
+               .is_errata_err050531 = true,
        },
 };