]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
backport: re PR target/80799 (x86-32 bits generates MMX without EMMS)
authorUros Bizjak <uros@gcc.gnu.org>
Fri, 19 May 2017 18:08:19 +0000 (20:08 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Fri, 19 May 2017 18:08:19 +0000 (20:08 +0200)
Backport from mainline
2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

PR target/80799
* config/i386/mmx.md (*mov<mode>_internal): Enable
alternatives 11, 12, 13 and 14 also for 32bit targets.
Remove alternatives 15, 16, 17 and 18.
* config/i386/sse.md (vec_concatv2di): Change
alternative (!x, *y) to (x, ?!*Yn).

testsuite/ChangeLog:

Backport from mainline
2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

PR target/80799
* g++.dg/other/i386-11.C: New test.

From-SVN: r248297

gcc/ChangeLog
gcc/config/i386/mmx.md
gcc/config/i386/sse.md
gcc/testsuite/ChangeLog
gcc/testsuite/g++.dg/other/i386-11.C [new file with mode: 0644]

index a5c810fbb9f2ef51a2e4fd7677eea845e01e51a9..fa9c6db773ef99255e86aeeb3a0aa6a4fb7a6fb8 100644 (file)
@@ -1,3 +1,15 @@
+2017-05-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline
+       2017-05-18  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/80799
+       * config/i386/mmx.md (*mov<mode>_internal): Enable
+       alternatives 11, 12, 13 and 14 also for 32bit targets.
+       Remove alternatives 15, 16, 17 and 18.
+       * config/i386/sse.md (vec_concatv2di): Change
+       alternative (!x, *y) to (x, ?!*Yn).
+
 2017-05-15  Richard Biener  <rguenther@suse.de>
 
        Revert backport of
        Backport from mainline
        2017-03-30  Martin Jambor  <mjambor@suse.cz>
 
-        PR ipa/77333
-        * cgraph.h (cgraph_build_function_type_skip_args): Declare.
-        * cgraph.c (redirect_call_stmt_to_callee): Set gimple fntype so that
-        it reflects the signature changes performed at the callee side.
-        * cgraphclones.c (build_function_type_skip_args): Make public, renamed
-        to cgraph_build_function_type_skip_args.
-        (build_function_decl_skip_args): Adjust call to the above function.
+       PR ipa/77333
+       * cgraph.h (cgraph_build_function_type_skip_args): Declare.
+       * cgraph.c (redirect_call_stmt_to_callee): Set gimple fntype so that
+       it reflects the signature changes performed at the callee side.
+       * cgraphclones.c (build_function_type_skip_args): Make public, renamed
+       to cgraph_build_function_type_skip_args.
+       (build_function_decl_skip_args): Adjust call to the above function.
 
 2017-04-11  Bin Cheng  <bin.cheng@arm.com>
 
        Backport from mainline
        2016-11-07  Bernd Schmidt  <bschmidt@redhat.com>
 
-        PR rtl-optimization/77309
-        * combine.c (make_compound_operation): Allow EQ for IN_CODE, and
-        don't assume an equality comparison for plain COMPARE.
-        (simplify_comparison): Pass a more accurate code to
-        make_compound_operation.
+       PR rtl-optimization/77309
+       * combine.c (make_compound_operation): Allow EQ for IN_CODE, and
+       don't assume an equality comparison for plain COMPARE.
+       (simplify_comparison): Pass a more accurate code to
+       make_compound_operation.
 
 2016-12-07  Segher Boessenkool  <segher@kernel.crashing.org>
 
index 7b7eb2f1fa31987640c2cf932d56ade222440cdd..12bba44397cf54c020098b170a773d433fc95ac5 100644 (file)
@@ -78,9 +78,9 @@
 
 (define_insn "*mov<mode>_internal"
   [(set (match_operand:MMXMODE 0 "nonimmediate_operand"
-    "=r ,o ,r,r ,m ,?!y,!y,?!y,m  ,r   ,?!Ym,v,v,v,m,*x,*x,*x,m ,r ,Yi,!Ym,*Yi")
+    "=r ,o ,r,r ,m ,?!y,!y,?!y,m  ,r   ,?!Ym,v,v,v,m,r ,Yi,!Ym,*Yi")
        (match_operand:MMXMODE 1 "vector_move_operand"
-    "rCo,rC,C,rm,rC,C  ,!y,m  ,?!y,?!Yn,r   ,C,v,m,v,C ,*x,m ,*x,Yj,r ,*Yj,!Yn"))]
+    "rCo,rC,C,rm,rC,C  ,!y,m  ,?!y,?!Yn,r   ,C,v,m,v,Yj,r ,*Yj,!Yn"))]
   "TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   [(set (attr "isa")
      (cond [(eq_attr "alternative" "0,1")
              (const_string "nox64")
-           (eq_attr "alternative" "2,3,4,9,10,11,12,13,14,19,20")
+           (eq_attr "alternative" "2,3,4,9,10,15,16")
              (const_string "x64")
           ]
           (const_string "*")))
              (const_string "mmx")
            (eq_attr "alternative" "6,7,8,9,10")
              (const_string "mmxmov")
-           (eq_attr "alternative" "11,15")
+           (eq_attr "alternative" "11")
              (const_string "sselog1")
-           (eq_attr "alternative" "21,22")
+           (eq_attr "alternative" "17,18")
              (const_string "ssecvt")
           ]
           (const_string "ssemov")))
    (set (attr "prefix_rex")
-     (if_then_else (eq_attr "alternative" "9,10,19,20")
+     (if_then_else (eq_attr "alternative" "9,10,15,16")
        (const_string "1")
        (const_string "*")))
    (set (attr "prefix")
    (set (attr "mode")
      (cond [(eq_attr "alternative" "2")
              (const_string "SI")
-           (eq_attr "alternative" "11,12,15,16")
+           (eq_attr "alternative" "11,12")
              (cond [(ior (match_operand 0 "ext_sse_reg_operand")
                          (match_operand 1 "ext_sse_reg_operand"))
                        (const_string "XI")
                    ]
                    (const_string "TI"))
 
-           (and (eq_attr "alternative" "13,14,17,18")
+           (and (eq_attr "alternative" "13,14")
                 (ior (match_test "<MODE>mode == V2SFmode")
                      (not (match_test "TARGET_SSE2"))))
              (const_string "V2SF")
index f7f10edf12fa82f49e89c14ebfa7bffcbf4f560a..23e07749977b1b5ab508b9b92e9249777260ffbf 100644 (file)
 ;; movd instead of movq is required to handle broken assemblers.
 (define_insn "vec_concatv2di"
   [(set (match_operand:V2DI 0 "register_operand"
-         "=Yr,*x,x ,Yi,x ,!x,x,x,x,x,x")
+         "=Yr,*x,x ,Yi,x ,x    ,x,x,x,x,x")
        (vec_concat:V2DI
          (match_operand:DI 1 "nonimmediate_operand"
-         "  0, 0,x ,r ,xm,*y,0,x,0,0,x")
+         "  0, 0,x ,r ,xm,?!*Yn,0,x,0,0,x")
          (match_operand:DI 2 "vector_move_operand"
          "*rm,rm,rm,C ,C ,C ,x,x,x,m,m")))]
   "TARGET_SSE"
index 2bd85262f593ee4c750385911b8163de4941a087..776f54702a54d934db8f2d5730c70d5beb6200a0 100644 (file)
@@ -1,3 +1,11 @@
+2017-05-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline
+       2017-05-18  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/80799
+       * g++.dg/other/i386-11.C: New test.
+
 2017-05-15  Richard Biener  <rguenther@suse.de>
 
        Revert backport of
        Backport from mainline
        2017-03-30  Martin Jambor  <mjambor@suse.cz>
 
-        PR ipa/77333
-        * g++.dg/ipa/pr77333.C: New test.
+       PR ipa/77333
+       * g++.dg/ipa/pr77333.C: New test.
 
 2017-04-11  Bin Cheng  <bin.cheng@arm.com>
 
        Backport from mainline
        2016-11-07  Bernd Schmidt  <bschmidt@redhat.com>
 
-        PR rtl-optimization/77309
-        * gcc.dg/torture/pr77309.c: New test.
+       PR rtl-optimization/77309
+       * gcc.dg/torture/pr77309.c: New test.
 
 2016-12-08  Nathan Sidwell  <nathan@acm.org>
 
        * gfortran.dg/extends_type_of_3.f90: Fix and extend the test case.
 
 2016-11-20  Harald Anlauf  <anlauf@gmx.de>
+
        PR fortran/69741
        * gfortran.dg/forall_18.f90: New testcase.
 
diff --git a/gcc/testsuite/g++.dg/other/i386-11.C b/gcc/testsuite/g++.dg/other/i386-11.C
new file mode 100644 (file)
index 0000000..8e06617
--- /dev/null
@@ -0,0 +1,57 @@
+// PR target/80799
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target c++11 }
+// { dg-options "-O2 -msse2" }
+
+#include <xmmintrin.h>
+#include <emmintrin.h>
+
+class alignas(16) GSVector4i
+{
+public:
+    __m128i m;
+
+       explicit GSVector4i(__m128i m)
+       {
+               this->m = m;
+       }
+
+       static void storel(void* p, const GSVector4i& v)
+       {
+               _mm_storel_epi64((__m128i*)p, v.m);
+       }
+
+       static GSVector4i loadl(const void* p)
+       {
+               return GSVector4i(_mm_loadl_epi64((__m128i*)p));
+       }
+
+       bool eq(const GSVector4i& v) const
+       {
+               return _mm_movemask_epi8(_mm_cmpeq_epi32(m, v.m)) == 0xffff;
+       }
+};
+
+
+union GIFRegTRXPOS
+{
+       unsigned long long u64;
+       void operator = (const GSVector4i& v) {GSVector4i::storel(this, v);}
+       bool operator != (const union GIFRegTRXPOS& r) const {return !((GSVector4i)r).eq(*this);}
+       operator GSVector4i() const {return GSVector4i::loadl(this);}
+};
+
+extern void dummy_call();
+extern GIFRegTRXPOS TRXPOS;
+
+void GIFRegHandlerTRXPOS(const GIFRegTRXPOS&  p)
+{
+       if(p != TRXPOS)
+       {
+               dummy_call();
+       }
+
+       TRXPOS = (GSVector4i)p;
+}
+
+// { dg-final { scan-assembler-not "%mm" } }