(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi64_pd (__m256i __A, const int __R)
-{
- return (__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi64_pd (__m256d __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) __A,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi64_pd (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi64_ph (__m256i __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) __A,
- (__v8hf)
- _mm_setzero_ph (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi64_ph (__m128h __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) __A,
- (__v8hf) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi64_ph (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) __A,
- (__v8hf)
- _mm_setzero_ph (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi64_ps (__m256i __A, const int __R)
-{
- return (__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) __A,
- (__v4sf)
- _mm_setzero_ps (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m128
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi64_ps (__m128 __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) __A,
- (__v4sf) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi64_ps (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) __A,
- (__v4sf)
- _mm_setzero_ps (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundpd_epi32 (__m256d __A, const int __R)
-{
- return
- (__m128i) __builtin_ia32_cvttpd2dq256_mask_round ((__v4df) __A,
- (__v4si)
- _mm_undefined_si128 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvtt_roundpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m128i) __builtin_ia32_cvttpd2dq256_mask_round ((__v4df) __A,
- (__v4si) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvtt_roundpd_epi32 (__mmask8 __U, __m256d __A, const int __R)
-{
- return (__m128i) __builtin_ia32_cvttpd2dq256_mask_round ((__v4df) __A,
- (__v4si)
- _mm_setzero_si128 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundpd_epi64 (__m256d __A, const int __R)
-{
- return
- (__m256i) __builtin_ia32_cvttpd2qq256_mask_round ((__v4df) __A,
- (__v4di)
- _mm256_setzero_si256 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvtt_roundpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_cvttpd2qq256_mask_round ((__v4df) __A,
- (__v4di) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvtt_roundpd_epi64 (__mmask8 __U, __m256d __A, const int __R)
-{
- return
- (__m256i) __builtin_ia32_cvttpd2qq256_mask_round ((__v4df) __A,
- (__v4di)
- _mm256_setzero_si256 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundpd_epu32 (__m256d __A, const int __R)
-{
- return
- (__m128i) __builtin_ia32_cvttpd2udq256_mask_round ((__v4df) __A,
- (__v4si)
- _mm_undefined_si128 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvtt_roundpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m128i) __builtin_ia32_cvttpd2udq256_mask_round ((__v4df) __A,
- (__v4si) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvtt_roundpd_epu32 (__mmask8 __U, __m256d __A, const int __R)
-{
- return
- (__m128i) __builtin_ia32_cvttpd2udq256_mask_round ((__v4df) __A,
- (__v4si)
- _mm_setzero_si128 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundpd_epu64 (__m256d __A, const int __R)
-{
- return
- (__m256i) __builtin_ia32_cvttpd2uqq256_mask_round ((__v4df) __A,
- (__v4di) \
- _mm256_setzero_si256 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvtt_roundpd_epu64 (__m256i __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_cvttpd2uqq256_mask_round ((__v4df) __A,
- (__v4di) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvtt_roundpd_epu64 (__mmask8 __U, __m256d __A, const int __R)
-{
- return
- (__m256i) __builtin_ia32_cvttpd2uqq256_mask_round ((__v4df) __A,
- (__v4di)
- _mm256_setzero_si256 (),
- (__mmask8) __U,
- __R);
-}
#else
#define _mm256_add_round_pd(A, B, R) \
((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
(_mm256_setzero_si256 ()), \
(__mmask8) (U), \
(R)))
-
-#define _mm256_cvt_roundepi64_pd(A, R) \
- ((__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) (A), \
- (__v4df) \
- (_mm256_setzero_pd ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvt_roundepi64_pd(W, U, A, R) \
- ((__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) (A), \
- (__v4df) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvt_roundepi64_pd(U, A, R) \
- ((__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) (A), \
- (__v4df) \
- (_mm256_setzero_pd ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_cvt_roundepi64_ph(A, R) \
- ((__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) (A), \
- (__v8hf) \
- (_mm_setzero_ph ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvt_roundepi64_ph(W, U, A, R) \
- ((__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) (A), \
- (__v8hf) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvt_roundepi64_ph(U, A, R) \
- ((__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) (A), \
- (__v8hf) \
- (_mm_setzero_ph ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_cvt_roundepi64_ps(A, R) \
- ((__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) (A), \
- (__v4sf) \
- (_mm_setzero_ps ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvt_roundepi64_ps(W, U, A, R) \
- ((__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) (A), \
- (__v4sf) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvt_roundepi64_ps(U, A, R) \
- ((__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) (A), \
- (__v4sf) \
- (_mm_setzero_ps ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_cvtt_roundpd_epi32(A, R) \
- ((__m128i) __builtin_ia32_cvttpd2dq256_mask_round ((__v4df) (A), \
- (__v4si) \
- (_mm_undefined_si128 ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvtt_roundpd_epi32(W, U, A, R) \
- ((__m128i) __builtin_ia32_cvttpd2dq256_mask_round ((__v4df) (A), \
- (__v4si) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvtt_roundpd_epi32(U, A, R) \
- ((__m128i) __builtin_ia32_cvttpd2dq256_mask_round ((__v4df) (A), \
- (__v4si) \
- (_mm_setzero_si128 ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_cvtt_roundpd_epi64(A, R) \
- ((__m256i) \
- __builtin_ia32_cvttpd2qq256_mask_round ((__v4df) (A), \
- (__v4di) \
- (_mm256_setzero_si256 ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvtt_roundpd_epi64(W, U, A, R) \
- ((__m256i) __builtin_ia32_cvttpd2qq256_mask_round ((__v4df) (A), \
- (__v4di) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvtt_roundpd_epi64(U, A, R) \
- ((__m256i) \
- __builtin_ia32_cvttpd2qq256_mask_round ((__v4df) (A), \
- (__v4di) \
- (_mm256_setzero_si256 ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_cvtt_roundpd_epu32(A, R) \
- ((__m128i) \
- __builtin_ia32_cvttpd2udq256_mask_round ((__v4df) (A), \
- (__v4si) \
- (_mm_undefined_si128 ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvtt_roundpd_epu32(W, U, A, R) \
- ((__m128i) __builtin_ia32_cvttpd2udq256_mask_round ((__v4df) (A), \
- (__v4si) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvtt_roundpd_epu32(U, A, R) \
- ((__m128i) __builtin_ia32_cvttpd2udq256_mask_round ((__v4df) (A), \
- (__v4si) \
- (_mm_setzero_si128 ()), \
- (__mmask8) (U), \
- (R)))
-#define _mm256_cvtt_roundpd_epu64(A, R) \
- ((__m256i) \
- __builtin_ia32_cvttpd2uqq256_mask_round ((__v4df) (A), \
- (__v4di) \
- (_mm256_setzero_si256 ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_cvtt_roundpd_epu64(W, U, A, R) \
- ((__m256i) __builtin_ia32_cvttpd2uqq256_mask_round ((__v4df) (A), \
- (__v4di) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_cvtt_roundpd_epu64(U, A, R) \
- ((__m256i) \
- __builtin_ia32_cvttpd2uqq256_mask_round ((__v4df) (A), \
- (__v4di) \
- (_mm256_setzero_si256 ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_cvtt_roundph_epi32(A, R) \
- ((__m256i) \
- __builtin_ia32_vcvttph2dq256_mask_round ((__v8hf) (A), \
- (__v8si) \
- (_mm256_setzero_si256 ()), \
- (__mmask8) (-1), \
- (R)))
#endif
#ifdef __DISABLE_AVX10_2_256__
DEF_FUNCTION_TYPE (V8HF, V8SF, V8HF, UQI, INT)
DEF_FUNCTION_TYPE (V8SI, V8SF, V8SI, UQI, INT)
DEF_FUNCTION_TYPE (V4DI, V4SF, V4DI, UQI, INT)
-DEF_FUNCTION_TYPE (V4DF, V4DI, V4DF, UQI, INT)
-DEF_FUNCTION_TYPE (V8HF, V4DI, V8HF, UQI, INT)
-DEF_FUNCTION_TYPE (V4SF, V4DI, V4SF, UQI, INT)
DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI, INT)
DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI)
DEF_FUNCTION_TYPE (V16HF, V8SF, V8SF, V16HF, UHI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512dq_cvtps2qqv4di_mask_round, "__builtin_ia32_cvtps2qq256_mask_round", IX86_BUILTIN_VCVTPS2QQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4SF_V4DI_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fixuns_notruncv8sfv8si_mask_round, "__builtin_ia32_cvtps2udq256_mask_round", IX86_BUILTIN_VCVTPS2UDQ256_MASK_ROUND, UNKNOWN, (int) V8SI_FTYPE_V8SF_V8SI_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512dq_cvtps2uqqv4di_mask_round, "__builtin_ia32_cvtps2uqq256_mask_round", IX86_BUILTIN_VCVTPS2UQQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4SF_V4DI_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_floatv4div4df2_mask_round, "__builtin_ia32_cvtqq2pd256_mask_round", IX86_BUILTIN_VCVTQQ2PD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DI_V4DF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtqq2ph_v4di_mask_round, "__builtin_ia32_vcvtqq2ph256_mask_round", IX86_BUILTIN_VCVTQQ2PH256_MASK_ROUND, UNKNOWN, (int) V8HF_FTYPE_V4DI_V8HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_floatv4div4sf2_mask_round, "__builtin_ia32_cvtqq2ps256_mask_round", IX86_BUILTIN_VCVTQQ2PS256_MASK_ROUND, UNKNOWN, (int) V4SF_FTYPE_V4DI_V4SF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_unspec_fix_truncv4dfv4si2_mask_round, "__builtin_ia32_cvttpd2dq256_mask_round", IX86_BUILTIN_VCVTTPD2DQ256_MASK_ROUND, UNKNOWN, (int) V4SI_FTYPE_V4DF_V4SI_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_unspec_fix_truncv4dfv4di2_mask_round, "__builtin_ia32_cvttpd2qq256_mask_round", IX86_BUILTIN_VCVTTPD2QQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4DF_V4DI_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_unspec_fixuns_truncv4dfv4si2_mask_round, "__builtin_ia32_cvttpd2udq256_mask_round", IX86_BUILTIN_VCVTTPD2UDQ256_MASK_ROUND, UNKNOWN, (int) V4SI_FTYPE_V4DF_V4SI_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_unspec_fixuns_truncv4dfv4di2_mask_round, "__builtin_ia32_cvttpd2uqq256_mask_round", IX86_BUILTIN_VCVTTPD2UQQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4DF_V4DI_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvt2ps2phx_v32hf_mask_round, "__builtin_ia32_vcvt2ps2phx512_mask_round", IX86_BUILTIN_VCVT2PS2PHX_V32HF_MASK_ROUND, UNKNOWN, (int) V32HF_FTYPE_V16SF_V16SF_V32HF_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvtph2ibsv32hf_mask_round, "__builtin_ia32_cvtph2ibs512_mask_round", IX86_BUILTIN_CVTPH2IBS512_MASK_ROUND, UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvtph2iubsv32hf_mask_round, "__builtin_ia32_cvtph2iubs512_mask_round", IX86_BUILTIN_CVTPH2IUBS512_MASK_ROUND, UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT)
case V8SF_FTYPE_V8HF_V8SF_UQI_INT:
case V8SI_FTYPE_V8SF_V8SI_UQI_INT:
case V8SI_FTYPE_V8HF_V8SI_UQI_INT:
- case V4DF_FTYPE_V4DI_V4DF_UQI_INT:
case V4DF_FTYPE_V4SF_V4DF_UQI_INT:
case V4DF_FTYPE_V8HF_V4DF_UQI_INT:
case V4DI_FTYPE_V8HF_V4DI_UQI_INT:
case V2DF_FTYPE_V2DF_V2DF_V2DF_INT:
case V4SI_FTYPE_V4DF_V4SI_UQI_INT:
case V4SF_FTYPE_V4DF_V4SF_UQI_INT:
- case V4SF_FTYPE_V4DI_V4SF_UQI_INT:
case V4SF_FTYPE_V4SF_V4SF_V4SF_INT:
case V8HF_FTYPE_V8DI_V8HF_UQI_INT:
case V8HF_FTYPE_V8DF_V8HF_UQI_INT:
case V8HF_FTYPE_V8SF_V8HF_UQI_INT:
case V8HF_FTYPE_V8SI_V8HF_UQI_INT:
case V8HF_FTYPE_V4DF_V8HF_UQI_INT:
- case V8HF_FTYPE_V4DI_V8HF_UQI_INT:
case V16HF_FTYPE_V16SF_V16HF_UHI_INT:
case V16HI_FTYPE_V16BF_V16HI_UHI_INT:
case V8HF_FTYPE_V8HF_V8HF_V8HF_INT:
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
-(define_expand "avx512fp16_vcvt<floatsuffix>qq2ph_v4di_mask_round"
- [(match_operand:V8HF 0 "register_operand")
- (any_float:V4HF (match_operand:V4DI 1 "register_operand"))
- (match_operand:V8HF 2 "nonimm_or_0_operand")
- (match_operand:QI 3 "register_operand")
- (unspec [(match_operand:SI 4 "const_4_or_8_to_11_operand")] UNSPEC_EMBEDDED_ROUNDING)]
- "TARGET_AVX10_2_256"
-{
- emit_insn (gen_avx512fp16_vcvt<floatsuffix>qq2ph_v4di_mask_round_1 (
- operands[0], operands[1], operands[2], operands[3], CONST0_RTX (V4HFmode), operands[4]));
- DONE;
-})
-
(define_expand "avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask"
[(set (match_operand:V8HF 0 "register_operand" "=v")
(vec_concat:V8HF
"TARGET_AVX512FP16 && TARGET_AVX512VL"
"operands[4] = CONST0_RTX (V4HFmode);")
-(define_insn "avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask<round_name>_1"
+(define_insn "*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask"
[(set (match_operand:V8HF 0 "register_operand" "=v")
(vec_concat:V8HF
(vec_merge:V4HF
- (any_float:V4HF (match_operand:VI4_128_8_256 1 "<round_nimm_predicate>" "<round_constraint>"))
+ (any_float:V4HF (match_operand:VI4_128_8_256 1 "vector_operand" "vm"))
(vec_select:V4HF
(match_operand:V8HF 2 "nonimm_or_0_operand" "0C")
(parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3)]))
(match_operand:QI 3 "register_operand" "Yk"))
(match_operand:V4HF 4 "const0_operand")))]
- "TARGET_AVX512FP16 && TARGET_AVX512VL && <round_mode_condition>"
- "vcvt<floatsuffix><sseintconvert>2ph<round_qq2phsuff>\t{<round_op5>%1, %0%{%3%}%N2|%0%{%3%}%N2, %1<round_op5>}"
+ "TARGET_AVX512FP16 && TARGET_AVX512VL"
+ "vcvt<floatsuffix><sseintconvert>2ph<qq2phsuff>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
[(set (match_operand:VF2_AVX512VL 0 "register_operand" "=v")
(any_float:VF2_AVX512VL
(match_operand:<sseintvecmode> 1 "nonimmediate_operand" "<round_constraint>")))]
- "TARGET_AVX512DQ && <round_mode_condition>"
+ "TARGET_AVX512DQ"
"vcvt<floatsuffix>qq2pd\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "evex")
(any_float:<ssePSmode2>
(match_operand:VI8_256_512 1 "nonimmediate_operand" "<round_constraint>")))]
"TARGET_AVX512DQ && <round_mode_condition>"
- "vcvt<floatsuffix>qq2ps<round_qq2pssuff>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
+ "vcvt<floatsuffix>qq2ps<qq2pssuff>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
(set_attr "prefix" "evex")
(set_attr "mode" "TI")])
-(define_insn "unspec_fix_truncv4dfv4si2<mask_name><round_saeonly_name>"
+(define_insn "unspec_fix_truncv4dfv4si2<mask_name>"
[(set (match_operand:V4SI 0 "register_operand" "=v")
- (unspec:V4SI [(match_operand:V4DF 1 "<round_saeonly_nimm_predicate>" "<round_saeonly_constraint>")]
+ (unspec:V4SI [(match_operand:V4DF 1 "nonimmediate_operand" "vm")]
UNSPEC_VCVTT))]
- "TARGET_AVX && <mask_avx512vl_condition>
- && (!<round_saeonly_applied> || TARGET_AVX10_2_256)"
- "vcvttpd2dq<round_saeonly_suff>\t{<round_saeonly_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_saeonly_mask_op2>}"
+ "TARGET_AVX || (TARGET_AVX512VL && TARGET_AVX512F)"
+ "vcvttpd2dq{y}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "OI")])
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "OI")])
-(define_insn "unspec_fixuns_truncv4dfv4si2<mask_name><round_saeonly_name>"
+(define_insn "unspec_fixuns_truncv4dfv4si2<mask_name>"
[(set (match_operand:V4SI 0 "register_operand" "=v")
- (unspec:V4SI [(match_operand:V4DF 1 "<round_saeonly_nimm_predicate>" "<round_saeonly_constraint>")]
+ (unspec:V4SI [(match_operand:V4DF 1 "nonimmediate_operand" "vm")]
UNSPEC_VCVTTU))]
- "TARGET_AVX512VL && TARGET_AVX512F
- && (!<round_saeonly_applied> || TARGET_AVX10_2_256)"
- "vcvttpd2udq<round_saeonly_suff>\t{<round_saeonly_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_saeonly_mask_op2>}"
+ "TARGET_AVX512VL && TARGET_AVX512F"
+ "vcvttpd2udq{y}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "OI")])
(define_subst_attr "round_constraint" "round" "vm" "v")
(define_subst_attr "round_suff" "round" "{y}" "")
(define_subst_attr "round_qq2phsuff" "round" "<qq2phsuff>" "")
-(define_subst_attr "round_qq2pssuff" "round" "<qq2pssuff>" "")
(define_subst_attr "round_pd2udqsuff" "round" "<pd2udqsuff>" "")
(define_subst_attr "bcst_round_constraint" "round" "vmBr" "v")
(define_subst_attr "round_constraint2" "round" "m" "v")
(define_subst_attr "round_saeonly_constraint2" "round_saeonly" "m" "v")
(define_subst_attr "round_saeonly_nimm_predicate" "round_saeonly" "vector_operand" "register_operand")
(define_subst_attr "round_saeonly_nimm_scalar_predicate" "round_saeonly" "nonimmediate_operand" "register_operand")
-(define_subst_attr "round_saeonly_suff" "round_saeonly" "{y}" "")
(define_subst_attr "round_saeonly_mode_condition" "round_saeonly" "1" "((<MODE>mode == V16SFmode
|| <MODE>mode == V8DFmode
|| <MODE>mode == V8DImode
#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
-/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-
-#include <immintrin.h>
-
-volatile __m128 hx;
-volatile __m128i hxi;
-volatile __m128h hxh;
-volatile __m256 x;
-volatile __m256d xd;
-volatile __m256h xh;
-volatile __m256i xi;
-volatile __mmask8 m8;
-volatile __mmask16 m16;
-volatile __mmask32 m32;
-
-void extern
-avx10_2_test_1 (void)
-{
- xd = _mm256_cvt_roundepi64_pd (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
- xd = _mm256_mask_cvt_roundepi64_pd (xd, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
- xd = _mm256_maskz_cvt_roundepi64_pd (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
-
- hxh = _mm256_cvt_roundepi64_ph (xi, 4);
- hxh = _mm256_mask_cvt_roundepi64_ph (hxh, m8, xi, 8);
- hxh = _mm256_maskz_cvt_roundepi64_ph (m8, xi, 11);
-
- hx = _mm256_cvt_roundepi64_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
- hx = _mm256_mask_cvt_roundepi64_ps (hx, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
- hx = _mm256_maskz_cvt_roundepi64_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
-}
-
-void extern
-avx10_2_test_2 (void)
-{
- hxi = _mm256_cvtt_roundpd_epi32 (xd, _MM_FROUND_NO_EXC);
- hxi = _mm256_mask_cvtt_roundpd_epi32 (hxi, m8, xd, _MM_FROUND_NO_EXC);
- hxi = _mm256_maskz_cvtt_roundpd_epi32 (m8, xd, _MM_FROUND_NO_EXC);
-
- xi = _mm256_cvtt_roundpd_epi64 (xd, _MM_FROUND_NO_EXC);
- xi = _mm256_mask_cvtt_roundpd_epi64 (xi, m8, xd, _MM_FROUND_NO_EXC);
- xi = _mm256_maskz_cvtt_roundpd_epi64 (m8, xd, _MM_FROUND_NO_EXC);
-
- hxi = _mm256_cvtt_roundpd_epu32 (xd, _MM_FROUND_NO_EXC);
- hxi = _mm256_mask_cvtt_roundpd_epu32 (hxi, m8, xd, _MM_FROUND_NO_EXC);
- hxi = _mm256_maskz_cvtt_roundpd_epu32 (m8, xd, _MM_FROUND_NO_EXC);
-
- xi = _mm256_cvtt_roundpd_epu64 (xd, _MM_FROUND_NO_EXC);
- xi = _mm256_mask_cvtt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_NO_EXC);
- xi = _mm256_maskz_cvtt_roundpd_epu64 (m8, xd, _MM_FROUND_NO_EXC);
-}
#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
test_1 (_mm256_cvt_roundps_epu32, __m256i, __m256, 9)
test_1 (_mm256_cvt_roundps_epi64, __m256i, __m128, 8)
test_1 (_mm256_cvt_roundps_epu64, __m256i, __m128, 8)
-test_1 (_mm256_cvt_roundepi64_pd, __m256d, __m256i, 8)
-test_1 (_mm256_cvt_roundepi64_ph, __m128h, __m256i, 8)
-test_1 (_mm256_cvt_roundepi64_ps, __m128, __m256i, 8)
-test_1 (_mm256_cvtt_roundpd_epi32, __m128i, __m256d, 8)
-test_1 (_mm256_cvtt_roundpd_epi64, __m256i, __m256d, 8)
-test_1 (_mm256_cvtt_roundpd_epu32, __m128i, __m256d, 8)
-test_1 (_mm256_cvtt_roundpd_epu64, __m256i, __m256d, 8)
test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
test_2 (_mm256_maskz_cvt_roundps_epu32, __m256i, __mmask8, __m256, 9)
test_2 (_mm256_maskz_cvt_roundps_epi64, __m256i, __mmask8, __m128, 8)
test_2 (_mm256_maskz_cvt_roundps_epu64, __m256i, __mmask8, __m128, 8)
-test_2 (_mm256_maskz_cvt_roundepi64_pd, __m256d, __mmask8, __m256i, 8)
-test_2 (_mm256_maskz_cvt_roundepi64_ph, __m128h, __mmask8, __m256i, 8)
-test_2 (_mm256_maskz_cvt_roundepi64_ps, __m128, __mmask8, __m256i, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epi32, __m128i, __mmask8, __m256d, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epi64, __m256i, __mmask8, __m256d, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epu32, __m128i, __mmask8, __m256d, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epu64, __m256i, __mmask8, __m256d, 8)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
test_3 (_mm256_mask_cvt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 9)
test_3 (_mm256_mask_cvt_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8)
test_3 (_mm256_mask_cvt_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8)
-test_3 (_mm256_mask_cvt_roundepi64_pd, __m256d, __m256d, __mmask8, __m256i, 8)
-test_3 (_mm256_mask_cvt_roundepi64_ph, __m128h, __m128h, __mmask8, __m256i, 8)
-test_3 (_mm256_mask_cvt_roundepi64_ps, __m128, __m128, __mmask8, __m256i, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
test_1 (_mm256_cvt_roundps_epu32, __m256i, __m256, 9)
test_1 (_mm256_cvt_roundps_epi64, __m256i, __m128, 8)
test_1 (_mm256_cvt_roundps_epu64, __m256i, __m128, 8)
-test_1 (_mm256_cvt_roundepi64_pd, __m256d, __m256i, 8)
-test_1 (_mm256_cvt_roundepi64_ph, __m128h, __m256i, 8)
-test_1 (_mm256_cvt_roundepi64_ps, __m128, __m256i, 8)
-test_1 (_mm256_cvtt_roundpd_epi32, __m128i, __m256d, 8)
-test_1 (_mm256_cvtt_roundpd_epi64, __m256i, __m256d, 8)
-test_1 (_mm256_cvtt_roundpd_epu32, __m128i, __m256d, 8)
-test_1 (_mm256_cvtt_roundpd_epu64, __m256i, __m256d, 8)
test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
test_2 (_mm256_maskz_cvt_roundps_epu32, __m256i, __mmask8, __m256, 9)
test_2 (_mm256_maskz_cvt_roundps_epi64, __m256i, __mmask8, __m128, 8)
test_2 (_mm256_maskz_cvt_roundps_epu64, __m256i, __mmask8, __m128, 8)
-test_2 (_mm256_maskz_cvt_roundepi64_pd, __m256d, __mmask8, __m256i, 8)
-test_2 (_mm256_maskz_cvt_roundepi64_ph, __m128h, __mmask8, __m256i, 8)
-test_2 (_mm256_maskz_cvt_roundepi64_ps, __m128, __mmask8, __m256i, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epi32, __m128i, __mmask8, __m256d, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epi64, __m256i, __mmask8, __m256d, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epu32, __m128i, __mmask8, __m256d, 8)
-test_2 (_mm256_maskz_cvtt_roundpd_epu64, __m256i, __mmask8, __m256d, 8)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
test_3 (_mm256_mask_cvt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 9)
test_3 (_mm256_mask_cvt_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8)
test_3 (_mm256_mask_cvt_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8)
-test_3 (_mm256_mask_cvt_roundepi64_pd, __m256d, __m256d, __mmask8, __m256i, 8)
-test_3 (_mm256_mask_cvt_roundepi64_ph, __m128h, __m128h, __mmask8, __m256i, 8)
-test_3 (_mm256_mask_cvt_roundepi64_ps, __m128, __m128, __mmask8, __m256i, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8)
-test_3 (_mm256_mask_cvtt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8)
-#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
projects / thirdparty / gcc.git / commitdiff
