s390 disasm-test: Add --all-except-exrl command line option.

EX and EXRL need special scaffolding and treatment.

Part of fixing https://bugs.kde.org/show_bug.cgi?id=510840

diff --git a/none/tests/s390x/disasm-test/README b/none/tests/s390x/disasm-test/README
index a3b4ea4e2b06b2b88d53a3ede4db04f5253d5b4f..ef8904323f9c6488ad8aac9a1eea061b8b4e0756 100644 (file)
--- a/none/tests/s390x/disasm-test/README
+++ b/none/tests/s390x/disasm-test/README
@@ -24,7 +24,10 @@ See disasm-test --help for the most up-to-date instructions.
 
 disasm-test --all
   For all opcodes known to disasm-test, generate testcases and
-  verify the disassembly. This is how disasm-test is invoked
+  verify the disassembly.
+
+disasm-test --all-except-exrl
+  As the option name suggests. This is how disasm-test is invoked
   during regression testing.
 
 disasm-test --generate OPCODE_NAMEs
@@ -147,8 +150,8 @@ Status
 All opcodes which are implemented in valgrind are considered.
 
 
-TODO
-----
+NOTES
+-----
 (1) Testcase generation for the "Rotate and ..." family of opcodes needs
     to be improved. Several interesting cases involving the T- and Z-bit
     are not considered.
@@ -179,3 +182,7 @@ TODO
 
 (5) For D20XB and D12XB operands add a test with B == X and B != 0
     Not exactly easy to do.
+
+(6) For objdump-based disassembly the offset in the EXRL insn is expected
+    to denote a decodable insn. This is obviously not the case here and
+    therefore causing a miscompare.

diff --git a/none/tests/s390x/disasm-test/disasm-test.post.exp b/none/tests/s390x/disasm-test/disasm-test.post.exp
index bd879085512501c601f72e52d0aa4a5671eb2151..2e0d1b893ddc69a87efb5d3435f9cad6197f1bb1 100644 (file)
--- a/none/tests/s390x/disasm-test/disasm-test.post.exp
+++ b/none/tests/s390x/disasm-test/disasm-test.post.exp
@@ -1,4 +1,4 @@
-Total: 148764 tests generated
-Total: 148672 insns verified
+Total: 148757 tests generated
+Total: 148665 insns verified
 Total:      0 disassembly mismatches
 Total:     92 specification exceptions

diff --git a/none/tests/s390x/disasm-test/disasm-test.vgtest b/none/tests/s390x/disasm-test/disasm-test.vgtest
index 9f7f9997b03219d16556f9afa395a97e85bd44c3..9def1926ca166d9e539330504aa4aa1b12820020 100644 (file)
--- a/none/tests/s390x/disasm-test/disasm-test.vgtest
+++ b/none/tests/s390x/disasm-test/disasm-test.vgtest
@@ -4,4 +4,4 @@
 #
 prereq: ./disasm-test --check-prereq
 prog: /bin/true
-post: ./disasm-test --all --summary
+post: ./disasm-test --all-except-exrl --summary

diff --git a/none/tests/s390x/disasm-test/main.c b/none/tests/s390x/disasm-test/main.c
index 7805a1859d861e187a439488d4f4f2bb40d01b93..6d8f8353b82e435f8b07a26faba08309a70f9ec3 100644 (file)
--- a/none/tests/s390x/disasm-test/main.c
+++ b/none/tests/s390x/disasm-test/main.c
@@ -84,7 +84,7 @@ static int summary = 0;
 int
 main(int argc, char *argv[])
 {
-   int all = 0, verify = 0, generate = 0, unit_test = 0;
+   int all = 0, verify = 0, generate = 0, unit_test = 0, all_except_exrl = 0;
    int num_clargs = 0;
    int run = 0, check_prereq = 0;
    const char *clargs[argc];
@@ -105,6 +105,9 @@ main(int argc, char *argv[])
          verify = 1;
       } else if (CHECK_CLO(clo, "--generate")) {
          generate = 1;
+      } else if (CHECK_CLO(clo, "--all-except-exrl")) {
+         all = 1;
+         all_except_exrl = 1;
       } else if (CHECK_CLO(clo, "--all")) {
          all = 1;
       } else if (CHECK_CLO(clo, "--verbose")) {
@@ -230,6 +233,9 @@ main(int argc, char *argv[])
       for (int i = 0; i < num_opcodes; ++i) {
          opcode *opc = get_opcode_by_index(i); // never NULL
 
+         if (all_except_exrl && strcmp(opc->name, "exrl") == 0)
+            continue;
+
          if (opcode_has_errors(opc)) {
             error("Opcode '%s' ignored due to syntax errors\n",
                   opc->name);

diff --git a/none/tests/s390x/disasm-test/vex.c b/none/tests/s390x/disasm-test/vex.c
index 7d80ceadd2956374145becad9da8d80949350fb9..bb850b8eb1e56daf705970dfd2b73d1a663e35b1 100644 (file)
--- a/none/tests/s390x/disasm-test/vex.c
+++ b/none/tests/s390x/disasm-test/vex.c
@@ -119,8 +119,9 @@ vex_reset(void)
       dis_irsb = emptyIRSB();
    }
 
-   /* Otherwise we won't make it through s390_irgen_EXRL. */
-   last_execute_target = 42;
+   /* Otherwise we won't make it through s390_irgen_EX. */
+#define Invalid_execute_target 1
+   last_execute_target = Invalid_execute_target;
 }