Support DMB and DSB variants on ARM. Bug 266035 comment 3.

(Jeff Brown, jeffbrown@google.com)

git-svn-id: svn://svn.valgrind.org/vex/trunk@2143

diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c
index 1a3c70944d9a7c353e2e063014d9ddb3a3c08215..24b260bdc01cc0bb76011d755416177cc26a24e3 100644 (file)
--- a/VEX/priv/guest_arm_toIR.c
+++ b/VEX/priv/guest_arm_toIR.c
@@ -11942,11 +11942,25 @@ static Bool decode_NV_instruction ( /*MOD*/DisResult* dres,
          stmt( IRStmt_MBE(Imbe_Fence) );
          DIP("ISB\n");
          return True;
-      case 0xF57FF04F: /* DSB */
+      case 0xF57FF04F: /* DSB sy */
+      case 0xF57FF04E: /* DSB st */
+      case 0xF57FF04B: /* DSB ish */
+      case 0xF57FF04A: /* DSB ishst */
+      case 0xF57FF047: /* DSB nsh */
+      case 0xF57FF046: /* DSB nshst */
+      case 0xF57FF043: /* DSB osh */
+      case 0xF57FF042: /* DSB oshst */
          stmt( IRStmt_MBE(Imbe_Fence) );
          DIP("DSB\n");
          return True;
-      case 0xF57FF05F: /* DMB */
+      case 0xF57FF05F: /* DMB sy */
+      case 0xF57FF05E: /* DMB st */
+      case 0xF57FF05B: /* DMB ish */
+      case 0xF57FF05A: /* DMB ishst */
+      case 0xF57FF057: /* DMB nsh */
+      case 0xF57FF056: /* DMB nshst */
+      case 0xF57FF053: /* DMB osh */
+      case 0xF57FF052: /* DMB oshst */
          stmt( IRStmt_MBE(Imbe_Fence) );
          DIP("DMB\n");
          return True;