]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
PCI: dwc: ep: Fix MSI-X Table Size configuration in dw_pcie_ep_set_msix()
authorAksh Garg <a-garg7@ti.com>
Tue, 24 Feb 2026 08:38:16 +0000 (14:08 +0530)
committerManivannan Sadhasivam <mani@kernel.org>
Mon, 9 Mar 2026 06:29:58 +0000 (11:59 +0530)
In dw_pcie_ep_set_msix(), while updating the MSI-X Table Size value for
individual functions, Message Control register is read from the passed
function number register space using dw_pcie_ep_readw_dbi(), but always
written back to the Function 0's register space using dw_pcie_writew_dbi().
This causes incorrect MSI-X configuration for the rest of the functions,
other than Function 0.

Fix this by using dw_pcie_ep_writew_dbi() to write to the correct
function's register space, matching the read operation.

Fixes: 70fa02ca1446 ("PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers")
Signed-off-by: Aksh Garg <a-garg7@ti.com>
[mani: commit log]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Link: https://patch.msgid.link/20260224083817.916782-2-a-garg7@ti.com
drivers/pci/controller/dwc/pcie-designware-ep.c

index 295076cf70de9768e4b34bd85fde86282b6783bb..709ab60c9e39823be1b492731fdaae28028cf25f 100644 (file)
@@ -754,7 +754,7 @@ static int dw_pcie_ep_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
        val = dw_pcie_ep_readw_dbi(ep, func_no, reg);
        val &= ~PCI_MSIX_FLAGS_QSIZE;
        val |= nr_irqs - 1; /* encoded as N-1 */
-       dw_pcie_writew_dbi(pci, reg, val);
+       dw_pcie_ep_writew_dbi(ep, func_no, reg, val);
 
        reg = ep_func->msix_cap + PCI_MSIX_TABLE;
        val = offset | bir;