qualcommax: ipq50xx: prepare for UNIPHY reset fix

Ahead of the actual fix in both the GCC and QCA-SSDK, add the required
AHB reset so it can be picked up by updated QCA-SSDK. This is needed
as the SSDK needs to use different resets depending on the link
architecture. If it's a fixed link, AHB needs to be reset. In a phy to
phy link setup (such as QCA8081), SYS, RX, and TX need to be reset using
one reset with a bitmask in the GCC (GCC_UNIPHY_SOFT_RESET).

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18774
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ess.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ess.dtsi
index a42b7bbeaa32abb1291bea3d1976a15495c8ac20..384d7e36f53c1e3745dfc497e1475ef7d81b99d1 100644 (file)
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ess.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ess.dtsi
@@ -59,10 +59,12 @@
                        resets = <&gcc GCC_GMAC0_BCR>,
                                 <&gcc GCC_GMAC1_BCR>,
                                 <&gcc GCC_UNIPHY_BCR>,
+                                <&gcc GCC_UNIPHY_AHB_ARES>,
                                 <&gcc GCC_UNIPHY_SOFT_RESET>;
                        reset-names = "gmac0_bcr_rst",
                                      "gmac1_bcr_rst",
                                      "uniphy_bcr_rst",
+                                     "uniphy1_ahb_rst",
                                      "uniphy1_soft_rst";
 
                        status = "disabled";