]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
media: qcom: camss: add support for SM6150 camss
authorWenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Mon, 12 Jan 2026 08:04:53 +0000 (16:04 +0800)
committerHans Verkuil <hverkuil+cisco@kernel.org>
Tue, 13 Jan 2026 09:25:01 +0000 (10:25 +0100)
The camera subsystem for SM6150 which is based on Spectra 230.

For SM6150:
- VFE and CSID version: 170 (vfe170, csid170)
- CSIPHY version: csiphy-v2.0.1 (14nm)

Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
drivers/media/platform/qcom/camss/camss-vfe.c
drivers/media/platform/qcom/camss/camss.c
drivers/media/platform/qcom/camss/camss.h

index d70d4f6117988263f81b9f79c62829c4b3a51b5c..4154832745525972a663809c947a9e9aeca9f944 100644 (file)
@@ -1010,6 +1010,7 @@ static bool csiphy_is_gen2(u32 version)
 
        switch (version) {
        case CAMSS_2290:
+       case CAMSS_6150:
        case CAMSS_7280:
        case CAMSS_8250:
        case CAMSS_8280XP:
@@ -1100,6 +1101,7 @@ static int csiphy_init(struct csiphy_device *csiphy)
                regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845);
                break;
        case CAMSS_2290:
+       case CAMSS_6150:
                regs->lane_regs = &lane_regs_qcm2290[0];
                regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290);
                break;
index 9c7ad8aa405888ccea283ffd5cb038fc5bc4ee79..5baf0e3d4bc461df28d8dcf97a98dec04fa17ceb 100644 (file)
@@ -342,6 +342,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
                break;
        case CAMSS_660:
        case CAMSS_2290:
+       case CAMSS_6150:
        case CAMSS_7280:
        case CAMSS_8x96:
        case CAMSS_8250:
@@ -2001,6 +2002,7 @@ static int vfe_bpl_align(struct vfe_device *vfe)
        int ret = 8;
 
        switch (vfe->camss->res->version) {
+       case CAMSS_6150:
        case CAMSS_7280:
        case CAMSS_8250:
        case CAMSS_8280XP:
index 7f44b60bcd72cd09b2a75688af4eada85f5f2b0c..00b87fd9afbd89871ffaee9cb2b2db6538e1d70d 100644 (file)
@@ -1519,6 +1519,190 @@ static const struct camss_subdev_resources vfe_res_845[] = {
        }
 };
 
+static const struct camss_subdev_resources csiphy_res_sm6150[] = {
+       /* CSIPHY0 */
+       {
+               .regulators = {
+                       { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+                       { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+               },
+               .clock = { "csiphy0", "csiphy0_timer" },
+               .clock_rate = { { 269333333, 384000000 },
+                               { 269333333 } },
+               .reg = { "csiphy0" },
+               .interrupt = { "csiphy0" },
+               .csiphy = {
+                       .id = 0,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845
+               }
+       },
+       /* CSIPHY1 */
+       {
+               .regulators = {
+                       { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+                       { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+               },
+               .clock = { "csiphy1", "csiphy1_timer" },
+               .clock_rate = { { 269333333, 384000000 },
+                               { 269333333 } },
+               .reg = { "csiphy1" },
+               .interrupt = { "csiphy1" },
+               .csiphy = {
+                       .id = 1,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845
+               }
+       },
+       /* CSIPHY2 */
+       {
+               .regulators = {
+                       { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+                       { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+               },
+               .clock = { "csiphy2", "csiphy2_timer" },
+               .clock_rate = { { 269333333, 384000000 },
+                               { 269333333 } },
+               .reg = { "csiphy2" },
+               .interrupt = { "csiphy2" },
+               .csiphy = {
+                       .id = 2,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845
+               }
+       },
+};
+
+static const struct camss_subdev_resources csid_res_sm6150[] = {
+       /* CSID0 */
+       {
+               .regulators = {},
+               .clock = { "vfe0_cphy_rx", "vfe0_csid" },
+               .clock_rate = { { 269333333, 384000000 },
+                               { 320000000, 540000000 } },
+               .reg = { "csid0" },
+               .interrupt = { "csid0" },
+               .csid = {
+                       .is_lite = false,
+                       .hw_ops = &csid_ops_gen2,
+                       .parent_dev_ops = &vfe_parent_dev_ops,
+                       .formats = &csid_formats_gen2
+               }
+       },
+       /* CSID1 */
+       {
+               .regulators = {},
+               .clock = { "vfe1_cphy_rx", "vfe1_csid" },
+               .clock_rate = { { 269333333, 384000000 },
+                               { 320000000, 540000000 } },
+               .reg = { "csid1" },
+               .interrupt = { "csid1" },
+               .csid = {
+                       .is_lite = false,
+                       .hw_ops = &csid_ops_gen2,
+                       .parent_dev_ops = &vfe_parent_dev_ops,
+                       .formats = &csid_formats_gen2
+               }
+       },
+       /* CSID2 */
+       {
+               .regulators = {},
+               .clock = { "vfe_lite_cphy_rx", "vfe_lite_csid" },
+               .clock_rate = { { 269333333, 384000000 },
+                               { 320000000, 540000000 } },
+               .reg = { "csid_lite" },
+               .interrupt = { "csid_lite" },
+               .csid = {
+                       .is_lite = true,
+                       .hw_ops = &csid_ops_gen2,
+                       .parent_dev_ops = &vfe_parent_dev_ops,
+                       .formats = &csid_formats_gen2
+               }
+       },
+};
+
+static const struct camss_subdev_resources vfe_res_sm6150[] = {
+       /* VFE0 */
+       {
+               .regulators = {},
+               .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",
+                          "vfe0", "vfe0_axi"},
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 80000000 },
+                               { 37500000, 40000000 },
+                               { 360000000, 432000000, 540000000, 600000000 },
+                               { 265000000, 426000000 } },
+               .reg = { "vfe0" },
+               .interrupt = { "vfe0" },
+               .vfe = {
+                       .line_num = 3,
+                       .is_lite = false,
+                       .has_pd = true,
+                       .pd_name = "ife0",
+                       .hw_ops = &vfe_ops_170,
+                       .formats_rdi = &vfe_formats_rdi_845,
+                       .formats_pix = &vfe_formats_pix_845
+               }
+       },
+       /* VFE1 */
+       {
+               .regulators = {},
+               .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",
+                          "vfe1", "vfe1_axi"},
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 80000000 },
+                               { 37500000, 40000000 },
+                               { 360000000, 432000000, 540000000, 600000000 },
+                               { 265000000, 426000000 } },
+               .reg = { "vfe1" },
+               .interrupt = { "vfe1" },
+               .vfe = {
+                       .line_num = 3,
+                       .is_lite = false,
+                       .has_pd = true,
+                       .pd_name = "ife1",
+                       .hw_ops = &vfe_ops_170,
+                       .formats_rdi = &vfe_formats_rdi_845,
+                       .formats_pix = &vfe_formats_pix_845
+               }
+       },
+       /* VFE2 */
+       {
+               .regulators = {},
+               .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",
+                          "vfe_lite" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 80000000 },
+                               { 37500000, 40000000 },
+                               { 360000000, 432000000, 540000000, 600000000 } },
+               .reg = { "vfe_lite" },
+               .interrupt = { "vfe_lite" },
+               .vfe = {
+                       .line_num = 4,
+                       .is_lite = true,
+                       .hw_ops = &vfe_ops_170,
+                       .formats_rdi = &vfe_formats_rdi_845,
+                       .formats_pix = &vfe_formats_pix_845
+               }
+       },
+};
+
+static const struct resources_icc icc_res_sm6150[] = {
+       {
+               .name = "ahb",
+               .icc_bw_tbl.avg = 38400,
+               .icc_bw_tbl.peak = 76800,
+       },
+       {
+               .name = "hf_0",
+               .icc_bw_tbl.avg = 2097152,
+               .icc_bw_tbl.peak = 2097152,
+       },
+};
+
 static const struct camss_subdev_resources csiphy_res_8250[] = {
        /* CSIPHY0 */
        {
@@ -5036,6 +5220,19 @@ static const struct camss_resources sdm845_resources = {
        .vfe_num = ARRAY_SIZE(vfe_res_845),
 };
 
+static const struct camss_resources sm6150_resources = {
+       .version = CAMSS_6150,
+       .pd_name = "top",
+       .csiphy_res = csiphy_res_sm6150,
+       .csid_res = csid_res_sm6150,
+       .vfe_res = vfe_res_sm6150,
+       .icc_res = icc_res_sm6150,
+       .icc_path_num = ARRAY_SIZE(icc_res_sm6150),
+       .csiphy_num = ARRAY_SIZE(csiphy_res_sm6150),
+       .csid_num = ARRAY_SIZE(csid_res_sm6150),
+       .vfe_num = ARRAY_SIZE(vfe_res_sm6150),
+};
+
 static const struct camss_resources sm8250_resources = {
        .version = CAMSS_8250,
        .pd_name = "top",
@@ -5131,6 +5328,7 @@ static const struct of_device_id camss_dt_match[] = {
        { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },
        { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources },
        { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources },
+       { .compatible = "qcom,sm6150-camss", .data = &sm6150_resources },
        { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources },
        { .compatible = "qcom,sm8550-camss", .data = &sm8550_resources },
        { .compatible = "qcom,sm8650-camss", .data = &sm8650_resources },
index e34f06b4e1536129e6d1cd5b719d2c7df8e39a23..6d048414c919e963d6eb0cba2a287015cb25416f 100644 (file)
@@ -80,6 +80,7 @@ enum pm_domain {
 enum camss_version {
        CAMSS_660,
        CAMSS_2290,
+       CAMSS_6150,
        CAMSS_7280,
        CAMSS_8x16,
        CAMSS_8x39,