KVM: SVM: Advertise TSA CPUID bits to guests

Commit 31272abd5974b38ba312e9cf2ec2f09f9dd7dcba upstream.

Synthesize the TSA CPUID feature bits for guests. Set TSA_{SQ,L1}_NO on
unaffected machines.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index a6cffeff75d40b9b596a82ea69f1796caa0d5aaf..288db351677222056473cf2cd24ee95584227022 100644 (file)
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -780,6 +780,7 @@ void kvm_set_cpu_caps(void)
 
        kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
                F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ |
+               F(VERW_CLEAR) |
                F(NULL_SEL_CLR_BASE) | F(AUTOIBRS) | 0 /* PrefetchCtlMsr */
        );
 
@@ -790,6 +791,10 @@ void kvm_set_cpu_caps(void)
                F(PERFMON_V2)
        );
 
+       kvm_cpu_cap_init_kvm_defined(CPUID_8000_0021_ECX,
+               F(TSA_SQ_NO) | F(TSA_L1_NO)
+       );
+
        /*
         * Synthesize "LFENCE is serializing" into the AMD-defined entry in
         * KVM's supported CPUID if the feature is reported as supported by the
@@ -1296,8 +1301,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
                break;
        case 0x80000021:
-               entry->ebx = entry->ecx = entry->edx = 0;
+               entry->ebx = entry->edx = 0;
                cpuid_entry_override(entry, CPUID_8000_0021_EAX);
+               cpuid_entry_override(entry, CPUID_8000_0021_ECX);
                break;
        /* AMD Extended Performance Monitoring and Debug */
        case 0x80000022: {

diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h
index 2f4e155080badc5efdbcc93fbc909c5bbcf70094..be23712354bd8e8367ea555c4589f60dd3291c06 100644 (file)
--- a/arch/x86/kvm/reverse_cpuid.h
+++ b/arch/x86/kvm/reverse_cpuid.h
@@ -17,6 +17,7 @@ enum kvm_only_cpuid_leafs {
        CPUID_8000_0007_EDX,
        CPUID_8000_0022_EAX,
        CPUID_7_2_EDX,
+       CPUID_8000_0021_ECX,
        NR_KVM_CPU_CAPS,
 
        NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
@@ -61,6 +62,10 @@ enum kvm_only_cpuid_leafs {
 /* CPUID level 0x80000022 (EAX) */
 #define KVM_X86_FEATURE_PERFMON_V2     KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
 
+/* CPUID level 0x80000021 (ECX) */
+#define KVM_X86_FEATURE_TSA_SQ_NO      KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
+#define KVM_X86_FEATURE_TSA_L1_NO      KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
+
 struct cpuid_reg {
        u32 function;
        u32 index;
@@ -90,6 +95,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
        [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
        [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
        [CPUID_7_2_EDX]       = {         7, 2, CPUID_EDX},
+       [CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
 };
 
 /*
@@ -129,6 +135,8 @@ static __always_inline u32 __feature_translate(int x86_feature)
        KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
        KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
        KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
+       KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
+       KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
        default:
                return x86_feature;
        }