]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: Add camera clock controller for sc8180x
authorSatya Priya Kakitapalli <quic_skakitap@quicinc.com>
Mon, 12 May 2025 05:04:39 +0000 (10:34 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 11 Jun 2025 03:17:05 +0000 (22:17 -0500)
Add device node for camera clock controller on Qualcomm
SC8180X platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-4-8fb1d3265f52@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc8180x.dtsi

index f28a83377968bf90d72e3e70405c9b603cd24757..b74ce3175d209b569e634073662307964158b340 100644 (file)
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sc8180x-camcc.h>
 #include <dt-bindings/interconnect/qcom,icc.h>
 #include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,sc8180x.h>
                        };
                };
 
+               camcc: clock-controller@ad00000 {
+                       compatible = "qcom,sc8180x-camcc";
+                       reg = <0 0x0ad00000 0 0x20000>;
+                       clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>,
+                                <&sleep_clk>;
+                       power-domains = <&rpmhpd SC8180X_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+               };
+
                mdss: mdss@ae00000 {
                        compatible = "qcom,sc8180x-mdss";
                        reg = <0 0x0ae00000 0 0x1000>;