drm/mediatek: mtk_hdmi_ddc_v2: Add transfer abort on timeout cases

During a read or write transfer, the mtk_hdmi_ddc_v2 driver polls the
DDC_I2C_IN_PROG bit of HPD_DDC_STATUS register to check if the transfer
completes but do no particular action if a timeout is reached. It could
lead the next transfer attempts to fail because the faulty transfer was
not aborted. So, add in both low level read and write functions a abort
action by writing the DDC_CTRL register with the ABORT_XFER command
value.

Fixes: 8d0f79886273 ("drm/mediatek: Introduce HDMI/DDC v2 for MT8195/MT8188")
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20251205-mtk-hdmi-ddc-v2-fixes-v1-1-260dd0d320f4@collabora.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c
index b844e2c10f28060baef64bd36c5464758b08e162..6ae7cbba8cb6dacf46c2f7ab74a2d7446d698b69 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c
@@ -96,6 +96,11 @@ static int mtk_ddc_wr_one(struct mtk_hdmi_ddc *ddc, u16 addr_id,
                                       !(val & DDC_I2C_IN_PROG), 500, 1000);
        if (ret) {
                dev_err(ddc->dev, "DDC I2C write timeout\n");
+
+               /* Abort transfer if it is still in progress */
+               regmap_update_bits(ddc->regs, DDC_CTRL, DDC_CTRL_CMD,
+                                  FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_ABORT_XFER));
+
                return ret;
        }
 
@@ -179,6 +184,11 @@ static int mtk_ddcm_read_hdmi(struct mtk_hdmi_ddc *ddc, u16 uc_dev,
                                               500 * (temp_length + 5));
                if (ret) {
                        dev_err(ddc->dev, "Timeout waiting for DDC I2C\n");
+
+                       /* Abort transfer if it is still in progress */
+                       regmap_update_bits(ddc->regs, DDC_CTRL, DDC_CTRL_CMD,
+                                          FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_ABORT_XFER));
+
                        return ret;
                }