]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx95-19x19-evk: Add audio related nodes
authorFrank Li <Frank.Li@nxp.com>
Mon, 1 Jul 2024 20:07:24 +0000 (16:07 -0400)
committerShawn Guo <shawnguo@kernel.org>
Mon, 5 Aug 2024 08:07:09 +0000 (16:07 +0800)
Add sai1, sai2. Add i2c4 and wm8962 and other dependent nodes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts

index d14a54ab4fd47362510e2ba644606bcc4174615f..660e623f4f96470fb04c807af42145664184df10 100644 (file)
                serial0 = &lpuart1;
        };
 
+       bt_sco_codec: audio-codec-bt-sco {
+               #sound-dai-cells = <1>;
+               compatible = "linux,bt-sco";
+       };
+
        chosen {
                stdout-path = &lpuart1;
        };
                };
        };
 
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "+V3.3_SW";
+       };
+
+       reg_audio_pwr: regulator-audio-pwr {
+               compatible = "regulator-fixed";
+               regulator-name = "audio-pwr";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&i2c4_gpio_expander_21 1 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-always-on;
+       };
+
+       reg_audio_slot: regulator-audio-slot {
+               compatible = "regulator-fixed";
+               regulator-name = "audio-wm8962";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&i2c4_gpio_expander_21 7 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-always-on;
+               status = "disabled";
+       };
+
        reg_m2_pwr: regulator-m2-pwr {
                compatible = "regulator-fixed";
                regulator-name = "M.2-power";
                enable-active-high;
                off-on-delay-us = <12000>;
        };
+
+       sound-bt-sco {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "bt-sco-audio";
+               simple-audio-card,format = "dsp_a";
+               simple-audio-card,bitclock-inversion;
+               simple-audio-card,frame-master = <&btcpu>;
+               simple-audio-card,bitclock-master = <&btcpu>;
+
+               btcpu: simple-audio-card,cpu {
+                       sound-dai = <&sai1>;
+                       dai-tdm-slot-num = <2>;
+                       dai-tdm-slot-width = <16>;
+               };
+
+               simple-audio-card,codec {
+                       sound-dai = <&bt_sco_codec 1>;
+               };
+       };
+
+       sound-micfil {
+               compatible = "fsl,imx-audio-card";
+               model = "micfil-audio";
+
+               pri-dai-link {
+                       link-name = "micfil hifi";
+                       format = "i2s";
+                       cpu {
+                               sound-dai = <&micfil>;
+                       };
+               };
+       };
+
+       sound-wm8962 {
+               compatible = "fsl,imx-audio-wm8962";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_hp>;
+               model = "wm8962-audio";
+               audio-cpu = <&sai3>;
+               audio-codec = <&wm8962>;
+               hp-det-gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+               audio-routing = "Headphone Jack", "HPOUTL",
+                               "Headphone Jack", "HPOUTR",
+                               "Ext Spk", "SPKOUTL",
+                               "Ext Spk", "SPKOUTR",
+                               "AMIC", "MICBIAS",
+                               "IN3R", "AMIC",
+                               "IN1R", "AMIC";
+       };
+};
+
+&lpi2c4 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c4>;
+       status = "okay";
+
+       wm8962: audio-codec@1a {
+               compatible = "wlf,wm8962";
+               reg = <0x1a>;
+               clocks = <&scmi_clk IMX95_CLK_SAI3>;
+               DCVDD-supply = <&reg_audio_pwr>;
+               DBVDD-supply = <&reg_audio_pwr>;
+               AVDD-supply = <&reg_audio_pwr>;
+               CPVDD-supply = <&reg_audio_pwr>;
+               MICVDD-supply = <&reg_audio_pwr>;
+               PLLVDD-supply = <&reg_audio_pwr>;
+               SPKVDD1-supply = <&reg_audio_pwr>;
+               SPKVDD2-supply = <&reg_audio_pwr>;
+               gpio-cfg = < 0x0000 /* 0:Default */
+                            0x0000 /* 1:Default */
+                            0x0000 /* 2:FN_DMICCLK */
+                            0x0000 /* 3:Default */
+                            0x0000 /* 4:FN_DMICCDAT */
+                            0x0000 /* 5:Default */
+                          >;
+       };
+
+       i2c4_gpio_expander_21: gpio@21 {
+               compatible = "nxp,pcal6408";
+               reg = <0x21>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2c4_pcal6408>;
+               vcc-supply = <&reg_3p3v>;
+       };
 };
 
 &lpi2c7 {
        status = "okay";
 };
 
+&micfil {
+       #sound-dai-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pdm>;
+       assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL1>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL2>,
+                         <&scmi_clk IMX95_CLK_PDM>;
+       assigned-clock-parents = <0>, <0>, <0>, <0>,
+                                <&scmi_clk IMX95_CLK_AUDIOPLL1>;
+       assigned-clock-rates = <3932160000>,
+                              <3612672000>, <393216000>,
+                              <361267200>, <49152000>;
+       status = "okay";
+};
+
 &mu7 {
        status = "okay";
 };
        status = "okay";
 };
 
+&sai1 {
+       #sound-dai-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai1>;
+       assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL1>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL2>,
+                         <&scmi_clk IMX95_CLK_SAI1>;
+       assigned-clock-parents = <0>, <0>, <0>, <0>,
+                                <&scmi_clk IMX95_CLK_AUDIOPLL1>;
+       assigned-clock-rates = <3932160000>,
+                              <3612672000>, <393216000>,
+                              <361267200>, <12288000>;
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
+
+&sai3 {
+       #sound-dai-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai3>;
+       assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL1>,
+                         <&scmi_clk IMX95_CLK_AUDIOPLL2>,
+                         <&scmi_clk IMX95_CLK_SAI3>;
+       assigned-clock-parents = <0>, <0>, <0>, <0>,
+                                <&scmi_clk IMX95_CLK_AUDIOPLL1>;
+       assigned-clock-rates = <3932160000>,
+                              <3612672000>, <393216000>,
+                              <361267200>, <12288000>;
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
+
 &usdhc1 {
        pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
        pinctrl-0 = <&pinctrl_usdhc1>;
 };
 
 &scmi_iomuxc {
+       pinctrl_hp: hpgrp {
+               fsl,pins = <
+                       IMX95_PAD_GPIO_IO11__GPIO2_IO_BIT11             0x31e
+               >;
+       };
+
+       pinctrl_i2c4_pcal6408: i2c4pcal6498grp {
+               fsl,pins = <
+                       IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18                     0x31e
+               >;
+       };
+
        pinctrl_i2c7_pcal6524: i2c7pcal6524grp {
                fsl,pins = <
                        IMX95_PAD_GPIO_IO36__GPIO5_IO_BIT16                     0x31e
                >;
        };
 
+       pinctrl_lpi2c4: lpi2c4grp {
+               fsl,pins = <
+                       IMX95_PAD_GPIO_IO30__LPI2C4_SDA                 0x40000b9e
+                       IMX95_PAD_GPIO_IO31__LPI2C4_SCL                 0x40000b9e
+               >;
+       };
+
        pinctrl_lpi2c7: lpi2c7grp {
                fsl,pins = <
                        IMX95_PAD_GPIO_IO08__LPI2C7_SDA                 0x40000b9e
                >;
        };
 
+       pinctrl_pdm: pdmgrp {
+               fsl,pins = <
+                       IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK                           0x31e
+                       IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0       0x31e
+               >;
+       };
+
+       pinctrl_sai1: sai1grp {
+               fsl,pins = <
+                       IMX95_PAD_SAI1_RXD0__AONMIX_TOP_SAI1_RX_DATA_BIT0    0x31e
+                       IMX95_PAD_SAI1_TXC__AONMIX_TOP_SAI1_TX_BCLK      0x31e
+                       IMX95_PAD_SAI1_TXFS__AONMIX_TOP_SAI1_TX_SYNC     0x31e
+                       IMX95_PAD_SAI1_TXD0__AONMIX_TOP_SAI1_TX_DATA_BIT0    0x31e
+               >;
+       };
+
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_SAI2_RX_BCLK                  0x31e
+                       IMX95_PAD_ENET2_MDC__NETCMIX_TOP_SAI2_RX_SYNC                   0x31e
+                       IMX95_PAD_ENET2_TD3__NETCMIX_TOP_SAI2_RX_DATA_BIT0              0x31e
+                       IMX95_PAD_ENET2_TD2__NETCMIX_TOP_SAI2_RX_DATA_BIT1              0x31e
+                       IMX95_PAD_ENET2_TXC__NETCMIX_TOP_SAI2_TX_BCLK                   0x31e
+                       IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_SAI2_TX_SYNC                0x31e
+                       IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_SAI2_TX_DATA_BIT0           0x31e
+                       IMX95_PAD_ENET2_RXC__NETCMIX_TOP_SAI2_TX_DATA_BIT1              0x31e
+                       IMX95_PAD_ENET2_RD0__NETCMIX_TOP_SAI2_TX_DATA_BIT2              0x31e
+                       IMX95_PAD_ENET2_RD1__NETCMIX_TOP_SAI2_TX_DATA_BIT3              0x31e
+                       IMX95_PAD_ENET2_RD2__NETCMIX_TOP_SAI2_MCLK                      0x31e
+               >;
+       };
+
+       pinctrl_sai3: sai3grp {
+               fsl,pins = <
+                       IMX95_PAD_GPIO_IO17__SAI3_MCLK                          0x31e
+                       IMX95_PAD_GPIO_IO16__SAI3_TX_BCLK                       0x31e
+                       IMX95_PAD_GPIO_IO26__SAI3_TX_SYNC                       0x31e
+                       IMX95_PAD_GPIO_IO20__SAI3_RX_DATA_BIT0                  0x31e
+                       IMX95_PAD_GPIO_IO21__SAI3_TX_DATA_BIT0                  0x31e
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX      0x31e