]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: ti: k3-am62a7-sk: add boot phase tags
authorBryan Brattlof <bb@ti.com>
Thu, 10 Jul 2025 12:03:10 +0000 (07:03 -0500)
committerVignesh Raghavendra <vigneshr@ti.com>
Fri, 11 Jul 2025 04:38:56 +0000 (10:08 +0530)
The 'bootph-all' tag was added to the dt-schema to describe the various
nodes used during the different phases of bootup with DT. Add the
bootph-all tag to all nodes that are used during the early stages of
bootup by the bootloaders.

This includes the console UART along with the SD and eMMC nodes and its
required regulators for the 3v3 to 1v8 transition and the various nodes
for Ethernet booting.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250710-62a-uboot-cleanup-v2-1-9e04a7db1f54@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts

index f11284b3fe8e23b4c48d8d2f3a7202e80dc57370..bceead5e288e6d78c671baf0afabd1a9aa23fbee 100644 (file)
@@ -36,6 +36,7 @@
                /* 4G RAM */
                reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
                      <0x00000008 0x80000000 0x00000000 0x80000000>;
+               bootph-all;
        };
 
        reserved-memory {
                regulator-boot-on;
                enable-active-high;
                gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
+               bootph-all;
        };
 
        vcc_3v3_sys: regulator-4 {
                        AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
                        AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
                >;
+               bootph-all;
        };
 
        main_uart1_pins_default: main-uart1-default-pins {
                        AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
                        AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
                >;
+               bootph-all;
        };
 
        main_i2c2_pins_default: main-i2c2-default-pins {
                        AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
                        AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
                >;
+               bootph-all;
        };
 
        usr_led_pins_default: usr-led-default-pins {
                        AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
                        AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
                >;
+               bootph-all;
        };
 
        main_rgmii1_pins_default: main-rgmii1-default-pins {
                        AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */
                        AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */
                >;
+               bootph-all;
        };
 
        main_mcasp1_pins_default: main-mcasp1-default-pins {
                #interrupt-cells = <2>;
                pinctrl-names = "default";
                pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
+               bootph-all;
 
                gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
                                   "BT_EN_SOC", "MMC1_SD_EN",
        pinctrl-names = "default";
        pinctrl-0 = <&main_mmc1_pins_default>;
        disable-wp;
+       bootph-all;
 };
 
 &main_gpio0 {
        status = "okay";
+       bootph-all;
 };
 
 &main_gpio1 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_uart0_pins_default>;
+       bootph-all;
 };
 
 /* Main UART1 is used for TIFS firmware logs */
        pinctrl-0 = <&main_rgmii1_pins_default>;
 };
 
+&phy_gmii_sel {
+       bootph-all;
+};
+
 &cpsw_port1 {
        status = "okay";
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
+       bootph-all;
 };
 
 &cpsw_port2 {
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                ti,min-output-impedance;
+               bootph-all;
        };
 };