Backport: [GCC, ARM] armv8 linux toolchain asan testcase fail due to stl missing...

	Backport from mainline
	2015-06-09  Shiva Chen  <shiva0217@gmail.com>

	* sync.md (atomic_load<mode>): Add conditional code for lda/ldr
	(atomic_store<mode>): Likewise.

	* gcc.target/arm/stl-cond.c: New test.

From-SVN: r228323

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8ffd1830f90e6d9853fe78c3876aa05307a186f4..ce46cecd6c8cfa8c5ec8683f953e9025f3b604a9 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2015-10-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       Backport from mainline
+       2015-06-09  Shiva Chen  <shiva0217@gmail.com>
+
+       * sync.md (atomic_load<mode>): Add conditional code for lda/ldr
+       (atomic_store<mode>): Likewise.
+
 2015-09-28  Daniel Hellstrom  <daniel@gaisler.com>
 
        * config/sparc/t-rtems: Remove -muser-mode. Add ut699, at697f and leon.

diff --git a/gcc/config/arm/sync.md b/gcc/config/arm/sync.md
index aa8e9abcf77a5515def09f6e456813e7e72bca52..747fc7ee390eb4534a4e9ffaae88b1fe16b2b39c 100644 (file)
--- a/gcc/config/arm/sync.md
+++ b/gcc/config/arm/sync.md
@@ -77,11 +77,12 @@
     if (model == MEMMODEL_RELAXED
         || model == MEMMODEL_CONSUME
         || model == MEMMODEL_RELEASE)
-      return \"ldr<sync_sfx>\\t%0, %1\";
+      return \"ldr%(<sync_sfx>%)\\t%0, %1\";
     else
-      return \"lda<sync_sfx>\\t%0, %1\";
+      return \"lda%(<sync_sfx>%)\\t%0, %1\";
   }
-)
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")])
 
 (define_insn "atomic_store<mode>"
   [(set (match_operand:QHSI 0 "memory_operand" "=Q")
@@ -95,11 +96,12 @@
     if (model == MEMMODEL_RELAXED
         || model == MEMMODEL_CONSUME
         || model == MEMMODEL_ACQUIRE)
-      return \"str<sync_sfx>\t%1, %0\";
+      return \"str%(<sync_sfx>%)\t%1, %0\";
     else
-      return \"stl<sync_sfx>\t%1, %0\";
+      return \"stl%(<sync_sfx>%)\t%1, %0\";
   }
-)
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")])
 
 ;; Note that ldrd and vldr are *not* guaranteed to be single-copy atomic,
 ;; even for a 64-bit aligned address.  Instead we use a ldrexd unparied

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 25175e4c6c070b3ca96219e0df6dcf9bfd48d4a7..bb1c098425c5d98bb6beccb08e69417a5d215254 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2015-10-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       Backport from mainline
+       2015-06-09  Shiva Chen  <shiva0217@gmail.com>
+
+       * gcc.target/arm/stl-cond.c: New test.
+
 2015-09-21  Uros Bizjak  <ubizjak@gmail.com>
 
        PR middle-end/67619

diff --git a/gcc/testsuite/gcc.target/arm/stl-cond.c b/gcc/testsuite/gcc.target/arm/stl-cond.c
new file mode 100644 (file)
index 0000000..cc5d26a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/stl-cond.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-require-effective-target arm_arch_v8a_ok } */
+/* { dg-options "-O2 -marm" } */
+/* { dg-add-options arm_arch_v8a } */
+
+struct backtrace_state
+{
+  int threaded;
+  int lock_alloc;
+};
+
+void foo (struct backtrace_state *state)
+{
+  if (state->threaded)
+    __sync_lock_release (&state->lock_alloc);
+}
+
+/* { dg-final { scan-assembler "stlne" } } */