]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: qcs8300: Add device node for gfx_smmu
authorPratyush Brahma <quic_pbrahma@quicinc.com>
Mon, 10 Mar 2025 11:18:35 +0000 (16:48 +0530)
committerBjorn Andersson <andersson@kernel.org>
Fri, 14 Mar 2025 16:58:22 +0000 (11:58 -0500)
Add the device node for gfx smmu that is required for gpu
specific address translations.

Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
Link: https://lore.kernel.org/r/20250310-b4-branch-gfx-smmu-v6-2-15c60b8abd99@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/qcs8300.dtsi

index cdd412706b5b7bd2a953d20bfa9562043b20a18d..72d4f9e382da3f214f45af14b6771167281dcd0c 100644 (file)
                        #power-domain-cells = <1>;
                };
 
+               adreno_smmu: iommu@3da0000 {
+                       compatible = "qcom,qcs8300-smmu-500", "qcom,adreno-smmu",
+                                    "qcom,smmu-500", "arm,mmu-500";
+                       reg = <0x0 0x3da0000 0x0 0x20000>;
+                       #iommu-cells = <2>;
+                       #global-interrupts = <2>;
+
+                       interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>;
+
+                       clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+                                <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
+                                <&gpucc GPU_CC_AHB_CLK>,
+                                <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
+                                <&gpucc GPU_CC_CX_GMU_CLK>,
+                                <&gpucc GPU_CC_HUB_CX_INT_CLK>,
+                                <&gpucc GPU_CC_HUB_AON_CLK>;
+
+                       clock-names = "gcc_gpu_memnoc_gfx_clk",
+                                     "gcc_gpu_snoc_dvm_gfx_clk",
+                                     "gpu_cc_ahb_clk",
+                                     "gpu_cc_hlos1_vote_gpu_smmu_clk",
+                                     "gpu_cc_cx_gmu_clk",
+                                     "gpu_cc_hub_cx_int_clk",
+                                     "gpu_cc_hub_aon_clk";
+                       power-domains = <&gpucc GPU_CC_CX_GDSC>;
+                       dma-coherent;
+               };
+
                pmu@9091000 {
                        compatible = "qcom,qcs8300-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
                        reg = <0x0 0x9091000 0x0 0x1000>;