imx8mm/mn: Add missing root clock entry for ARM core clock

The current implementation in arch/arm/mach-imx/cpu.c uses non-DM
code to retrieve the core clock frequency. As the root clock is not
listed we currently get:

CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz

Fix this by adding the missing entry, which results in:

CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

diff --git a/arch/arm/mach-imx/imx8m/clock_slice.c b/arch/arm/mach-imx/imx8m/clock_slice.c
index 31925ccaba9fb94a35b69515e7fd4f925151e09f..8b7a4dad65c9ace24b402454e4f8a8bb06756954 100644 (file)
--- a/arch/arm/mach-imx/imx8m/clock_slice.c
+++ b/arch/arm/mach-imx/imx8m/clock_slice.c
@@ -477,6 +477,11 @@ static struct clk_root_map root_array[] = {
 };
 #elif defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
 static struct clk_root_map root_array[] = {
+       {ARM_A53_CLK_ROOT, CORE_CLOCK_SLICE, 0,
+        {OSC_24M_CLK, ARM_PLL_CLK, SYSTEM_PLL2_500M_CLK,
+         SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+         SYSTEM_PLL1_400M_CLK, AUDIO_PLL1_CLK, SYSTEM_PLL3_CLK}
+       },
        {NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
         {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
          SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_133M_CLK,