arm: dts: lpc32xx: add interrupts property to Motor Control PWM

Motor Control PWM shares an interrupt line with TIMER4 on MIC interrupt
controller, the interrupt serves as period (timer limit), pulse-width (match)
and capture event interrupt.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
index 7fa91d1ac9eaa98cc676208a606e0d06f8cadf49..e94df78def18a0764484f2c42bb3d4c8e7899cbb 100644 (file)
--- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
@@ -322,6 +322,7 @@
                        mpwm: pwm@400e8000 {
                                compatible = "nxp,lpc3220-motor-pwm";
                                reg = <0x400e8000 0x78>;
+                               interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                                clocks = <&clk LPC32XX_CLK_MCPWM>;
                                #pwm-cells = <3>;
                                status = "disabled";