[PATCH] PR84033, powerpc64le -moptimize-swaps bad code with vec_vbpermq

vbpermq produces its output in bits 48..63 of the target vector reg,
so the output cannot be lane swapped.

gcc/
	PR target/84033
	* config/rs6000/rs6000.c (rtx_is_swappable_p): Exclude
	UNSPEC_VBPERMQ.
gcc/testsuite/
	PR target/84033
	* gcc.target/powerpc/swaps-p8-46.c: New.

Backport svn r257070

From-SVN: r257137

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1f67a87933012746c5c9cedb3ca1f8c8743d5167..1bb9c6491aa21c9eadb752d957f397786d5c24fc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2018-01-29  Alan Modra  <amodra@gmail.com>
+
+       Backport from mainline
+       2018-01-26  Alan Modra  <amodra@gmail.com>
+       PR target/84033
+       * config/rs6000/rs6000.c (rtx_is_swappable_p): Exclude
+       UNSPEC_VBPERMQ.
+
 2018-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
        Backport from mainline

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 784fdbe254d1fb308ffd5d551cfc05b2df4650a3..80391acf3cd6c2f434abdc793245dd919b587aa2 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -38694,6 +38694,7 @@ rtx_is_swappable_p (rtx op, unsigned int *special)
          {
          default:
            break;
+         case UNSPEC_VBPERMQ:
          case UNSPEC_VMRGH_DIRECT:
          case UNSPEC_VMRGL_DIRECT:
          case UNSPEC_VPACK_SIGN_SIGN_SAT:

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6da5bf16f237dca5d81311b87199fc9e78e940a7..273c6cfdeca8c751218214ff6e0517c14715e690 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-29  Alan Modra  <amodra@gmail.com>
+
+       PR target/84033
+       * gcc.target/powerpc/swaps-p8-46.c: New.
+
 2018-01-23  Peter Bergner  <bergner@vnet.ibm.com>
 
        Back port from mainline

diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c
new file mode 100644 (file)
index 0000000..23494b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c
@@ -0,0 +1,34 @@
+/* { dg-do run { target { powerpc64le-*-* } } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O2 " } */
+
+typedef __attribute__ ((__aligned__ (8))) unsigned long long __m64;
+typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
+
+/* PR84033.  Extracted from xmmintrin.h but with a pointer param to
+   allow swaps to happen when not inline.  */
+int __attribute__ ((__noinline__))
+_mm_movemask_ps (__m128 *__A)
+{
+  __vector __m64 result;
+  static const __vector unsigned int perm_mask =
+    {
+      0x00204060, 0x80808080, 0x80808080, 0x80808080
+    };
+
+  result = (__vector __m64)
+    __builtin_vec_vbpermq ((__vector unsigned char) (*__A),
+                          (__vector unsigned char) perm_mask);
+  return result[1];
+}
+
+int
+main (void)
+{
+  union { unsigned int i[4]; __m128 m; } x
+    = { 0x80000000, 0x80000000, 0x7fffffff, 0x7fffffff };
+  if (_mm_movemask_ps (&x.m) != 3)
+    __builtin_abort ();
+  return 0;
+}