/* reply message from DSP */
if (ipcx & SHIM_BYT_IPCX_DONE) {
-
- spin_lock_irq(&sdev->ipc_lock);
-
/*
* handle immediate reply from DSP core. If the msg is
* found, set done bit in cmd_done which is called at the
* because the done bit can't be set in cmd_done function
* which is triggered by msg
*/
+ guard(spinlock_irq)(&sdev->ipc_lock);
snd_sof_ipc_process_reply(sdev, ipcx);
-
atom_dsp_done(sdev);
-
- spin_unlock_irq(&sdev->ipc_lock);
}
/* new message from DSP */
snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR,
SHIM_IMRX, SHIM_IMRX_DONE,
SHIM_IMRX_DONE);
-
- spin_lock_irq(&sdev->ipc_lock);
-
/*
* handle immediate reply from DSP core. If the msg is
* found, set done bit in cmd_done which is called at the
* because the done bit can't be set in cmd_done function
* which is triggered by msg
*/
+ guard(spinlock_irq)(&sdev->ipc_lock);
snd_sof_ipc_process_reply(sdev, ipcx);
-
bdw_dsp_done(sdev);
-
- spin_unlock_irq(&sdev->ipc_lock);
}
ipcd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD);
data->primary = primary;
data->extension = extension;
- spin_lock_irq(&sdev->ipc_lock);
-
+ guard(spinlock_irq)(&sdev->ipc_lock);
snd_sof_ipc_get_reply(sdev);
cnl_ipc_host_done(sdev);
snd_sof_ipc_reply(sdev, data->primary);
-
- spin_unlock_irq(&sdev->ipc_lock);
} else {
dev_dbg_ratelimited(sdev->dev,
"IPC reply before FW_READY: %#x|%#x\n",
CNL_DSP_REG_HIPCCTL_DONE, 0);
if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) {
- spin_lock_irq(&sdev->ipc_lock);
-
/* handle immediate reply from DSP core */
+ guard(spinlock_irq)(&sdev->ipc_lock);
hda_dsp_ipc_get_reply(sdev);
snd_sof_ipc_reply(sdev, msg);
-
cnl_ipc_dsp_done(sdev);
-
- spin_unlock_irq(&sdev->ipc_lock);
} else {
dev_dbg_ratelimited(sdev->dev, "IPC reply before FW_READY: %#x\n",
msg);
return NULL;
}
- spin_lock_irq(&bus->reg_lock);
+ guard(spinlock_irq)(&bus->reg_lock);
list_for_each_entry(hstream, &bus->stream_list, list) {
struct hdac_ext_stream *hext_stream =
stream_to_hdac_ext_stream(hstream);
res->link_locked = 1;
res->link_substream = substream;
}
- spin_unlock_irq(&bus->reg_lock);
return res;
}
data->primary = primary;
data->extension = extension;
- spin_lock_irq(&sdev->ipc_lock);
-
+ guard(spinlock_irq)(&sdev->ipc_lock);
snd_sof_ipc_get_reply(sdev);
hda_dsp_ipc_host_done(sdev);
snd_sof_ipc_reply(sdev, data->primary);
-
- spin_unlock_irq(&sdev->ipc_lock);
} else {
dev_dbg_ratelimited(sdev->dev,
"IPC reply before FW_READY: %#x|%#x\n",
* reply.
*/
if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) {
- spin_lock_irq(&sdev->ipc_lock);
-
/* handle immediate reply from DSP core */
+ guard(spinlock_irq)(&sdev->ipc_lock);
hda_dsp_ipc_get_reply(sdev);
snd_sof_ipc_reply(sdev, msg);
-
/* set the done bit */
hda_dsp_ipc_dsp_done(sdev);
-
- spin_unlock_irq(&sdev->ipc_lock);
} else {
dev_dbg_ratelimited(sdev->dev, "IPC reply before FW_READY: %#x\n",
msg);
struct hdac_bus *bus = sof_to_bus(sdev);
u32 mask = BIT(hstream->index);
- spin_lock_irq(&bus->reg_lock);
+ guard(spinlock_irq)(&bus->reg_lock);
+
/* couple host and link DMA if link DMA channel is idle */
if (!hext_stream->link_locked)
snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR,
SOF_HDA_REG_PP_PPCTL, mask, 0);
- spin_unlock_irq(&bus->reg_lock);
}
hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0);
u32 status;
/* The function can be called at irq thread, so use spin_lock_irq */
- spin_lock_irq(&bus->reg_lock);
+ guard(spinlock_irq)(&bus->reg_lock);
status = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
if (status != 0xffffffff)
ret = true;
- spin_unlock_irq(&bus->reg_lock);
-
return ret;
}
EXPORT_SYMBOL_NS(hda_dsp_check_stream_irq, "SND_SOC_SOF_INTEL_HDA_COMMON");
* unsolicited responses from the codec
*/
for (i = 0, active = true; i < 10 && active; i++) {
- spin_lock_irq(&bus->reg_lock);
+ guard(spinlock_irq)(&bus->reg_lock);
status = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
if (status & AZX_INT_CTRL_EN) {
active |= hda_codec_check_rirb_status(sdev);
}
- spin_unlock_irq(&bus->reg_lock);
}
return IRQ_HANDLED;
data->primary = primary;
data->extension = extension;
- spin_lock_irq(&sdev->ipc_lock);
-
+ guard(spinlock_irq)(&sdev->ipc_lock);
snd_sof_ipc_get_reply(sdev);
mtl_ipc_host_done(sdev);
snd_sof_ipc_reply(sdev, data->primary);
-
- spin_unlock_irq(&sdev->ipc_lock);
} else {
dev_dbg_ratelimited(sdev->dev,
"IPC reply before FW_READY: %#x|%#x\n",