]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
ARM: Fix memcpy & memmove for [ARM_ALWAYS_BX]
authorRoland McGrath <roland@hack.frob.com>
Thu, 19 Mar 2015 19:45:24 +0000 (12:45 -0700)
committerRoland McGrath <roland@hack.frob.com>
Thu, 19 Mar 2015 19:45:24 +0000 (12:45 -0700)
ChangeLog
sysdeps/arm/memcpy.S
sysdeps/arm/memmove.S

index b9b3c2cda97ec144e2dd3fd77543dcac30bbf61e..9d14696f7d77c446c602a7a91e09ca5e42a5cc01 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2015-03-19  Roland McGrath  <roland@hack.frob.com>
+
+       * sysdeps/arm/memcpy.S [ARM_ALWAYS_BX]: Fix computed-jump calculations
+       to account for alignment padding.
+       * sysdeps/arm/memmove.S: Likewise.
+
 2015-03-19  Chris Metcalf  <cmetcalf@ezchip.com>
 
        * sysdeps/unix/sysv/linux/generic/README: New file.
index 0602d992f0348194a77c3c5a622ea03d788bce30..3e41ea6f615bf8bb9d9db53020de12f5040d2bf9 100644 (file)
@@ -125,7 +125,12 @@ ENTRY(memcpy)
                push    {r10}
                cfi_adjust_cfa_offset (4)
                cfi_rel_offset (r10, 0)
-               add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:             add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+               /* If alignment is not perfect, then there will be some
+                  padding (nop) instructions between this BX and label 6.
+                  The computation above assumed that two instructions
+                  later is exactly the right spot.  */
+               add     r10, #(6f - (0b + PC_OFS))
                bx      r10
 #endif
                .p2align ARM_BX_ALIGN_LOG2
@@ -156,11 +161,16 @@ ENTRY(memcpy)
                add     pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
                nop
 #else
-               add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:             add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+               /* If alignment is not perfect, then there will be some
+                  padding (nop) instructions between this BX and label 66.
+                  The computation above assumed that two instructions
+                  later is exactly the right spot.  */
+               add     r10, #(66f - (0b + PC_OFS))
                bx      r10
 #endif
                .p2align ARM_BX_ALIGN_LOG2
-               nop
+66:            nop
                .p2align ARM_BX_ALIGN_LOG2
                sfi_breg r0, \
                str     r3, [\B], #4
index f8a4eff2a42846ad285dcc17933f559459533492..dde877e5f3db547cbed597f09bb162676e2cad50 100644 (file)
@@ -141,7 +141,12 @@ ENTRY(memmove)
                push    {r10}
                cfi_adjust_cfa_offset (4)
                cfi_rel_offset (r10, 0)
-               add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:             add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+               /* If alignment is not perfect, then there will be some
+                  padding (nop) instructions between this BX and label 6.
+                  The computation above assumed that two instructions
+                  later is exactly the right spot.  */
+               add     r10, #(6f - (0b + PC_OFS))
                bx      r10
 #endif
                .p2align ARM_BX_ALIGN_LOG2
@@ -172,11 +177,16 @@ ENTRY(memmove)
                add     pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
                nop
 #else
-               add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+0:             add     r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+               /* If alignment is not perfect, then there will be some
+                  padding (nop) instructions between this BX and label 66.
+                  The computation above assumed that two instructions
+                  later is exactly the right spot.  */
+               add     r10, #(66f - (0b + PC_OFS))
                bx      r10
 #endif
                .p2align ARM_BX_ALIGN_LOG2
-               nop
+66:            nop
                .p2align ARM_BX_ALIGN_LOG2
                sfi_breg r0, \
                str     r3, [\B, #-4]!