]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
target/119010 - add reservations for integer vector compares to zen4/zen5
authorRichard Biener <rguenther@suse.de>
Thu, 27 Mar 2025 11:40:15 +0000 (12:40 +0100)
committerRichard Biener <rguenth@gcc.gnu.org>
Mon, 31 Mar 2025 06:17:11 +0000 (08:17 +0200)
The following handles TI, OI and XI mode in the respective EVEX
compare reservations that do not use memory (I've not yet run into
ones with).  The znver automata has separate reservations for
integer compares (but only for zen1, for zen2 and zen3 there are
no compare reservations at all), but I don't see why that should
be necessary here.

PR target/119010
* config/i386/zn4zn5.md (znver4_sse_cmp_avx128,
znver5_sse_cmp_avx128): Handle TImode.
(znver4_sse_cmp_avx256, znver5_sse_cmp_avx256): Handle OImode.
(znver4_sse_cmp_avx512, znver5_sse_cmp_avx512): Handle XImode.

gcc/config/i386/zn4zn5.md

index 40e51456a4611ef81f2a570d355b549580109d92..c7ced5411f0b65d16a8b0e8f92cdb265cb9c3470 100644 (file)
 (define_insn_reservation "znver4_sse_cmp_avx128" 3
                         (and (eq_attr "cpu" "znver4")
                              (and (eq_attr "type" "ssecmp")
-                                  (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,DF,SF")
+                                  (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,DF,SF,TI")
                                    (and (eq_attr "prefix" "evex")
                                         (eq_attr "memory" "none")))))
                         "znver4-direct,znver4-fpu0*2|znver4-fpu1*2")
 (define_insn_reservation "znver5_sse_cmp_avx128" 3
                         (and (eq_attr "cpu" "znver5")
                              (and (eq_attr "type" "ssecmp")
-                                  (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,DF,SF")
+                                  (and (eq_attr "mode" "V4SF,V2DF,V2SF,V1DF,DF,SF,TI")
                                    (and (eq_attr "prefix" "evex")
                                         (eq_attr "memory" "none")))))
                         "znver4-direct,znver4-fpu1|znver4-fpu2")
 (define_insn_reservation "znver4_sse_cmp_avx256" 4
                         (and (eq_attr "cpu" "znver4")
                              (and (eq_attr "type" "ssecmp")
-                                  (and (eq_attr "mode" "V8SF,V4DF")
+                                  (and (eq_attr "mode" "V8SF,V4DF,OI")
                                    (and (eq_attr "prefix" "evex")
                                         (eq_attr "memory" "none")))))
                         "znver4-direct,znver4-fpu0*2|znver4-fpu1*2")
 (define_insn_reservation "znver5_sse_cmp_avx256" 4
                         (and (eq_attr "cpu" "znver5")
                              (and (eq_attr "type" "ssecmp")
-                                  (and (eq_attr "mode" "V8SF,V4DF")
+                                  (and (eq_attr "mode" "V8SF,V4DF,OI")
                                    (and (eq_attr "prefix" "evex")
                                         (eq_attr "memory" "none")))))
                         "znver4-direct,znver4-fpu1|znver4-fpu2")
 (define_insn_reservation "znver4_sse_cmp_avx512" 5
                         (and (eq_attr "cpu" "znver4")
                              (and (eq_attr "type" "ssecmp")
-                                  (and (eq_attr "mode" "V16SF,V8DF")
+                                  (and (eq_attr "mode" "V16SF,V8DF,XI")
                                    (and (eq_attr "prefix" "evex")
                                         (eq_attr "memory" "none")))))
                         "znver4-direct,znver4-fpu0*2|znver4-fpu1*2")
 (define_insn_reservation "znver5_sse_cmp_avx512" 5
                         (and (eq_attr "cpu" "znver5")
                              (and (eq_attr "type" "ssecmp")
-                                  (and (eq_attr "mode" "V16SF,V8DF")
+                                  (and (eq_attr "mode" "V16SF,V8DF,XI")
                                    (and (eq_attr "prefix" "evex")
                                         (eq_attr "memory" "none")))))
                         "znver4-direct,znver4-fpu1|znver4-fpu2")