]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: freescale: debix-som-a-bmb-08: Enable HDMI output
authorKieran Bingham <kieran.bingham@ideasonboard.com>
Tue, 16 Sep 2025 14:47:09 +0000 (15:47 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 20 Oct 2025 12:34:45 +0000 (20:34 +0800)
Enable the HDMI output on the Debix SOM A board, using the HDMI encoder
present in the i.MX8MP SoC.

Enable and configure all nodes required for the HDMI port usage.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts

index d241db3743a9c70ec38cf7b09625d0417dafb228..04619a7229065be496611128ecf6848c9dd7102c 100644 (file)
                stdout-path = &uart2;
        };
 
+       hdmi-connector {
+               compatible = "hdmi-connector";
+               label = "hdmi";
+               type = "a";
+
+               port {
+                       hdmi_connector_in: endpoint {
+                               remote-endpoint = <&hdmi_tx_out>;
+                       };
+               };
+       };
+
        reg_baseboard_vdd3v3: regulator-baseboard-vdd3v3 {
                compatible = "regulator-fixed";
                regulator-min-microvolt = <3300000>;
        };
 };
 
+&hdmi_pvi {
+       status = "okay";
+};
+
+&hdmi_tx {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hdmi>;
+       status = "okay";
+
+       ports {
+               port@1 {
+                       hdmi_tx_out: endpoint {
+                               remote-endpoint = <&hdmi_connector_in>;
+                       };
+               };
+       };
+};
+
+&hdmi_tx_phy {
+       status = "okay";
+};
+
 &i2c4 {
        expander0: gpio@20 {
                compatible = "nxp,pca9535";
        };
 };
 
+&lcdif3 {
+       status = "okay";
+};
+
 &snvs_pwrkey {
        status = "okay";
 };
                >;
        };
 
+       pinctrl_hdmi: hdmigrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL     0x1c3
+                       MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA     0x1c3
+                       MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD         0x19
+                       MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC         0x19
+               >;
+       };
+
        pinctrl_i2c1: i2c1grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL                 0x400001c2