return 0;
}
+static int ksz8_phy_read16(struct dsa_switch *ds, int addr, int reg)
+{
+ struct ksz_device *dev = ds->priv;
+ u16 val = 0xffff;
+ int ret;
+
+ ret = ksz8_r_phy(dev, addr, reg, &val);
+ if (ret)
+ return ret;
+
+ return val;
+}
+
/**
* ksz8_w_phy_ctrl - Translates and writes to the SMI interface from a MIIM PHY
* Control register (Reg. 31).
return 0;
}
+static int ksz8_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
+{
+ struct ksz_device *dev = ds->priv;
+ int ret;
+
+ ret = ksz8_w_phy(dev, addr, reg, val);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
static void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)
{
int offset = P_MIRROR_CTRL;
return 0;
}
+static int ksz8463_phy_read16(struct dsa_switch *ds, int addr, int reg)
+{
+ struct ksz_device *dev = ds->priv;
+ u16 val = 0xffff;
+ int ret;
+
+ ret = ksz8463_r_phy(dev, addr, reg, &val);
+ if (ret)
+ return ret;
+
+ return val;
+}
+
static int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
{
u16 sw_reg = 0;
return 0;
}
+static int ksz8463_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
+{
+ struct ksz_device *dev = ds->priv;
+ int ret;
+
+ ret = ksz8463_w_phy(dev, addr, reg, val);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
static int ksz8_switch_init(struct ksz_device *dev)
{
dev->cpu_port = fls(dev->info->cpu_ports) - 1;
const struct ksz_dev_ops ksz8463_dev_ops = {
.get_port_addr = ksz8463_get_port_addr,
.cfg_port_member = ksz8_cfg_port_member,
- .r_phy = ksz8463_r_phy,
- .w_phy = ksz8463_w_phy,
.r_mib_cnt = ksz8_r_mib_cnt,
.r_mib_pkt = ksz8_r_mib_pkt,
.r_mib_stat64 = ksz88xx_r_mib_stats64,
const struct ksz_dev_ops ksz87xx_dev_ops = {
.get_port_addr = ksz8_get_port_addr,
.cfg_port_member = ksz8_cfg_port_member,
- .r_phy = ksz8_r_phy,
- .w_phy = ksz8_w_phy,
.r_mib_cnt = ksz8_r_mib_cnt,
.r_mib_pkt = ksz8_r_mib_pkt,
.r_mib_stat64 = ksz_r_mib_stats64,
const struct ksz_dev_ops ksz88xx_dev_ops = {
.get_port_addr = ksz8_get_port_addr,
.cfg_port_member = ksz8_cfg_port_member,
- .r_phy = ksz8_r_phy,
- .w_phy = ksz8_w_phy,
.r_mib_cnt = ksz8_r_mib_cnt,
.r_mib_pkt = ksz8_r_mib_pkt,
.r_mib_stat64 = ksz88xx_r_mib_stats64,
.get_phy_flags = ksz_get_phy_flags,
.setup = ksz8_setup,
.teardown = ksz_teardown,
- .phy_read = ksz_phy_read16,
- .phy_write = ksz_phy_write16,
+ .phy_read = ksz8463_phy_read16,
+ .phy_write = ksz8463_phy_write16,
.phylink_get_caps = ksz8_phylink_get_caps,
.port_setup = ksz8_dsa_port_setup,
.get_strings = ksz_get_strings,
.get_phy_flags = ksz_get_phy_flags,
.setup = ksz8_setup,
.teardown = ksz_teardown,
- .phy_read = ksz_phy_read16,
- .phy_write = ksz_phy_write16,
+ .phy_read = ksz8_phy_read16,
+ .phy_write = ksz8_phy_write16,
.phylink_get_caps = ksz8_phylink_get_caps,
.port_setup = ksz8_dsa_port_setup,
.get_strings = ksz_get_strings,
.get_phy_flags = ksz_get_phy_flags,
.setup = ksz8_setup,
.teardown = ksz_teardown,
- .phy_read = ksz_phy_read16,
- .phy_write = ksz_phy_write16,
+ .phy_read = ksz8_phy_read16,
+ .phy_write = ksz8_phy_write16,
.phylink_get_caps = ksz8_phylink_get_caps,
.port_setup = ksz8_dsa_port_setup,
.get_strings = ksz_get_strings,
return 0;
}
+static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
+{
+ struct ksz_device *dev = ds->priv;
+ u16 val = 0xffff;
+ int ret;
+
+ ret = ksz9477_r_phy(dev, addr, reg, &val);
+ if (ret)
+ return ret;
+
+ return val;
+}
+
static int ksz9477_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val)
{
u32 mask, val32;
return ksz_prmw32(dev, addr, 0x100 + (reg << 1), mask, val32);
}
+static int ksz9477_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
+{
+ struct ksz_device *dev = ds->priv;
+ int ret;
+
+ ret = ksz9477_w_phy(dev, addr, reg, val);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
void ksz9477_cfg_port_member(struct ksz_device *dev, int port, u8 member)
{
ksz_pwrite32(dev, port, REG_PORT_VLAN_MEMBERSHIP__4, member);
const struct ksz_dev_ops ksz9477_dev_ops = {
.get_port_addr = ksz9477_get_port_addr,
.cfg_port_member = ksz9477_cfg_port_member,
- .r_phy = ksz9477_r_phy,
- .w_phy = ksz9477_w_phy,
.r_mib_cnt = ksz9477_r_mib_cnt,
.r_mib_pkt = ksz9477_r_mib_pkt,
.r_mib_stat64 = ksz_r_mib_stats64,
.get_phy_flags = ksz_get_phy_flags,
.setup = ksz9477_setup,
.teardown = ksz_teardown,
- .phy_read = ksz_phy_read16,
- .phy_write = ksz_phy_write16,
+ .phy_read = ksz9477_phy_read16,
+ .phy_write = ksz9477_phy_write16,
.phylink_get_caps = ksz9477_phylink_get_caps,
.port_setup = ksz9477_dsa_port_setup,
.set_ageing_time = ksz9477_set_ageing_time,
}
}
-int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg)
-{
- struct ksz_device *dev = ds->priv;
- u16 val = 0xffff;
- int ret;
-
- ret = dev->dev_ops->r_phy(dev, addr, reg, &val);
- if (ret)
- return ret;
-
- return val;
-}
-
-int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
-{
- struct ksz_device *dev = ds->priv;
- int ret;
-
- ret = dev->dev_ops->w_phy(dev, addr, reg, val);
- if (ret)
- return ret;
-
- return 0;
-}
-
u32 ksz_get_phy_flags(struct dsa_switch *ds, int port)
{
struct ksz_device *dev = ds->priv;
* - Negative error code on failure (e.g., invalid configuration).
*/
int (*create_phy_addr_map)(struct ksz_device *dev, bool side_mdio);
- int (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
- int (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
u64 *cnt);
void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
void ksz_switch_shutdown(struct ksz_device *dev);
int ksz_handle_wake_reason(struct ksz_device *dev, int port);
-int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
-int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
u32 ksz_get_phy_flags(struct dsa_switch *ds, int port);
int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
return ksz_read16(dev, REG_VPHY_IND_DATA__2, val);
}
-static int lan937x_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data)
+static int lan937x_phy_read16(struct dsa_switch *ds, int addr, int reg)
{
- return lan937x_internal_phy_read(dev, addr, reg, data);
+ struct ksz_device *dev = ds->priv;
+ u16 val = 0xffff;
+ int ret;
+
+ ret = lan937x_internal_phy_read(dev, addr, reg, &val);
+ if (ret)
+ return ret;
+
+ return val;
}
-static int lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val)
+static int lan937x_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
{
- return lan937x_internal_phy_write(dev, addr, reg, val);
+ struct ksz_device *dev = ds->priv;
+ int ret;
+
+ ret = lan937x_internal_phy_write(dev, addr, reg, val);
+ if (ret)
+ return ret;
+
+ return 0;
}
static int lan937x_reset_switch(struct ksz_device *dev)
.cfg_port_member = ksz9477_cfg_port_member,
.mdio_bus_preinit = lan937x_mdio_bus_preinit,
.create_phy_addr_map = lan937x_create_phy_addr_map,
- .r_phy = lan937x_r_phy,
- .w_phy = lan937x_w_phy,
.r_mib_cnt = ksz9477_r_mib_cnt,
.r_mib_pkt = ksz9477_r_mib_pkt,
.r_mib_stat64 = ksz_r_mib_stats64,
.get_phy_flags = ksz_get_phy_flags,
.setup = lan937x_setup,
.teardown = ksz_teardown,
- .phy_read = ksz_phy_read16,
- .phy_write = ksz_phy_write16,
+ .phy_read = lan937x_phy_read16,
+ .phy_write = lan937x_phy_write16,
.phylink_get_caps = lan937x_phylink_get_caps,
.port_setup = lan937x_dsa_port_setup,
.set_ageing_time = lan937x_set_ageing_time,