RISC-V: Refine the scalar SAT_* test cases

Per previous discuss with Jeff, we don't do complicated
asm check like scalar saturation alu.  It is somehow
not easy to maintain, as well as fragile.  Thus, we
remove these function-body check, and introduce the
jmp label asm check instead.The code-gen of SAT_*
will never have a jmp, and the other run test will
make sure the correctness of SAT_* code-gen.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

The below failed test cases are resolved:
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Oz
  check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Os
  check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O3
  check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Ofast
  check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O2
  check-function-bodies sat_s_add_imm_int8_t_fmt_2_1

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat/sat_s_add-1-i16.c: Remove function-body
	check and add no jmp label asm check.
	* gcc.target/riscv/sat/sat_s_add-1-i32.c:
	* gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-1-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-1-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-1-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-1-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-1-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-1-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-1-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-1-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-2-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-2-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-2-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-2-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-3-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-3-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-3-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-3-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-4-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-4-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-4-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_sub-4-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-1-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-1-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-1-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-1-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-2-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-2-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-2-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-2-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-3-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-3-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-3-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-3-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-4-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-4-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-4-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-4-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-5-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-5-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-5-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-5-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-6-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-6-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-6-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-6-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-1-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-1-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-1-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-1-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-2-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-2-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-2-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-2-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-3-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-3-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-3-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-3-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-4-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-4-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-4-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_add_imm-4-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: Ditto.
	* gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: Ditto.
	* gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: Ditto.
	* gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-1-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-1-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-1-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-1-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-10-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-10-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-10-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-10-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-11-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-11-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-11-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-11-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-12-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-12-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-12-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-12-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-2-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-2-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-2-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-2-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-3-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-3-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-3-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-3-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-4-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-4-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-4-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-4-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-5-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-5-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-5-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-5-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-6-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-6-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-6-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-6-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-7-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-7-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-7-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-7-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-8-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-8-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-8-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-8-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-9-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-9-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-9-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub-9-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c: Ditto.
	* gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-1-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-1-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-1-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-1-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-2-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-2-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-2-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-2-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-3-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-3-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-3-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-3-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-4-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-4-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-4-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-4-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-5-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-5-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-5-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-5-u8.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-6-u16.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-6-u32.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-6-u64.c: Ditto.
	* gcc.target/riscv/sat/sat_u_trunc-6-u8.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
index 55890d8487ce95da5590275c120972b212c1dfee..50f0f1f063105ac2abe556744bbfdfaa895057c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
@@ -1,32 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int16_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_ADD_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
index 29e843f3c7be13cbb4b81d44437925d5fa1708c7..dc6581736357ac3d4542fb9003014f801acb69c7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
@@ -1,31 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int32_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_ADD_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
index 7f29d21d1037f641209ccd12b102fc48f846e062..9995bc7b9cf1498c0e2a823afa60db88f9ca0c36 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
@@ -1,29 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int64_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
index 3ad7bdd9164ea03760470637cd48de8d28e73559..caf745a6f9ef39d99b3be93fd2cb6c41d145f3a1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int8_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_ADD_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
index 07d31015c13227d75bf9f3fe2dc5a3f959bbcc89..f19187dce498d5bc65b4b991f610ba3f12d7d248 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
@@ -1,32 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int16_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_ADD_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
index 81b85b4ab6ef4000ab3d3672c99fc80f33e9a988..88dc37d42f74a3351524dc18b052c2916ecb6337 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
@@ -1,31 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int32_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_ADD_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
index 9a3d83e8edc87d444b054aac65520cf7d7046eaa..891d6cfaace67e3506db3acc724f6ce3f408663f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
@@ -1,29 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int64_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_ADD_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
index ecc9a0f733c4a48880f1e181420c22e8dd34dd2c..a07172bea801de2a0f1d06dca53e4ca14ab54303 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int8_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_ADD_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
index 7e933856e717f66a6e03c43abf637b7038cec4cc..50771988725030e12e5626d843324aa6ebfe978b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
@@ -1,32 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int16_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_ADD_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
index 09bf497cc10af6a784c41c782a1581b476230861..07af4e1a75b8862b129ea12f358453d618938c92 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
@@ -1,31 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int32_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_ADD_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
index 5652cdb9aea74a79e89974b2c292f953b33987da..7c4be5b19265efb3ac07070349e9728765861d22 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
@@ -1,29 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int64_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_ADD_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
index 0eb0c84964962f406462f47cc504403cff84a0bb..fc0e1b7bc38126cf61be6534041b369c5140dc0c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int8_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
index 9dfdb9eba9af88919e42b30457f04e03d1c8c719..4c0b38a87c394ebc7906723119d107a19b986137 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
@@ -1,32 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int16_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_ADD_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
index 74df576b5319e25d9ffb504e7626d6a201f3310c..45b4638d8dd272562a53253227d785528e5ce838 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
@@ -1,31 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int32_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_ADD_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
index 5937699766f30ed2d266cd0e3966a921b8bb7bac..294eb52b290ed1cd3968a063368d0fa14541cddd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
@@ -1,29 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int64_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_ADD_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
index af850d0d15585bddc878f912534ba94a85dfd421..143fa3ccd4c1c6bf55aa42534825e3693578531e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_int8_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_ADD_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
index 2e23af5d86b76a42fd9e9649eb5cc47d213a22bd..414cb6188c367075ea45c9f10820282a37c27962 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
@@ -1,57 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int16_t_fmt_1_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-7
-**     xori\s+[atx][0-9]+,\s*a0,\s*-7
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*32768
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*16
-**     sraiw\s+a0,\s*a0,\s*16
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
-
-/*
-** sat_s_add_imm_int16_t_fmt_1_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     not\s+[atx][0-9]+,\s*a0
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*32768
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*16
-**     sraiw\s+a0,\s*a0,\s*16
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c
index e63211ffc1d3ce47e996e5dedc084030ab45f729..adf5b39ad32667f5a30737f7c5e283b49ee52594 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c
@@ -1,54 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int32_t_fmt_1_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*10
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-**     srli\s+[atx][0-9]+,\s*a0,\s*31
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-2147483648
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,a0,\s*[atx][0-9]+
-**     sext.w\s+a0,\s*a0
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
 
-/*
-** sat_s_add_imm_int32_t_fmt_1_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     not\s+[atx][0-9]+,\s*a0
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-2147483648
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     sext.w\s+a0,\s*a0
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c
index 3843b711da8543284f153d370653eb87f6f0f450..b88e064a426277102fdd04fa1d004bab0cb9cb4e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c
@@ -1,48 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int64_t_fmt_1_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*10
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-**     srli\s+[atx][0-9]+,\s*a0,\s*63
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     srai\s+[atx][0-9]+,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-1
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     neg\s+[atx][0-9]+,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
 
-/*
-** sat_s_add_imm_int64_t_fmt_1_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-**     slti\s+[atx][0-9]+,\s*a0,\s*0
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     srai\s+[atx][0-9]+,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-1
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     neg\s+[atx][0-9]+,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c
index ceae1ea2f36422d6fef7f59039c2e17ffcc22b6f..0e337efd1fa1be9ab249a004a82b4aab8fdd03b4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c
@@ -1,49 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int8_t_fmt_1_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*9
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-**     srli\s+[atx][0-9]+,\s*a0,\s*7
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     xori\s+[atx][0-9]+,\s*a0,\s*127
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*24
-**     sraiw\s+a0,\s*a0,\s*24
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
 
-/*
-** sat_s_add_imm_int8_t_fmt_1_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*56
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-**     srai\s+a0,\s*a0,\s*63
-**     xori\s+[atx][0-9]+,\s*a0,\s*127
-**     neg\s+a0,\s*a5
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*24
-**     sraiw\s+a0,\s*a0,\s*24
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
index 14c5d511aabb1296a26b515bd7684430bd5c6cb5..f217fe1863de9399f5090315f02d0754e4a9bfb0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
@@ -1,57 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int16_t_fmt_2_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-7
-**     xori\s+[atx][0-9]+,\s*a0,\s*-7
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*32768
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*16
-**     sraiw\s+a0,\s*a0,\s*16
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
 
-/*
-** sat_s_add_imm_int16_t_fmt_2_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     not\s+[atx][0-9]+,\s*a0
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*32768
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*16
-**     sraiw\s+a0,\s*a0,\s*16
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
index ecd757d903f08bfe50e542a74dc2e524dabc62e2..4025b5ae53491cd4d5268c83f3cc7e1c15f823a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
@@ -1,54 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int32_t_fmt_2_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*10
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-**     srli\s+[atx][0-9]+,\s*a0,\s*31
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-2147483648
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,a0,\s*[atx][0-9]+
-**     sext.w\s+a0,\s*a0
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
 
-/*
-** sat_s_add_imm_int32_t_fmt_2_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     not\s+[atx][0-9]+,\s*a0
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-2147483648
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     sext.w\s+a0,\s*a0
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
index 07d798f7fd00bcf9073587efb7fc816a19d77b2a..3fc2514e6ab7b2bb706c2e0d050f2b38b7de0243 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
@@ -1,48 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int64_t_fmt_2_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*10
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-**     srli\s+[atx][0-9]+,\s*a0,\s*63
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     srai\s+[atx][0-9]+,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-1
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     neg\s+[atx][0-9]+,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
 
-/*
-** sat_s_add_imm_int64_t_fmt_2_1:
-**     addi\s+[atx][0-9]+,\s*a0,\s*-1
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-**     slti\s+[atx][0-9]+,\s*a0,\s*0
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     srai\s+[atx][0-9]+,\s*a0,\s*63
-**     li\s+[atx][0-9]+,\s*-1
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     neg\s+[atx][0-9]+,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
index 273421194232cedca56ef42cf54a1ae9baa465cb..a0e15cfbe4c8fc3907746ff6470fff4241ce6751 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
@@ -1,49 +1,11 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_add_imm_int8_t_fmt_2_0:
-**     addi\s+[atx][0-9]+,\s*a0,\s*9
-**     xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**     srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-**     srli\s+[atx][0-9]+,\s*a0,\s*7
-**     xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-**     srai\s+a0,\s*a0,\s*63
-**     xori\s+[atx][0-9]+,\s*a0,\s*127
-**     neg\s+a0,\s*[atx][0-9]+
-**     and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**     addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**     and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**     or\s+a0,\s*a0,\s*[atx][0-9]+
-**     slliw\s+a0,\s*a0,\s*24
-**     sraiw\s+a0,\s*a0,\s*24
-**     ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
 
-/*
-** sat_s_add_imm_int8_t_fmt_2_1:
-**      addi\s+[atx][0-9]+,\s*a0,\s*-1
-**      xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-**      srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-**      srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-**      and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-**      srai\s+a0,\s*a0,\s*63
-**      xori\s+[atx][0-9]+,\s*a0,\s*127
-**      neg\s+a0,\s*a4
-**      and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-**      addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-**      and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-**      or\s+a0,\s*a0,\s*[atx][0-9]+
-**      slliw\s+a0,\s*a0,\s*24
-**      sraiw\s+a0,\s*a0,\s*24
-**      ret
-*/
 DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c
index c244eb40947e024b8696341957008ceb47a94727..734e8bec0362fb04198da129cb8c730bc6ef014a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int16_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_SUB_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c
index 9d8245d49979745db306512f6c9130f8b6c4b5e8..3aa4c583c2c5f9a858f9e79b6e6f2ed74e87370f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int32_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c
index 929de162d5749771afc82a3017e117e52db3e8ee..4c0caa14b96cdc02ff7897030a1775af52c1a701 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c
@@ -1,27 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int64_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c
index a918d5ca0f44f6174caadb2b93224b2364201685..6c1441b2e4862794e1d49f202f5936312a79d2b7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int8_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_SUB_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c
index 2da1c0d35010434e13971419696e85b2cd1b25e6..57a43276bf1706df7f682bf8fec7eb67b946fbdc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int16_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_SUB_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c
index 20b28e75f2d5da25f354580c0282efab8f8ab311..28582fbaa12f687f577213e43564393bcfbaae19 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int32_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c
index a5401983e7d99867bd1e8228ac7eb70956e17f39..130ca46fc5502f2def8440a89be1473ca9f222cd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c
@@ -1,27 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int64_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c
index c54057d14c96af009366010eda7bf7cc75576713..cd407b2f71a3bc93cac81d73951fb885fcf8028f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int8_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_SUB_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c
index 469a11394bd84a00c8c88ebf441114cdace0c84c..748d61a4f20957b900e2875420682d94975459a9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int16_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_SUB_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c
index b2c03f682a298007a5e038df992a4c25c51de284..be7869ae6330860f820dc9ccb322031c8deac4ec 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int32_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c
index e3fe6c78ca6a636845787a79dfd03749b279ef00..d16a7fbc7e86fe502c0edcc25cdf780fd8b9806c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c
@@ -1,27 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int64_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c
index 150cde1bf66a6c3efbbbb03b5cba8d07e71cc2e3..14a245442436f4afa4700767e18d52a0e8a3fb26 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int8_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_SUB_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c
index 26d159ca0b5136e01d62bfb446f823606951b431..614d1ec1de1283a1a0596fe3d6b07a56f5851926 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c
@@ -1,30 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int16_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_SUB_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c
index d576c38cf3281cfa0f61d28e67a6c3fa8b59644c..2f52bd70f2914ec54d767216fe27f74bb9f9128a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int32_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c
index f42ffea5f9f691f2834c0a61b7ea451e257eab7f..cef478b2861ad9a18d1efcc586726e49009ce6d6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c
@@ -1,27 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int64_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_S_SUB_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c
index ee510a6340b30a99861d26736dc75a24548a3ca1..3ed7790ea2ff53151a9582133de2143e4a67d4ff 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_sub_int8_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_SUB_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c
index 451a3754c4fc9683b986262aca3a97c9a35d2610..6d1fbc4fa5a0b8a71307f55738af155799c861ba 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_1:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_1(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c
index 2aafb94cfe875cbbce6860ff9dc5f32a5877a07d..56a66990676b89a9b9ff13842f4d4edc5904f4d7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_1(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c
index 6e21ee3dbe383693129626d795ea8b579d65e25b..10c3320b58c0a0357d499c8549d6b26d3aa6152a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_1:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_1(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c
index 5e971e402cb0182a60403c5faa23ede969ca1bc9..558d704331c19aa92e4689f71f02fa3e19490931 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_1(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c
index 87e5a52570cc7dfc4e50ab544d9622750611824d..02bef462f1a4dd4ef28ccd3b4abf994b066eaa6f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_1(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c
index 22a0dd4ad8437e6f5083f64d7bdfbcd896f2f5e3..da04904fa6bac21463c9ba052bf9514628601683 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_1:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_1(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c
index cb307acd985178380b5d6d8046c1cfddbd277251..41391e2eefa3e75336a6f10207697e38d9b0ca41 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_2:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_2(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c
index b4bee212ddc7cc0f87ce1a3493a5f32745298e37..3e5f9e1fb64a8bf6c2e3ece105b7147816dd20a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_2(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c
index c467c8d49d4e4d0c00c5a7549b6794805f2407b8..228eeab9cdf21c84d3b734745fbdc96329c8e3f3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_2:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_2(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c
index 883b77b62b88de084ebf28ba06ee21353a47a73e..78542ca0c97e6095adeef9e755353dc96dc3e26b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_2(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c
index bb9ffcec332e11721f064ef6e33cf1d311799543..556e8ea3ea0110783bfbc481b40ec57fc21a7246 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_2:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_2(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c
index a54db487c38d14246ad9d5c06bc48811def3fb2c..918a8c3b8bca3ad1a01f50427138b09e9fa47358 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_2:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_2(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c
index 219156c1bafeea0c60c8430d0222444abf688b9f..13c0291e61bb474976c75e3ffc07336d4688b6bb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_3:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_3(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c
index 87b8a70bc2995f464fd912fae84af7cd3da146b8..03077b722748de6e4923ea4c794b6be50b618337 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_3(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c
index 7acd515b7120c09e3b4867a8d7aeedb1106c77a6..e09a88d95bce984e186c2373c0a70ba26f779d51 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_3:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_3(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c
index 9141f08d2f248d64f27d67ef6296645c10076b7b..ca071d154416ca4fb59cceef2506604f7e503694 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_3(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c
index 839a6f764b1cc48802e779a3aacbe9653d55e091..4acd93ce064088601834b2a9fd31603c0b03afbb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_3(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c
index 5d13f093356c5e8017e827ffd742c042551d34ad..362970cb95eb5145257e2f363a71ad782320cc81 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_3:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_3(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c
index 34dc80413624364f37c319aea5ec80f85ac5ddb4..94d9cc47783d2198f9d97dafb3145e9c68ed6d0b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_4:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_4(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c
index 89c476ee2c25c6756bd558ce02ea952bac052731..51a6e7b9e083e927c8e8ec09f9b846636c081fc3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_4(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c
index 03ca7b7aadfc8b54724f6ae8cfb24cdb28cb7ceb..9101b40fc8409757b293aeef6c6e51f44f2063f0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_4:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_4(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c
index aafe167a964ae870235ec525b99558cf0d5451c7..48452e3617a892f37e611de367842dacb00ead12 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_4(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c
index 08e5eb3201a5707604123adef848f76c1ea3baf8..6757913b140901a6da2e0def128290201ec9b544 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_4:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_4(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c
index b0e71fec47abe37848cd8ee99bc57c1c682d5bba..9c6558288c6a1a3f5faecb9542bc7f3c81d95306 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_4:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_4(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c
index b42c75923bfd36c4382e96bdcbeab8b3ea7031bb..f02f8665af071aa856a62bae75ec65763ae6fa95 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_5:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_5(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c
index 625372e22627aafac4da64ec61f8ee24b9786910..6753c03399f03a2a30f99778b66cea7e7ce883cc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_5:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_5(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c
index 250e174fea56b2a949cee8b60fb0c76cacc1f36e..3fd17fa817f4201c375f0bd59b6e70fddf201d8e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_5:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_5(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c
index 4a6ac6d2c3e56f41ca162e7a82a24836e1bd99fe..fba761a56686db41a062ad064b70f922e7af9a1c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_5:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_5(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c
index 02aa6dbde017271e4d50751a2c05ffe66af3b56c..8872f7fd41737c241e028a934cae9883e5026394 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_5:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_5(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c
index ae1bcb9891057862dbf5bee8e2466fe333901fe0..13539aa5412fd9ace417a5aa2452051ce8032cb9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_5:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_5(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c
index 9a740d71c67d5e4617821f2e46494a859d425491..4aa9a8f56dfc1e581ddbb14a85899bd19cf57d90 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_6:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_6(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c
index 1e42bfd749fa6d4567664ae1b0a0453b329cb103..a772ee8d081a421597693da722706f87bbffeaa5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_6:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_6(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c
index c3bd46dc5b4ae8269a3edb4b945fb0c77fb379d1..9c5d88b46c284d4512560bd0353f51f8fa9e7bcc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_6:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_6(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c
index a6575f5e127e961b47647b3eb85231b4105dd069..f9f18e982eca74b920be286dc3ba84ccb236cbc8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_6:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_6(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c
index fd7b72e3cb8b9c813b42c246c6969fbc201579f7..3658fbb32d3d18b810e3bdc1bdce9dccd26b1533 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_6:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_6(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c
index 242d2d028b1970a6d115e85f75beeda6f3e946b2..f1a7eb808ac5b5b0f67f72ee3be6fd397170df9f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_6:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_6(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c
index 3f258b877f0c2ad3b171d97fe66f2f2f689bc05d..50b06d54a30714c948a77df460da0dace1be4e53 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_7:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_7(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c
index f37a57e4cc240bcedbd46d62f1eef40d0ae8efc9..12be22079c4395c9980c1370b054dc08e21bc6c0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_7:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_7(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c
index 4e4a7eb50edc01f85d8422e03d7182c9c9e99901..cb7353149335435cab0bd231bc7df7e3035410e4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_7:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_7(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c
index 29b64b46008111aebc49ddeb8e90b8d7c5cca26b..d52394c7d35d0bb2ca4c28d3dcfb07b351e363c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_7:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_7(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c
index 2bfe898f68000a3f6b27de5ea4cf78713ef0e910..cf797788cae99d9a2056b8c0558fee5300cb5e20 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_7:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_7(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c
index 494a3147bbb89e6d34b5706b0663be0373fadfe0..67485a37068ca958fe0668f4194a742989559f8a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_7:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_7(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c
index 678dec661173c3c85dd310f74cddd07fa3281548..a34bf4ae80f69a4d48c126c148dc0179b27c6cb4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_8:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_8(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c
index 4acc78994755c4edf61f79831b19d41bcbb1f90d..9c25ff081a7e5a66fb8f836867fffe85c33e9afd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_8:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_8(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c
index 34a992b4f6276720d4fda258b08fa259cf732ea0..9ee75e2aaee65219a188f9323f27b684fb85124f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_8:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_8(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c
index 1919ba5431ceef045f29151044f199cb7a23baae..8cd361e1c0a073067e3c237549ceb5583d3ee1fb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c
@@ -1,28 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_8:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_8(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c
index 541e55cd9836f094503444fd736fc76080cbfb6d..ace064b2f5fd0b6883ea6add9a8e13ed29cfc06d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_8:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_8(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c
index 36a00857145dacd2b543a1347fd7da20eaddebff..e9a4d3bdbdf0afefd64fa3d085ad8f213a93ecfd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c
@@ -1,26 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_8:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
 DEF_SAT_S_TRUNC_FMT_8(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c
index 3c916bcb99509b53f1b258f6235bad3ee60baedb..8f1b5c0e2d013d61b3f393e045d5d9cfa3b8a953 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_1(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c
index edded3ebc0e8741917befd988aa4923329633590..2c66eee95af300aa60a354f7362313a872ad56b2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_fmt_1:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_1(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c
index 821e4bc5afeaafa4f78bb3a88b8b4febb994c905..28d7b7c0d35695ae99d0bfe5a1a88e58f91871cf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_FMT_1(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c
index fd73c3a5f7a73e4f300a09dd5ef7fff0f616e29b..ab183362b26a91c11761f801ee1d57920fb56e71 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint8_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_1(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c
index a166d2888bb7a553ca53b2a0b8d28b23f7ba1a71..c03b15d38b2caf055da114e159b166b1c5ba4daa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_2(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c
index c06731b130ce12c596b8fd13debb0157c9b71bb3..f753c014a0a52afd46655df2c0feedca1de023c6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_fmt_2:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_2(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c
index ae10dffb53f273cd695ad64e038838a710d7fe47..cad539c02d897ada2ee82805824512ee64f27570 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_FMT_2(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c
index f3977be6edd1282c158a9a6ff78ca6de056f0b01..b595241629ec4de60f98c3dc9a4ebd1e33b8c636 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint8_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_2(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c
index 5898c3b75de7475e9fdd0ef7012106d31c9fe84f..08cd82094bbfb5fa0fda2a804f684c09ddbcad76 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_3(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c
index a1017c9c0a4dc7a210faf6bccaffd74e4c41078c..e0b73748c30458a84e45bdd0995038359ea0d482 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_fmt_3:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_3(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c
index 83fcb602a8bad1c696995cad7ec7be88e20558e6..7ce0121e0c435be7d837b9dba9d541c46d2aad2b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_FMT_3(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c
index 2c398e0c1f77504e09a8599775a2613390707a11..48f61c1237905dcd86df71c7b90bec238fd7023d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint8_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_3(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c
index c18a5d5939ac35c2c8ea642f3bd2b004d94534c6..49d5af1e3a1a32d02c53f9a597c9930b3350912e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_4(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c
index fa2e55dc4ccd9532954ad5e7d6abb286d88a967c..20ad476d71dabfd16d99c49ee25bf10a8a3b1c1c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_fmt_4:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_4(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c
index 6818c0c2059a02922f768533e20aac70612393cc..6d2c9a7f0003a19bf9c0da52a4acfc468f615a58 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_FMT_4(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c
index 1096de849f00ada38a904d89748dd00cd8ba806d..15e613bceff17c62f795f67fbc755ec1b9c38cdd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint8_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_4(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c
index fd4be5c46284bcb49975a90999d8f317d62607cb..225ba0c68c899d29ac28f8eba99dcf85a6645c24 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_fmt_5:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_5(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c
index 4fbc80780c594c7a1eb76a66e00434e86b857e5b..106baf7bb02188afdd62640fd4f705fd2ea593a4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_fmt_5:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_5(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c
index 5bc29487442a6c69c79408de7451826eea16d233..48e84f63fe356046d88c64708676d419192f03d6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_fmt_5:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_FMT_5(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c
index 74109c3b5042f8473b6c90e0031cff5ecd7f2a91..9c0d42a652e584b632d7a270ef75028f17f14c37 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint8_t_fmt_5:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_5(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c
index 3cb9cbe7895d1dcde3f22276c027e85f496858d6..0b541e0805d7b42156005c89fba2836307da58a4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_fmt_6:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_6(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c
index fd1cb1ae33f8eb5798f07da83aa25c52d037c33c..ee791566c2466f36c1227ee799dd445ca802e63f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_fmt_6:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_6(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c
index c968f3358ed0c5301cb131f65e6d8683855f9794..fd79139242fd1717e7e1c80e923359f622bfe8e7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_fmt_6:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_FMT_6(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c
index 9cd95ad6337db7d5e1b4ab19f27a1969b60d3525..f826aa4025185c6ec0b3663b975f3bbb2db1bf00 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint8_t_fmt_6:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_6(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
index 527f8de635170720889010bfec9367c9c76cd57e..446a951e310fdcdeca90a2c472d908a622e2202e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_uint16_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_7(uint32_t, uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c
index e9031dedfd1ebb0f4c6f8bc10c68791f6bf8447d..626effc2cd838c81faac15f6b2a8f40a9aacbd36 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_uint16_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_FMT_7(uint64_t, uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c
index a71bd2f479a447c4d13d360cc93ebe1f9513ba5d..301463437433708f4a87a04382c532b65b1e8348 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_uint32_t_fmt_7:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c
index 589298643fa9f7a2cecd40efc872b1f50553c279..541a1d8791bb72b152bd65d4a7693f8434740445 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint16_t_uint8_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_7(uint16_t, uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c
index a42a712739e4df763d002b6e1d6f4ba769d53fae..26749a8a3ed3a50be53766d85e1c2d9e65cf4e2e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint32_t_uint8_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_7(uint32_t, uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c
index f37ef1c4543d7dcdfdaa729817beb3dbd234ac5d..321f6622b6c66b7c0336532f873e5102ca82da96 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_uint64_t_uint8_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_FMT_7(uint64_t, uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c
index 3c31ac3b650d55ac95862b634164992cd5c051c1..b6388dce16f32d1247e287ada806eb49f0e1c5f8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm3_uint16_t_fmt_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_1(uint16_t, 3)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c
index c6b352c21e4883821c02b53891c78aa9afb026ca..cae67960785bb64c8f542cccb6e558dcd2668680 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm7_uint32_t_fmt_1:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_1(uint32_t, 7)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c
index 1d9df3c3045ce067d38c968cdbc875ef22dc7768..f9d6939f8d90a037c72891fdf7faf5d1c2a2f0e6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm8_uint64_t_fmt_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_1(uint64_t, 8)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c
index 101acd88d38cbe8e7ac1c58e199921cd0b4a3a97..d90209a142727e2f8ad0aa29de82d003a945a67c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm9_uint8_t_fmt_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_1(uint8_t, 9)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c
index ac57cc92fe493e3376aac0125d0942593bcf1b41..a34194d636ec14308983276f70b1c8c02b0ceaed 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm3_uint16_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_2(uint16_t, 3)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c
index 6aca60ca709676b14d3c287db7fddb18219a767a..9a801d24d9015f38419fa3c6d9f80da7e2e0527b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm7_uint32_t_fmt_2:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_2(uint32_t, 7)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c
index d0417243ff0a36a994aec5f2722777f32d7405a8..2eb57a3f3d4c89379c9a9be553468abc79796ad8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm8_uint64_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_2(uint64_t, 8)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c
index 7baeb8d603d1555bcef74251aa3d927af517ccae..363b2df8f6644b9080f9539d3119c487170807c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm9_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_2(uint8_t, 9)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c
index 6dbabf6f514343645cd935cd31da281a4646728b..aaf1209f043f8c990c145e190b8e512bcad77ec8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm3_uint16_t_fmt_3:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_3(uint16_t, 3)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c
index 1c52b219cef06e14c0034db5f1e11973081ed2e9..e430b37995eebb0c6a569a9294b328fb816af41f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm7u_uint32_t_fmt_3:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_3(uint32_t, 7u)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c
index ef60ce24ec82c4a82240c5601ed54ee089eedced..aef5c5832f357b3861ae6dfc42ad821037c8c680 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm8ull_uint64_t_fmt_3:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_3(uint64_t, 8ull)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c
index 81a4b217af62238740b2f4360eb19255367bd11f..039d982f070ecc223102bb359f9c7ab9cd688079 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm9_uint8_t_fmt_3:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_3(uint8_t, 9)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c
index 2f6c04601f3cc362dc322b9c17ffc28ba945beeb..baf70c3cd6122ea3bd00d0b717ef44b67f7b88f7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c
@@ -1,21 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm3_uint16_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_4(uint16_t, 3)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c
index 1fc9a50a8a2a64672246bb78cf60e716c9f44a83..a4bfe50ba4f03bd8ed2a6c96644dfde342a38d6f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm7u_uint32_t_fmt_4:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_4(uint32_t, 7u)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c
index 0ca423c0f01f3a54ada967ed92fadf541a76c22f..f355de60d953efe4011a5eab428b6e0051c414aa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm8ull_uint64_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_4(uint64_t, 8ull)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c
index c8a43fa2c5a6b441bd8fa75f0c4cea2442176214..54880d7f1d0731770e228465365458503e3eab66 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_add_imm9_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_ADD_IMM_FMT_4(uint8_t, 9)
 
 /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c
index b60c91c49488f8ef94289daaaf04c04cade58797..cd6f2f8f9e9ef834acee362a4fdaf47bcbf62fe4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c
@@ -9,3 +9,4 @@
 DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
 
 /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c
index 1ac6f39ee923ec03690886b5bf73c8e47419c5ed..dea9f6d83168d23d1edc850b413b8ba817a0f20f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c
@@ -9,3 +9,4 @@
 DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
 
 /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c
index af12d82671896d25576450208385aba3cde1745a..d8a01d1a06facf9ec50022aa7a9c27891b55648c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c
@@ -9,3 +9,4 @@
 DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
 
 /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c
index c73353a22ee81de41acb82d83e640eb396ce6bc5..dfc9d2e2abb067b7185a93725dae9fd293e6e670 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c
@@ -9,3 +9,4 @@
 DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
 
 /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c
index eb140ae4ca9d01f9b95955bb392bf10999cac2f9..66a439ecc0285859dec1f2dbfe834fb30147a895 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_1(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c
index 59ad242c9b3b4dd44befcfdd405d6ee801a0c16e..6f40907a87ae6e89c68968315af8d75b369f45c2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_1:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_1(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c
index 47a83823bf0548f9fae67c2a9a0d99813b16d4da..647fc6dc63d978e6382003afe4ca81083b636c91 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_1(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c
index f01317ba257a83a7293a3b08498f5fdd5dd15e61..a344c58fff3e3ea738fa4c5e7c9a2b0c6828a67a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_1(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c
index 4b7bd3a951369db425cb84dc8cd482fc9657330d..87fb1fc2211be75947bc02965f0eeb29a74a3210 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_10:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_10(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c
index a28213f44a55090abb7aa720bd515f5c42a29b1b..280236a1d68f75a5111b20e8228b18cb6eaac649 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_10:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_10(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c
index 432da0cbddc684b4861d787aa4a009cd6bebf334..4b7d339f750965402d475ba9df2ceb057c963049 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_10:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_10(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c
index 0658d38bc844cc3257dd1030a5e73b89ccc199ce..191c3a59fbbaffaddf8284ce650b165604b866d7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_10:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_10(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c
index 2e4b875f1f92d23d4191fd37c74963f81d1e10ca..9dc41e12b0fb053d558f57d984028b6a9807a1df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_11:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_11(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c
index 61fb80f0320302cbcffbb1db0ea0710a3b2ad30d..475f94468ceb7233697df3f960d1ae22b1530e51 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_11:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_11(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c
index 2a28b1f9a60447a014240121b1834431d7c39910..61e3584f6106146366531635b5c8a54cf629e103 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_11:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_11(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c
index 3033844bb6298b1e3cff3e2c409d4ed619d7793f..7a610556c247b791a62161d7e7b2912d998cab7b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_11:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_11(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c
index 9cb86dfe7a1ca3dd57e5e900262c461b2bbac2ae..c4d21cb81019cf89bb18b2fcc2eae26466bddce3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_12:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_12(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c
index babe768f80a1c5a410def54c15f215e73f1b5b63..56beb836df6ac086f6a50769119190ff2179eab0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_12:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_12(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c
index 294ef5a15024e0b927a2d21ee7bb4c8e42ee3e3b..1bef3fe28414469db5a7406223992a322e0bed84 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_12:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_12(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c
index 8b8f924ffba464694794f675ec828bbb0d9d9d6e..9004281c843103d57715be3fb857945d76e48d3e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_12:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_12(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c
index e724752009a8d7392a9e5451c8589aea1908d3ee..7b85582e99db833beaaefab1d688614ba9c43d16 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_2(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c
index 9240406ae500c644cca0ebb42204eb145fba6a86..cfdf66c0d6eee28d75859026452d59917e032e79 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_2(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c
index 3e1efba779cf4cc5c09692154c05b226a31741e9..38988176158e0469f27675a9e4ab871724d6a866 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_2(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c
index 600688a75ba01f5b93459c9e3ae1477fcb0aee74..33182114a193effb20b5cd2478748958142e7421 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_2(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c
index bb2d0b703d134d2baa2831ebd2a29b4deec117a4..61bb5e5136fd9e5baa28cbae19c161927289f482 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_3(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c
index 06635df2393def82a429b3ab1fa63c6ff4c3680b..73bfa99a272714e1daf2c78e2c307d74a9644d85 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_3:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_3(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c
index ac485daea732ebc087e7ddcde34173b5a85456aa..24d1e695844712126e5350d0c3ffec98a48c12fb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_3(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c
index cdc8776d8e68f2e348ac801fd7eb1a3a4e7477db..5523112f96f4b0a84302020722d2d50bf03cf6c7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_3(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c
index 407ff8f9787e180557d0d671833b6e65ade1b82a..fb6a604164a2cca1bf4c045453d67e1490caa7a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_4(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c
index cb2cd057441cba04cc5825b1e8815ab63b38ee95..0f7e2d30b44e017e00f886d76ad6fa311eedf1e9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_4:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_4(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c
index 0ce6269bbdfaec120690154e1cd7d3d791067732..c762647d543ee3889a57b8a7853f70043d96b5b6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_4(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c
index 302206ae1c8002303cf3131a4bd67996a03d49a1..3e5d2e61a899b9a1da977905a42581ba20639a83 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_4(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c
index ce2758f473d920540c38904dc699f7b5bc712447..ab1b375fac09a1dbc5b0708d006335aa8491b576 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_5:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_5(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c
index d33cef3b633d0186c0ad00f756280904bdef4e16..1b8ce8451020eeb376b3c522ffb7887f3b65ea71 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_5:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_5(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c
index 1bf1e97968cc7dae7e81d5e7f35972240f0a7e65..3fc4e7acbdb8fdefbf80717835310dd2b780f35f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_5:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_5(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c
index b2ed732f2ad0a74815378ecc925cb57798b2a32b..5c34ead2d1098963d8cc9a5fa13720871ee94edf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_5:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_5(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c
index 20614eccf0b9f60b3b103140335d9c5898e8eec2..70dc6ecafffa4825db7ea903e2a0879114cb9569 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_6:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_6(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c
index 5d7adfdd011fec054536e1a59a23a08bb5196054..cc360362695ee054b2150aeaacb40f218b4a11ee 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_6:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_6(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c
index b3c6f8db45897307f1939e66f28630374cf8712b..ea633ff6f25bac1f23045d1d37fc95a77ca5be8c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_6:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_6(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c
index a4f92a8d048e78bb11dde8cd95e6e8cd43edac0e..7c4747a68a17ac2694e4ccf332f8532ef1ac6e80 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_6:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_6(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c
index ebfe6739f16377a8e52e79ca5deeadf15cbde038..cac84714fadaf45ef60ef5d171b7788d1b44cf79 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_7:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_7(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c
index 98841234dd2ca8a3c62e01d7a7f299d33c773056..18b8e5f03b9f389b75c96b4329e3d2b66073674e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_7:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_7(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c
index 67236d584e881b4b7c02d4ef973af668d06426f4..f5ade61c45d0e52c25fefea13960caa69070259d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_7:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_7(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c
index 549d9d2ffa0704d43c535223d093564645824b02..9b528a45b93da45250e4b07cd149edb6870382db 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_7:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_7(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c
index aa5aec7fd12d0e1b9a5d46634d14f691199af425..0d093c3ac9bc67fe57f72b2ded649a06b448a56f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_8:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_8(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c
index 89a8cc957f48dcfb4b6a51d742b003ba5fb69481..f04ea1d36db01007645f80719404b4daa401913c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_8:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_8(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c
index a52948d3e4269b55eb020a6cc26183f5f525fa62..17dd8f38d99b4d9dff6e1989011fdba7c34eac91 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_8:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_8(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c
index 5606733b2ae2390e44c126106febbefddbef895b..b043207cddc808b8917ffbba4a13964e1ef2ed62 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_8:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_8(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c
index 984867ae1d778103c9c0765253daa5718fd09ec1..19b1a5bba714cf6b74f755e60451a57bee593b30 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint16_t_fmt_9:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_SUB_FMT_9(uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c
index d1109a4ea341284c9332c7904b092dbc3e6736f5..a0026a1fc89121c77d41acab7865ab85484c1cde 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c
@@ -1,22 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint32_t_fmt_9:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_SUB_FMT_9(uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c
index a9acf151079d95426834bf164d87a2dc1ee34f3d..01c155ea6e32063b35cd9c22dc1cf6113e69223e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint64_t_fmt_9:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
 DEF_SAT_U_SUB_FMT_9(uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c
index 47551fae5214ba5d2886c28734ee58110f8032a6..7b94d40f567bc50a41549158e8d88f4d6c4cb616 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c
@@ -1,18 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_uint8_t_fmt_9:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 DEF_SAT_U_SUB_FMT_9(uint8_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c
index 573ef110bf9f61e0779fdfd8a456f055d0a6b46a..475b31eb8ea98ff7acf255bf8bef1fda225dda64 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm32768_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*32768
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 32768)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c
index 0fefbe71d026a6817c352f795c35e36f5ea6301b..a984f84bf824887860c5422cf377175be9c1438d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65533)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c
index ad6d4f9693e30d2b3bbbd9e7e5dd9f8ec65b8b60..b2930d4fa8e5fc0cf896bdc2eca97380005b4a6f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm65534_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65534)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c
index 02dcbc5ba3a899094d12b23054ad4e76eb6ceb1d..362cf48823d371a5787106d21393498f7fa5278d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 1)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c
index 7346fbb2a9aec7d5866d8e6bb208604bcc01492f..9f17082b63ab07a85bd5100920c2d70f35ceb285 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm6_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*6
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 6)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c
index c7dac8ad86f19b9fc7a45594ce8ac87589fc145b..801a86eb9e653151b2fdf1639da378b06cc97172 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c
@@ -1,23 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm2147483648_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 2147483648)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c
index 4320db3c6f6f630cf56c5418fd0fcdf77df71555..e04476817402667a103ec156e6cf0e13b85abdb7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c
@@ -1,24 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 68719476732)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c
index 765d13cde6452446015ce2a0531915605af6d92e..5518064a1a1170269f1a798360627a7bf848b875 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c
@@ -1,24 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm4294967294_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 4294967294)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c
index ca11cf14008facea7d4cb02771fa4a0518cf934a..a4cb49bbf80076b5658967ed54ff047fc874cf3a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 1)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c
index 371193002353ef72a85603e9cdd5889119d9ee1b..64808bfc33f27853d7a204eb9c7a5b28568ecc73 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm255_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*255
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 255)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c
index 2e490f05de6d6dedb454d5a433d1e021c344fe1f..493a14d4cf2f1323ba8a21ee55b4780bbf13afb9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm18446744073709551614u_uint64_t_fmt_1:
-** li\s+[atx][0-9]+,\s*-2
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 18446744073709551614u)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c
index 45baa8fc32e52a2496fd623a0811b169e35fa43b..4faae52395ca4fc6c2fff798993f18d3836f3700 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint64_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 1)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c
index a29a6e95d7af11555e1d37f9f1752827e156b62e..3f993fdf6a309089e613441863e8735617e1318c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm82_uint64_t_fmt_1:
-** li\s+[atx][0-9]+,\s*82
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 82)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c
index d1c6e942e4857cd17a87abc4eb33f81da07bd5ff..a0d9235cd25f79319ba663365fb73a5244b931da 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm128_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*128
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 128)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c
index 4c8cf90e763087ac1fc538512b96820f09fefa2f..67dae03dfc00e9ebac31b8c326d7e0795a1bcbfe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm253_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*253
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 253)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c
index b958f5e1582a9eed4c29c411fcb1a5e03c6be880..005453264f2bed9424516d1d4385d5d70d42ac83 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm254_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*254
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 254)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c
index 1951ec5d64c37f64ee38fb976d7650ef9e5b2ad4..c12b5605832b0a9bf01cecd7d3935afd9b538399 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 1)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c
index 86d0b39eb6f9de87a82becc16028d6562b8042c3..ce9f495946ebc7d7db69257b6d9d4750e23390d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm11_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*11
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 11)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c
index 31c1bb81969d2e60cae41b7c839eefffb90b08e6..93d716983d8548ef9ad6a13d0a3facc339dca63d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm32768_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*32768
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 32768)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c
index 68807b947cc794486c67d7fde683df212f8fdff4..8ac2ce898b5896071182d37e8266c74b8a2b41fc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 65533)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c
index 62deec103f6dbcfadd20fd4a6fa161e5b63d398f..740d6acabf767a1bffd9a64a4448f95827d14e5e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c
@@ -1,18 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint16_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** subw\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 1)
 
 /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c
index f789feecc6c8819e0f6c87788c1350b0cad8a568..c82c4785648906a56cceff76a18f37f9af2f37e9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm6_uint16_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-6
-** sltiu\s+a0,\s*[atx][0-9]+,\s*6
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 6)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c
index 2f4a4395d3bf1362ccb20be1d4b7d576306edd12..b2f690a773a56cb0f77334f2abab355d81883bd5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c
@@ -1,23 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm2147483648_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c
index dcfba62e2207b249415160397f4cbd05ff71b8a7..e62010b0ef5deee2a17a7c79ae80c03698633a6b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c
@@ -1,24 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c
index a3f48f7bb2fe6b37728689767f18a39af958d163..dd063d89d54dbe3c2f128885c71dae78d077aff9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c
@@ -1,16 +1,8 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint32_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** subw\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
-
 DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 1)
 
 /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c
index 0bd8ddcdd78f49c412d0ad974b557b17e1b48ae6..c0eb8a7b95691fac686ee4e8e674a4736a2f52f6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm255_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*-255
-** sltiu\s+a0,\s*[atx][0-9]+,\s*255
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 255)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c
index 7b6d857a173fa4031d5971bfc67fcefdf97c0a2e..ed693137327325700c78f90b5d3da779f31e88d1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c
@@ -1,16 +1,8 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint64_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** sub\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
-
 DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 1)
 
 /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c
index c334665a1dc7af27f9c45fcbe13eb7413b18eb3e..fb7db13a4712bc5789914c43c9e8bab16a015241 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c
@@ -1,18 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm82_uint64_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82
-** sltiu\s+a0,\s*[atx][0-9]+,\s*82
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c
index 26e77f0d1ac47d6fa69c59eee1dd6da35ba479ee..efe6c005bf27007c9147db39907de14ce292ce1f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm128_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-128
-** sltiu\s+a0,\s*[atx][0-9]+,\s*128
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 128)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c
index c5ac1b0801878e769d30e925a704e2adc4707bb2..126264897f47aec04021c88c98ee4a8afbd2ff5b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm253_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-253
-** sltiu\s+a0,\s*[atx][0-9]+,\s*253
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 253)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c
index ee59b5adfb862f4e6e75428d70a60629ce5cbd72..108daf2ffe23d9f1752ef020a965d5f2cd71b53d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c
@@ -1,17 +1,8 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm1_uint8_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** subw\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
-
 DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 1)
 
 /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c
index 69dcc2a4a93be59ced9bf72f70013dbd455475d6..784a97bef4214c9e198d18b4cc35e48686df99bf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm11_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-11
-** sltiu\s+a0,\s*[atx][0-9]+,\s*11
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 11)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c
index f31236253eca3f8f93a6c69b8a5dd1278873258a..0f16f9cb2ec057aaa876b872b7abb0033b23a3ac 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm32769_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 32769)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c
index fa9a9eff18011359545a350ca89e5e50c1bd7ae1..49daab566ce4d6ec607f7b649ee11e96a9acaf0e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 65533)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c
index b98de41711e7b29c7b22002b033b1e6bcfd2474a..30fc2bf87b0f688cc06eb7effb3865fbe55eb0a8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm6_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*6
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 6)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c
index 79457a3b41d45558f245ceeac7dcddc0efa6091e..2d3c63dca52d3f35fb6a2a66462edf6c121dd52f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c
@@ -1,24 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm2147483649_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 2147483649)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c
index 2e8426e1f2daab0b770718a370cff0377d5ddcae..8d96c0062e435da08bf8f2bd28f4ba77e154c341 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c
@@ -1,24 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 68719476732)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c
index 845218c1d2e5d086b9d6c4cacae1afffd1512448..c06c441bfe3158e64175408d99429c5780f47a49 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm255_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*255
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 255)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c
index ee2fbf846da7d4841723a44811b0d3e224d9f265..4d2b96d5c0d3e67027b0a922c834f48595ca78f4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm82_uint64_t_fmt_3:
-** li\s+[atx][0-9]+,\s*82
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint64_t, 82)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c
index 8cc81e2253bb1f6c9ab748336f3daebf93e1fccc..8c3eb148e6d7c3c93af33bb84343b5b82e19b9c7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm134_uint8_t_fmt_3:
-** li\s+[atx][0-9]+,\s*134
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 134)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c
index 8d8c70bf3e6081159cd8b56c5a6d23cec8dc4b57..b02d832b000146478056f406567c7eab8e942530 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm253_uint8_t_fmt_3:
-** li\s+[atx][0-9]+,\s*253
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 253)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c
index 348d75b82d8a6605be692b570034c2cf593789a5..d8e0a6959d2499d9a5813e14657629de8f7d1f83 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm11_uint8_t_fmt_3:
-** li\s+[atx][0-9]+,\s*11
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 11)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c
index 089c1683b0412f18cbb460347307deae775d7cc4..8f3726f0b9b8ea6ee7869ed21af8fc2b15499186 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm32768_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*32768
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 32768)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c
index b96e3f3da8430d4ccb63d063e7f8790a72b41efd..56c377eb1c76d5d49f9d7acdbd1a533c7edf1f11 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c
@@ -1,22 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 65533)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c
index 5c209bcf1062886d5e33c6f1e59eb67040ed4e71..29c6b861104186e3adcb064705232125faeae6ce 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c
@@ -1,20 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm6_uint16_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-6
-** sltiu\s+a0,\s*[atx][0-9]+,\s*6
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 6)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c
index 2f4a4395d3bf1362ccb20be1d4b7d576306edd12..b2f690a773a56cb0f77334f2abab355d81883bd5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c
@@ -1,23 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm2147483648_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c
index dcfba62e2207b249415160397f4cbd05ff71b8a7..e62010b0ef5deee2a17a7c79ae80c03698633a6b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c
@@ -1,24 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c
index ee1ad9abae0781e6ed73dcf43c1764b5d1ff8101..6cfb1e4ca58acdcc641f087e5ca1b9f388f92bc0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c
@@ -1,21 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm255_uint32_t_fmt_4:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*-255
-** sltiu\s+a0,\s*[atx][0-9]+,\s*255
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint32_t, 255)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c
index c334665a1dc7af27f9c45fcbe13eb7413b18eb3e..fb7db13a4712bc5789914c43c9e8bab16a015241 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c
@@ -1,18 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm82_uint64_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82
-** sltiu\s+a0,\s*[atx][0-9]+,\s*82
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c
index 3fe4103a8c95bf6ad3db70cf39dd16d4ad26eca4..49a4150898a1418e38279f82c0305ea8b840c8e0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm128_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-128
-** sltiu\s+a0,\s*[atx][0-9]+,\s*128
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 128)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c
index 18dc5050e2b7f08c228842f93ce1c9e309482e41..1022de2b7dc6a391efd6846b1e61dc71d79c458c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm253_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-253
-** sltiu\s+a0,\s*[atx][0-9]+,\s*253
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 253)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c
index 5c40f3270d16a2aa290b3363094e01fef2c4bba0..48aaeb25d4439518dcfaddc37cff0d451ffdb750 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c
@@ -1,19 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_sub_imm11_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-11
-** sltiu\s+a0,\s*[atx][0-9]+,\s*11
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
 
 DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 11)
 
 /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c
index b73290af8e3cfc1d5ce2236bd3b4430162bb2e02..d36862160160d7ba2f85cd5a96edaf73c9f2bad4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c
index 8af803ffea3f37c7ade31ced21846b8c2b93e01e..02ca992f3102319bca5099efd24c4dbf30ab5d3b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_1(uint32_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c
index 1c887d4ce72d74caa9ba673fe67c64b2e71acf5c..cc01abd0c29d25e8954eafd9aba2c965b761cd30 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_1:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c
index 6bcf64bfe6166121fa68b871e4492c1b591c5826..e28ee5cec9f0b4450fe8068eab44d358955b2696 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_1:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c
index 8a35e72424b0fd10ef9e0296db88d11a57d522c6..59302cb77b17138a7e45a5bcfebf157f7f55b8d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c
index a3b52de44523f46ac2d85f1168655c342bde5640..735ea7e34c87747d3e0bee17ddad947c1e00cf10 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_2:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c
index b9b43f14c0b19b72aca7a4fb14c4f49a9de2b904..8fd3f437e8b68be102e642c123b0c54825f94772 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c
index 7ed3623b872b60786fd8b0ee64082f34e3ab6543..bb4ecc5cac1323fdc7a95f22e503a630a20f73ba 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_1:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c
index 7572c9e3404fc724da366f807f0be0dd395aa9a6..e476897f46eff5d36eeb0363a53045a47c11c1fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_2:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c
index d83b5dd6caa4b177018cce5d0423c3cc11247789..524d62560bdbe00bb597056125ec6727639155c3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_2:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c
index b7202f971a72334d60dcee8463cfda8a58e8f109..ba8b2380f11611c9f6733b41e6b062d1be781e2a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c
index e90b853516aeefd2c81f508635dbbf50921a4354..cba85733634bea9a598e30ab6032539155f674e2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_2:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_2(uint32_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c
index e8655b98db6e3f5fc9bce38567f8cf829fe0623e..58520280496a687a2ef38b8d6921d3cbf6aa2f3c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c
index 41e676a145483d0d882e172993262a59dd89288d..5d5cf973a851bdf6920af7b8177b2d2c36b136e7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_3(uint32_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c
index 32eeb884cbf29415aed6106d61f76c3b01d61754..866e240e9667988ea8097aeadec0ed7c33ae9624 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_3:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c
index 5d043ce058540699bd699c3e53930d9bbe11321f..f3adfb6fd48d660d252e77e9bf126512796e6ebb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_3:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c
index 7e5906b5073f70278c804980756b73d8b371432c..4e132a9370da8a719a9a7365dd48d83750c17d88 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c
index e1b0acdba7e73c36c7929fe809af25707e4f24d0..893f43e3b828ceca1f9735dd936a82014ab23c35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_4:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint16_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c
index 618d50bdbe9c1948c66a7e3511f9507b4c6e16fd..5c0c7a7eaeef55538adc5812cf8055432d720567 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c
index c9a9a4cad6b58bb477213c63c3b818c5d6141dcb..395bb1bda2d368e986eb3ff5214cb2c9c648bb7a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_3:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c
index 418cdc8c48167cb2e4514f9c1e52812403b6a17b..8f20c8ffeff7a55c9a1a88f89ee44e637230a0ac 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_4:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint32_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c
index 4903a046fde72faeac364df89d179e78472cf2a0..f7e7ff236213274713b24295a87565a120eba35b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c
@@ -1,17 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_4:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c
index 6f8191c6e7c6bd9f361c3fa5992b265ca3574923..2d9b6a6caae8f29e1928f6cf1d1f511eee0ee5cd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c
@@ -1,20 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c
index 24bb846a0493ae319c9a3f14c3ad16f903c6a775..4fa81fec05800fe51ef713ac8be5b5e5df494390 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c
@@ -1,19 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_4:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
 DEF_SAT_U_TRUNC_FMT_4(uint32_t, uint64_t)
 
 /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */