RISC-V: Require a extension for testcases with atomic insns

Add testsuite infrastructure for the A extension and use it to require the A
extension for dg-do run and add the add extension for non-A dg-do compile.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/amo-table-a-6-amo-add-1.c: Add A extension to
	dg-options for dg-do compile.
	* gcc.target/riscv/amo-table-a-6-amo-add-2.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-amo-add-3.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-amo-add-4.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-amo-add-5.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-1.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-2.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-3.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-4.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-5.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-6.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-compare-exchange-7.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c: Ditto.
	* gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c: Ditto.
	* gcc.target/riscv/inline-atomics-2.c: Ditto.
	* gcc.target/riscv/inline-atomics-3.c: Require A extension for dg-do
	run.
	* gcc.target/riscv/inline-atomics-4.c: Ditto.
	* gcc.target/riscv/inline-atomics-5.c: Ditto.
	* gcc.target/riscv/inline-atomics-6.c: Ditto.
	* gcc.target/riscv/inline-atomics-7.c: Ditto.
	* gcc.target/riscv/inline-atomics-8.c: Ditto.
	* lib/target-supports.exp: Add testing infrastructure to require the A
	extension or add it to an existing -march.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
index 071a33928fe9d9058d5a996fcc3c7b046fa2fa0f..8ab1a02b40c6bfcddaa242da38e49fd6f8886ec2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* Verify that atomic op mappings match Table A.6's recommended mapping.  */
 /* { dg-options "-O3" } */
+/* { dg-add-options riscv_a } */
 /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
 /* { dg-final { check-function-bodies "**" "" } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
index d6b2d91db2ab8c3363eb2b8219f0091d1b6dcfc1..a5a841abdcd889bc30e2bc0a4b1e1ca51535be53 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* Verify that atomic op mappings match Table A.6's recommended mapping.  */
 /* { dg-options "-O3" } */
+/* { dg-add-options riscv_a } */
 /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
 /* { dg-final { check-function-bodies "**" "" } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
index 68a69ed8b78093fa3b81f1bc06c142fa4e7f990a..f523821b65835a3157ca9d97d4a99d8e2a2b391d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* Verify that atomic op mappings match Table A.6's recommended mapping.  */
 /* { dg-options "-O3" } */
+/* { dg-add-options riscv_a } */
 /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
 /* { dg-final { check-function-bodies "**" "" } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
index b5cac4c47970fd11d19b2a0b3d105ead25fb8486..f1561b52c894d68d71d72bb1a497103784033080 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* Verify that atomic op mappings match Table A.6's recommended mapping.  */
 /* { dg-options "-O3" } */
+/* { dg-add-options riscv_a } */
 /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
 /* { dg-final { check-function-bodies "**" "" } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
index 268e58cb95f0981d2f8285945ebd5a2ee26b8920..81f876ee625890af680e1fed3a7e367c2ae3dbcb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* Verify that atomic op mappings match Table A.6's recommended mapping.  */
 /* { dg-options "-O3" } */
+/* { dg-add-options riscv_a } */
 /* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
 /* { dg-final { check-function-bodies "**" "" } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
index 8349e7a69ac2aa18382781042a8508986ec40bbb..dc445f0316ac2d7629f197593270da53d951b171 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
index bf30b298b4b5f93af4144c192bc40c512623a40c..7e8ab7bb5ef157aac97b197ed1ed3466d9db97c3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
index 41444ec95e906ac0ba273b3617a795fda0664924..4cb6c42221372a64934b79f9833c69bce776f131 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
index dc2d7bd300d335fa602faeeae5d009086fce408e..da81c34b92c5d61659e3bd11292954a5afcfe83d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
index 53246210900cafa0195750b96671021e5cd4a05d..bb16ccc754ccf9be85678b1ab5f65115b0c3ff4d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
index 1376ac2a95bbc61ceadfaa1c845c0db8e2063703..0f3f0b49d95152d6c19daf171c0a387d1bedbe12 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* Mixed mappings need to be unioned.  */
 /* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
index 98083cbae0839ff39c1ac791794c22929b8c9990..d51de56cc78496b7c3ca7bf0c085c8447e3462ac 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
index d7d887dd18148835d292ceab88b346fe55898f19..ca8aa715bed056103c907dfa0b9abaff77cb96db 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
index 897bad26ebdfe62ec54ea0e07412d5ca070d051e..e64759a54aeeccce85615e53cf1f5b15eb6a2a8f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
index 79efca2839a8c87ae9d886c20b8193d39f3b6107..9d3f69264fa5777279f930624912d1b9eb2c075a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
index 772ac1be6ebc9bd2c78d430ecef1df5ede840dea..ba32ed59c2fe8fdf0c49a31b97f60f536d2efefd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
index b0bec66990e06ac4b397bda83a85275241a935e6..f9be8c5e6281ae4889dcc366be6d77374cc23021 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_a } */
 /* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
 /* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-2.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-2.c
index 01b439086924243fc5892d1833a2093615e3049a..76c99829f33d560d7a8aab91c642577bbb1d7514 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-2.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-2.c
@@ -1,9 +1,10 @@
 /* { dg-do compile } */
 /* Verify that subword atomics do not generate calls.  */
 /* { dg-options "-minline-atomics" } */
+/* { dg-add-options riscv_a } */
 /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "fetch_and_nand" { target *-*-* } 0 } */
 /* { dg-final { scan-assembler-not "\tcall\t__sync_fetch_and_add_1" } } */
 /* { dg-final { scan-assembler-not "\tcall\t__sync_fetch_and_nand_1" } } */
 /* { dg-final { scan-assembler-not "\tcall\t__sync_bool_compare_and_swap_1" } } */
 
-#include "inline-atomics-1.c"
\ No newline at end of file
+#include "inline-atomics-1.c"

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-3.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-3.c
index 709f3734377b5a630f29a6c49a7c4d0efcc27f25..7bab0dda03ff9a4170fea3f79d6fdc45d1eb81a9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-3.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-3.c
@@ -2,7 +2,7 @@
 /* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-op-1.c */
 /* Test __atomic routines for existence and proper execution on 1 byte
    values with each valid memory model.  */
-/* { dg-do run } */
+/* { dg-do run { target { riscv_a } } } */
 /* { dg-options "-minline-atomics -Wno-address-of-packed-member" } */
 
 /* Test the execution of the __atomic_*OP builtin routines for a char.  */

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-4.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-4.c
index eecfaae5cc6530871cd1bf6769467057af2b9e7c..480661353b8335db1fd30c47da15a2878649afd2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-4.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-4.c
@@ -2,7 +2,7 @@
 /* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-op-2.c */
 /* Test __atomic routines for existence and proper execution on 2 byte
    values with each valid memory model.  */
-/* { dg-do run } */
+/* { dg-do run { target { riscv_a } } } */
 /* { dg-options "-minline-atomics -Wno-address-of-packed-member" } */
 
 /* Test the execution of the __atomic_*OP builtin routines for a short.  */

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-5.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-5.c
index 52093894a79760fd806d7651e648b7a46e88460d..b677418e4803646796b11e0f5d4ffb0804010ae4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-5.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-5.c
@@ -1,7 +1,7 @@
 /* Test __atomic routines for existence and proper execution on 1 byte
    values with each valid memory model.  */
 /* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-compare-exchange-1.c */
-/* { dg-do run } */
+/* { dg-do run { target { riscv_a } } } */
 /* { dg-options "-minline-atomics" } */
 
 /* Test the execution of the __atomic_compare_exchange_n builtin for a char.  */

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-6.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-6.c
index 8fee8c4481190d5307e8d990628084e367c52e0d..fcf2a13fd26b422cb0e9a13421e7e26e02fc010a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-6.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-6.c
@@ -1,7 +1,7 @@
 /* Test __atomic routines for existence and proper execution on 2 byte
    values with each valid memory model.  */
 /* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-compare-exchange-2.c */
-/* { dg-do run } */
+/* { dg-do run { target { riscv_a } } } */
 /* { dg-options "-minline-atomics" } */
 
 /* Test the execution of the __atomic_compare_exchange_n builtin for a short.  */

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-7.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-7.c
index 24c344c0ce3d6929d6c7b66ef55048f3e7203626..72dc42272f111648ad5754f56c0aa7ad07342a2a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-7.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-7.c
@@ -1,7 +1,7 @@
 /* Test __atomic routines for existence and proper execution on 1 byte
    values with each valid memory model.  */
 /* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-exchange-1.c */
-/* { dg-do run } */
+/* { dg-do run { target { riscv_a } } } */
 /* { dg-options "-minline-atomics" } */
 
 /* Test the execution of the __atomic_exchange_n builtin for a char.  */

diff --git a/gcc/testsuite/gcc.target/riscv/inline-atomics-8.c b/gcc/testsuite/gcc.target/riscv/inline-atomics-8.c
index edc212df04e21a110340dcf9a3bd8fbfaacd1560..f583e7187eac5e5f29f9c020ad6bc9a83790274f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/inline-atomics-8.c
+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-8.c
@@ -1,7 +1,7 @@
 /* Test __atomic routines for existence and proper execution on 2 byte
    values with each valid memory model.  */
 /* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-exchange-2.c */
-/* { dg-do run } */
+/* { dg-do run { target { riscv_a } } } */
 /* { dg-options "-minline-atomics" } */
 
 /* Test the execution of the __atomic_X builtin for a short.  */

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 50e8004f13bd04c5626aa5cf8529679563deb8e1..81330c4ba556203bad7951afaa3f4d7a3e6091b1 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1903,6 +1903,17 @@ proc check_effective_target_rv_float_abi_soft { } {
     }]
 }
 
+# Return 1 if the target arch supports the atomic extension, 0 otherwise.
+# Cache the result.
+
+proc check_effective_target_riscv_a { } {
+    return [check_no_compiler_messages riscv_ext_a assembly {
+       #ifndef __riscv_a
+       #error "Not __riscv_a"
+       #endif
+    }]
+}
+
 # Return 1 if the target arch supports the double precision floating point
 # extension, 0 otherwise.  Cache the result.
 
@@ -2054,6 +2065,18 @@ proc riscv_get_arch { } {
     return "$gcc_march"
 }
 
+proc add_options_for_riscv_a { flags } {
+    if { [lsearch $flags -march=*] >= 0 } {
+       # If there are multiple -march flags, we have to adjust all of them.
+       set expanded_flags [regsub -all -- {((?:^|[[:space:]])-march=rv[[:digit:]]*)g+} $flags \\1imafd ]
+       return [regsub -all -- {((?:^|[[:space:]])-march=rv[[:digit:]]*[b-eg-rt-wy]*)a*} $expanded_flags \\1a ]
+    }
+    if { [check_effective_target_riscv_a] } {
+       return "$flags"
+    }
+    return "$flags -march=[regsub {(rv[[:digit:]]*[b-eg-rt-wy]*)a*} [riscv_get_arch] &a]"
+}
+
 proc add_options_for_riscv_d { flags } {
     if { [lsearch $flags -march=*] >= 0 } {
        # If there are multiple -march flags, we have to adjust all of them.