arm64: dts: qcom: qcm2290: Add CAMSS node

Add node for the QCM2290 camera subsystem.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250423072044.234024-7-loic.poulain@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index f49ac1c1f8a3ee652d70fab1bb1ad03a5eec7c3c..fa24b77a31a7504020390522fabb0b783d897366 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -1628,6 +1628,109 @@
                        #iommu-cells = <2>;
                };
 
+               camss: camss@5c6e000 {
+                       compatible = "qcom,qcm2290-camss";
+
+                       reg = <0x0 0x5c6e000 0x0 0x1000>,
+                             <0x0 0x5c75000 0x0 0x1000>,
+                             <0x0 0x5c52000 0x0 0x1000>,
+                             <0x0 0x5c53000 0x0 0x1000>,
+                             <0x0 0x5c66000 0x0 0x400>,
+                             <0x0 0x5c68000 0x0 0x400>,
+                             <0x0 0x5c11000 0x0 0x1000>,
+                             <0x0 0x5c6f000 0x0 0x4000>,
+                             <0x0 0x5c76000 0x0 0x4000>;
+                       reg-names = "csid0",
+                                   "csid1",
+                                   "csiphy0",
+                                   "csiphy1",
+                                   "csitpg0",
+                                   "csitpg1",
+                                   "top",
+                                   "vfe0",
+                                   "vfe1";
+
+                       clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+                                <&gcc GCC_CAMSS_AXI_CLK>,
+                                <&gcc GCC_CAMSS_NRT_AXI_CLK>,
+                                <&gcc GCC_CAMSS_RT_AXI_CLK>,
+                                <&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
+                                <&gcc GCC_CAMSS_TFE_1_CSID_CLK>,
+                                <&gcc GCC_CAMSS_CPHY_0_CLK>,
+                                <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
+                                <&gcc GCC_CAMSS_CPHY_1_CLK>,
+                                <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
+                                <&gcc GCC_CAMSS_TOP_AHB_CLK>,
+                                <&gcc GCC_CAMSS_TFE_0_CLK>,
+                                <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
+                                <&gcc GCC_CAMSS_TFE_1_CLK>,
+                                <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK> ;
+                       clock-names = "ahb",
+                                     "axi",
+                                     "camnoc_nrt_axi",
+                                     "camnoc_rt_axi",
+                                     "csi0",
+                                     "csi1",
+                                     "csiphy0",
+                                     "csiphy0_timer",
+                                     "csiphy1",
+                                     "csiphy1_timer",
+                                     "top_ahb",
+                                     "vfe0",
+                                     "vfe0_cphy_rx",
+                                     "vfe1",
+                                     "vfe1_cphy_rx";
+
+                       interrupts = <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 310 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "csid0",
+                                         "csid1",
+                                         "csiphy0",
+                                         "csiphy1",
+                                         "csitpg0",
+                                         "csitpg1",
+                                         "vfe0",
+                                         "vfe1";
+
+                       interconnects = <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG
+                                        &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>,
+                                       <&mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
+                                       <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG
+                                        &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
+                       interconnect-names = "ahb",
+                                            "hf_mnoc",
+                                            "sf_mnoc";
+
+                       iommus = <&apps_smmu 0x400 0x0>,
+                                <&apps_smmu 0x800 0x0>,
+                                <&apps_smmu 0x820 0x0>,
+                                <&apps_smmu 0x840 0x0>;
+
+                       power-domains = <&gcc GCC_CAMSS_TOP_GDSC>;
+
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                               };
+                       };
+               };
+
                mdss: display-subsystem@5e00000 {
                        compatible = "qcom,qcm2290-mdss";
                        reg = <0x0 0x05e00000 0x0 0x1000>;