]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: rtw89: update query RXDESC v3 for RTL8922D
authorPing-Ke Shih <pkshih@realtek.com>
Tue, 6 Jan 2026 03:09:03 +0000 (11:09 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Fri, 9 Jan 2026 05:40:16 +0000 (13:40 +0800)
Add RXDESC v3 to parse meta data of receiving packets for RTL8922D.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260106030911.15528-3-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/txrx.h

index 3410fce22fbf6476c3baff23eefbb0039d27d3f4..d8c3474da4b43e761f9a25e6446c11619d65f796 100644 (file)
@@ -3497,6 +3497,79 @@ void rtw89_core_query_rxdesc_v2(struct rtw89_dev *rtwdev,
 }
 EXPORT_SYMBOL(rtw89_core_query_rxdesc_v2);
 
+void rtw89_core_query_rxdesc_v3(struct rtw89_dev *rtwdev,
+                               struct rtw89_rx_desc_info *desc_info,
+                               u8 *data, u32 data_offset)
+{
+       struct rtw89_rxdesc_phy_rpt_v2 *rxd_rpt;
+       struct rtw89_rxdesc_short_v3 *rxd_s;
+       struct rtw89_rxdesc_long_v3 *rxd_l;
+       u16 shift_len, drv_info_len, phy_rtp_len, hdr_cnv_len;
+
+       rxd_s = (struct rtw89_rxdesc_short_v3 *)(data + data_offset);
+
+       desc_info->pkt_size = le32_get_bits(rxd_s->dword0, BE_RXD_RPKT_LEN_MASK);
+       desc_info->drv_info_size = le32_get_bits(rxd_s->dword0, BE_RXD_DRV_INFO_SZ_MASK);
+       desc_info->phy_rpt_size = le32_get_bits(rxd_s->dword0, BE_RXD_PHY_RPT_SZ_MASK);
+       desc_info->hdr_cnv_size = le32_get_bits(rxd_s->dword0, BE_RXD_HDR_CNV_SZ_MASK);
+       desc_info->shift = le32_get_bits(rxd_s->dword0, BE_RXD_SHIFT_MASK);
+       desc_info->long_rxdesc = le32_get_bits(rxd_s->dword0, BE_RXD_LONG_RXD);
+       desc_info->pkt_type = le32_get_bits(rxd_s->dword0, BE_RXD_RPKT_TYPE_MASK);
+       desc_info->bb_sel = le32_get_bits(rxd_s->dword0, BE_RXD_BB_SEL);
+       if (desc_info->pkt_type == RTW89_CORE_RX_TYPE_PPDU_STAT)
+               desc_info->mac_info_valid = true;
+
+       desc_info->frame_type = le32_get_bits(rxd_s->dword2, BE_RXD_TYPE_MASK);
+       desc_info->mac_id = le32_get_bits(rxd_s->dword2, BE_RXD_MAC_ID_V1);
+       desc_info->addr_cam_valid = le32_get_bits(rxd_s->dword2, BE_RXD_ADDR_CAM_VLD);
+
+       desc_info->icv_err = le32_get_bits(rxd_s->dword3, BE_RXD_ICV_ERR);
+       desc_info->crc32_err = le32_get_bits(rxd_s->dword3, BE_RXD_CRC32_ERR);
+       desc_info->hw_dec = le32_get_bits(rxd_s->dword3, BE_RXD_HW_DEC);
+       desc_info->sw_dec = le32_get_bits(rxd_s->dword3, BE_RXD_SW_DEC);
+       desc_info->addr1_match = le32_get_bits(rxd_s->dword3, BE_RXD_A1_MATCH);
+
+       desc_info->bw = le32_get_bits(rxd_s->dword4, BE_RXD_BW_MASK);
+       desc_info->data_rate = le32_get_bits(rxd_s->dword4, BE_RXD_RX_DATARATE_MASK);
+       desc_info->gi_ltf = le32_get_bits(rxd_s->dword4, BE_RXD_RX_GI_LTF_MASK);
+       desc_info->ppdu_cnt = le32_get_bits(rxd_s->dword4, BE_RXD_PPDU_CNT_MASK);
+       desc_info->ppdu_type = le32_get_bits(rxd_s->dword4, BE_RXD_PPDU_TYPE_MASK);
+
+       desc_info->free_run_cnt = le32_to_cpu(rxd_s->dword5);
+
+       shift_len = desc_info->shift << 1; /* 2-byte unit */
+       drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
+       phy_rtp_len = desc_info->phy_rpt_size << 3; /* 8-byte unit */
+       hdr_cnv_len = desc_info->hdr_cnv_size << 4; /* 16-byte unit */
+       desc_info->offset = data_offset + shift_len + drv_info_len +
+                           phy_rtp_len + hdr_cnv_len;
+
+       if (desc_info->long_rxdesc)
+               desc_info->rxd_len = sizeof(struct rtw89_rxdesc_long_v3);
+       else
+               desc_info->rxd_len = sizeof(struct rtw89_rxdesc_short_v3);
+       desc_info->ready = true;
+
+       if (phy_rtp_len == sizeof(*rxd_rpt)) {
+               rxd_rpt = (struct rtw89_rxdesc_phy_rpt_v2 *)(data + data_offset +
+                                                            desc_info->rxd_len);
+               desc_info->rssi = le32_get_bits(rxd_rpt->dword0, BE_RXD_PHY_RSSI);
+       }
+
+       if (!desc_info->long_rxdesc)
+               return;
+
+       rxd_l = (struct rtw89_rxdesc_long_v3 *)(data + data_offset);
+
+       desc_info->sr_en = le32_get_bits(rxd_l->dword6, BE_RXD_SR_EN);
+       desc_info->user_id = le32_get_bits(rxd_l->dword6, BE_RXD_USER_ID_MASK);
+       desc_info->addr_cam_id = le32_get_bits(rxd_l->dword6, BE_RXD_ADDR_CAM_V1);
+       desc_info->sec_cam_id = le32_get_bits(rxd_l->dword6, BE_RXD_SEC_CAM_IDX_V1);
+
+       desc_info->rx_pl_id = le32_get_bits(rxd_l->dword7, BE_RXD_RX_PL_ID_MASK);
+}
+EXPORT_SYMBOL(rtw89_core_query_rxdesc_v3);
+
 struct rtw89_core_iter_rx_status {
        struct rtw89_dev *rtwdev;
        struct ieee80211_rx_status *rx_status;
index c5d6c40ba3ce7fe9c501668cdcfa326bcfcd5314..40527354c95d54057def73afbb10f01c5aa9a2a9 100644 (file)
@@ -1137,6 +1137,15 @@ struct rtw89_rxdesc_short_v2 {
        __le32 dword5;
 } __packed;
 
+struct rtw89_rxdesc_short_v3 {
+       __le32 dword0;
+       __le32 dword1;
+       __le32 dword2;
+       __le32 dword3;
+       __le32 dword4;
+       __le32 dword5;
+} __packed;
+
 struct rtw89_rxdesc_long {
        __le32 dword0;
        __le32 dword1;
@@ -1161,6 +1170,19 @@ struct rtw89_rxdesc_long_v2 {
        __le32 dword9;
 } __packed;
 
+struct rtw89_rxdesc_long_v3 {
+       __le32 dword0;
+       __le32 dword1;
+       __le32 dword2;
+       __le32 dword3;
+       __le32 dword4;
+       __le32 dword5;
+       __le32 dword6;
+       __le32 dword7;
+       __le32 dword8;
+       __le32 dword9;
+} __packed;
+
 struct rtw89_rxdesc_phy_rpt_v2 {
        __le32 dword0;
        __le32 dword1;
@@ -7614,6 +7636,9 @@ void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
 void rtw89_core_query_rxdesc_v2(struct rtw89_dev *rtwdev,
                                struct rtw89_rx_desc_info *desc_info,
                                u8 *data, u32 data_offset);
+void rtw89_core_query_rxdesc_v3(struct rtw89_dev *rtwdev,
+                               struct rtw89_rx_desc_info *desc_info,
+                               u8 *data, u32 data_offset);
 void rtw89_core_napi_start(struct rtw89_dev *rtwdev);
 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev);
 int rtw89_core_napi_init(struct rtw89_dev *rtwdev);
index c92e25f8a2b58d3c5cd7933a22b59dd1e72dc835..b69a2529aefcce827bb9ae9f202e87eb3f5ff852 100644 (file)
@@ -504,6 +504,7 @@ struct rtw89_phy_sts_iehdr {
 
 /* BE RXD dword2 */
 #define BE_RXD_MAC_ID_MASK GENMASK(7, 0)
+#define BE_RXD_MAC_ID_V1 GENMASK(9, 0)
 #define BE_RXD_TYPE_MASK GENMASK(11, 10)
 #define BE_RXD_LAST_MSDU BIT(12)
 #define BE_RXD_AMSDU_CUT BIT(13)
@@ -535,6 +536,7 @@ struct rtw89_phy_sts_iehdr {
 #define BE_RXD_QNULL BIT(22)
 #define BE_RXD_A4_FRAME BIT(23)
 #define BE_RXD_FRAG_MASK GENMASK(27, 24)
+#define BE_RXD_GET_CH_INFO_V2 GENMASK(31, 29)
 #define BE_RXD_GET_CH_INFO_V1_MASK GENMASK(31, 30)
 
 /* BE RXD dword4 */
@@ -550,10 +552,14 @@ struct rtw89_phy_sts_iehdr {
 
 /* BE RXD dword6 */
 #define BE_RXD_ADDR_CAM_MASK GENMASK(7, 0)
+#define BE_RXD_ADDR_CAM_V1 GENMASK(9, 0)
+#define BE_RXD_RX_STATISTICS_V1 BIT(11)
+#define BE_RXD_SMART_ANT_V1 BIT(12)
 #define BE_RXD_SR_EN BIT(13)
 #define BE_RXD_NON_SRG_PPDU BIT(14)
 #define BE_RXD_INTER_PPDU BIT(15)
 #define BE_RXD_USER_ID_MASK GENMASK(21, 16)
+#define BE_RXD_SEC_CAM_IDX_V1 GENMASK(31, 22)
 #define BE_RXD_RX_STATISTICS BIT(22)
 #define BE_RXD_SMART_ANT BIT(23)
 #define BE_RXD_SEC_CAM_IDX_MASK GENMASK(31, 24)