match.pd: Fix ICE on BIT_INSERT_EXPR of BIT_FIELD_REF folding [PR113967]

The following testcase ICEs, because BIT_FIELD_REF's position is not
multiple of the vector element's bit size and the code uses exact_div
to divide those 2 values.

For BIT_INSERT_EXPR, the tree-cfg.cc verification verifies the position
is a multiple of the inserted bit size when inserting into vectors,
but for BIT_FIELD_REF the position can be arbitrary if within the range.

The following patch fixes that.

2024-02-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113967
	* match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): Require
	in condition that @rpos is multiple of vector element size.

	* gcc.dg/pr113967.c: New test.

diff --git a/gcc/match.pd b/gcc/match.pd
index 711c3a10c3ff048d34f26f5e76331347bfe55213..c5b6540f939a6336e0e73831508c7e13af860f27 100644 (file)
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -8586,7 +8586,9 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
          || optimize_vectors_before_lowering_p ())
       && types_match (@0, @1)
       && types_match (TREE_TYPE (TREE_TYPE (@0)), TREE_TYPE (@2))
-      && TYPE_VECTOR_SUBPARTS (type).is_constant ())
+      && TYPE_VECTOR_SUBPARTS (type).is_constant ()
+      && multiple_p (wi::to_poly_offset (@rpos),
+                    wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (type)))))
   (with
    {
      unsigned HOST_WIDE_INT elsz

diff --git a/gcc/testsuite/gcc.dg/pr113967.c b/gcc/testsuite/gcc.dg/pr113967.c
new file mode 100644 (file)
index 0000000..2162180
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr113967.c
@@ -0,0 +1,14 @@
+/* PR tree-optimization/113967 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef unsigned short W __attribute__((vector_size (4 * sizeof (short))));
+
+void
+foo (W *p)
+{
+  W x = *p;
+  W y = {};
+  __builtin_memcpy (&y, 1 + (char *) &x, sizeof (short));
+  *p = y;
+}