]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sm8650: add QUP serial engines OPP tables
authorNeil Armstrong <neil.armstrong@linaro.org>
Wed, 15 Jan 2025 13:44:01 +0000 (14:44 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 26 Feb 2025 03:54:23 +0000 (21:54 -0600)
The QUP Serial Engines requires different power domain level
depending on their working frequency, add the required OPP
table with the level associated with all possible frequencies.

For the "I2C Hub" serial engines, sinse they only support a
single Operating Point, only add a single power domain level
property.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250115-topic-sm8x50-upstream-dt-icc-update-v1-9-eaa8b10e2af7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8650.dtsi

index e6938d04c40bae97d52e150eae0240b0e1654c67..38c433e79faccf6dc9056395994f1b4fdac05a4e 100644 (file)
                qcom,bcm-voters = <&apps_bcm_voter>;
        };
 
+       qup_opp_table_100mhz: opp-table-qup100mhz {
+               compatible = "operating-points-v2";
+
+               opp-75000000 {
+                       opp-hz = /bits/ 64 <75000000>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+               };
+
+               opp-100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       required-opps = <&rpmhpd_opp_svs>;
+               };
+       };
+
+       qup_opp_table_120mhz: opp-table-qup120mhz {
+               compatible = "operating-points-v2";
+
+               opp-75000000 {
+                       opp-hz = /bits/ 64 <75000000>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+               };
+
+               opp-120000000 {
+                       opp-hz = /bits/ 64 <120000000>;
+                       required-opps = <&rpmhpd_opp_svs>;
+               };
+       };
+
+       qup_opp_table_128mhz: opp-table-qup128mhz {
+               compatible = "operating-points-v2";
+
+               opp-75000000 {
+                       opp-hz = /bits/ 64 <75000000>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+               };
+
+               opp-128000000 {
+                       opp-hz = /bits/ 64 <128000000>;
+                       required-opps = <&rpmhpd_opp_svs>;
+               };
+       };
+
+       qup_opp_table_240mhz: opp-table-qup240mhz {
+               compatible = "operating-points-v2";
+
+               opp-150000000 {
+                       opp-hz = /bits/ 64 <150000000>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+               };
+
+               opp-240000000 {
+                       opp-hz = /bits/ 64 <240000000>;
+                       required-opps = <&rpmhpd_opp_svs>;
+               };
+       };
+
        memory@a0000000 {
                device_type = "memory";
                /* We expect the bootloader to fill in the size */
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
                                       <&gpi_dma2 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
                                       <&gpi_dma2 1 0 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
                                       <&gpi_dma2 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
                                       <&gpi_dma2 1 1 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
                                       <&gpi_dma2 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
                                       <&gpi_dma2 1 2 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
                                       <&gpi_dma2 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
                                       <&gpi_dma2 1 3 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
                                       <&gpi_dma2 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
                                       <&gpi_dma2 1 4 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
                                       <&gpi_dma2 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
                                       <&gpi_dma2 1 5 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_128mhz>;
+
                                pinctrl-0 = <&qup_uart14_default>, <&qup_uart14_cts_rts>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                pinctrl-0 = <&qup_uart15_default>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c0_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c1_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c2_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c3_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c4_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c5_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c6_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c7_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c8_data_clk>;
                                pinctrl-names = "default";
 
                                interconnect-names = "qup-core",
                                                     "qup-config";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               required-opps = <&rpmhpd_opp_low_svs>;
+
                                pinctrl-0 = <&hub_i2c9_data_clk>;
                                pinctrl-names = "default";
 
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 0 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 1 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_240mhz>;
+
                                dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_240mhz>;
+
                                dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 2 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 3 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 4 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 5 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 6 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_120mhz>;
+
                                dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 6 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 7 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                                     "qup-config",
                                                     "qup-memory";
 
+                               power-domains = <&rpmhpd RPMHPD_CX>;
+
+                               operating-points-v2 = <&qup_opp_table_100mhz>;
+
                                dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>,
                                       <&gpi_dma1 1 7 QCOM_GPI_SPI>;
                                dma-names = "tx",